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1.
The authors report a method for the reduction of the near-end echo in the subscriber loop environment for primary-rate ISDN full-duplex data transmission. The technique uses an RC network as the matching input line impedance at the transmitter to reduce the near-end echo. Data rates ranging from the ISDN basic rate with (2B+D) channels to primary rate with (23B+D) channels are covered. The results indicate that a single basic configuration for the balancing line impedance may be adapted to keep the transhybrid loss in the range of about 22 dB in the worst case over the entire frequency range of interest. The balancing procedure for the hybrid takes place in a training sequence during which the component values of the RC matching circuit are adjusted from their initial values by an iterative adaptation procedure. Two techniques for optimizing the component values have been verified. For all cases examined, including worst-case line configurations, the components of the RC matching circuit have converged to final values, for which the minimum transhybrid loss had a maximum above 20 dB  相似文献   

2.
The design challenges faced in the integrated circuit realization of the basic customer access U-interface transceiver at 144 kbits/s in the integrated services digital network (ISDN) are summarized. Given the cost and performance objectives, this represents a very challenging design problem from an algorithmic and technology point of view. This survey paper describes the alternative design approaches concentrating on algorithmic issues as opposed to circuit design issues, in the context of the echo cancellation (EC) method of full duplex data transmission. Particular emphasis is given to the areas of echo cancellation, equalization, line code selection, and timing recovery.  相似文献   

3.
An Integrated Services Digital Network (ISDN) burst transceiver circuit is described which provides two-wire data transmission using the time-compression multiplexing technique and an AMI (alternate mark inversion) line code at a line bit rate of 384 kb/s. An automatic line equalizer handles a wide variety of twisted pair cable types including highly capacitive cables with up to 32-dB insertion loss at the Nyquist frequency.  相似文献   

4.
This paper describes a new ISDN-oriented modular (IOM®) architecture developed to establish the subscriber basic access to an Integrated Services Digital Network in a central-office or PABX environment with a minimum number of VLSI circuits. A four-component VLSI chip set is presented, consisting of the S-bus interface circuit (SBC), the ISDN burst transceiver circuit (IBC), and the ISDN echo cancellation circuit (IEC) for layer 1 data transmission at the fourwireSand the two-wireUinterface, respectively, and the ISDN communication controller for layer 2 link access protocol control. The development strategy, the functions of the IC's, and examples for their application in the subscriber terminal and digital subscriber line board are emphasized.  相似文献   

5.
This paper describes the integrated services digital network (ISDN) basic rate interface (BRI) two-wire U interface and the transceiver necessary for the digital transmission of 160 kb/s of information over unshielded twisted pair transmission media. Topics discussed include the U interface structure and framing as described in the American National Standards Institute (ANSI) T1.601 specification, and the VLSI implementation of the ISDN U transceiver. Pertinent transceiver design issues addressed include the type of line code used, such as 2B1Q or 4B3T, echo cancellation, near end crosstalk, equalization and sampling rates.  相似文献   

6.
PerformanceEvalutionof2B1QDataEchoCancelerinDigitalSubscriberAccesNetworksManuscriptreceivedOct.12,1996TangBaomin(NanjingUniv...  相似文献   

7.
A hubbed distribution architecture based on a bus-star configuration, three-level single single-mode fiber transmission using M-TPC line code, and high-speed IC technology is proposed. The architecture is cost-effective and compact. It is well suited to metropolitan area CATV systems and would allow a gradual transition to a broadband ISDN (integrated-services digital network) subscriber loop in the future. The proposed architecture is applied to a digital optical CATV system prototype. The equipment making up this system consists of a transmitter, hubs including video selectors, and subscriber unit. Two video channels are selected for each subscriber from eight video channels at hub stations. The transmission speed is 900 Mb/s, three-level for the trunk line and 200 Mb/s, three-level for each subscriber loop. Very compact and low-cost equipment is realized by using recently developed high-speed ICs. Experimental results show that the system satisfies requirements and that its commercial application is feasible  相似文献   

8.
A 144-kb/s digital subscriber loop (DSL) transmission system based on hybrid transmission with an echo cancelling method is described. It incorporates advanced LSI technology to obtain compactness, low cost, and high reliability. An echo canceller (EC) LSI has been developed using CMOS technology. Combined with the multiplexing processor (MXP) LSI, the EC LSI provides basic DSL equipment functions. A specially arranged frame format with a newly developed digital phase-locked loop (DPLL) circuit for stable timing extraction, an automatic balancing network, and a two-stage echo canceller characterize the system. Using this line termination circuit, the DSL equipment showed a reach of over 6 km when used with 0.5 mm diameter cable for 160-kb/s bidirectional digital transmission  相似文献   

9.
In the telephone network, an echo is generated at the hybrid junction that connects four- to two-wire lines. A conventional echo suppressor or canceller is designed on the assumption that the echo is actually induced. On the contrary, in this novel method using a bilateral optoisolator circuit, the echo is suppressed at its origin. This bilateral optoisolator circuit has not only the property of bilateral transmission, but also the same property of suppression impedance fluctuation as is characteristic of a buffer amplifier. Experimental results show that the degradation of echo return loss can be kept within a few decibels even under the severe condition that the line impedance changes from zero to infinity.  相似文献   

10.
王俊  黄娟  阎守国  张碧星 《电子学报》2018,46(8):1884-1890
根据压电晶片厚度振动一维等效电路、传输线理论和超声传播理论提出一种PSPICE等效电路模型.该模型利用有损传输线可对压电晶片的机械损耗过程进行模拟仿真.利用该模型对超声无线输能系统声电转换通道进行了PSPICE等效电路建模和仿真,不仅得到了快速可靠的计算结果,而且简化了超声无线输能系统的电路设计过程.该方法为研究超声无线输能系统提供了有效可靠的理论和技术基础.  相似文献   

11.
A single-chip transceiver designed to meet the American National Standards Institute (ANSI) requirements for the U-interface in the integrated services digital network (ISDN) is described. The device utilizes linear, jitter-compensated, and nonlinear echo cancellation and the 2B1Q line code to achieve high performance in the presence of near-end crosstalk and other impairments. The 2-μm, single-metal, double-polysilicon, 5-V CMOS VLSI chip includes all the necessary analog and digital signal processing blocks for a network-termination of line-termination U-interface to be realized with the addition of a passive-line termination circuit and a transformer. Operation over 4.7 km of 0.4-mm cable or 7.5 km of 0.5-mm cable, with a bit error rate of 10-7, is possible  相似文献   

12.
The echo canceller burst mode (ECBM) is part of a "silicon boutique," a family of devices that offer a cost-effective industrial solution to the problem of ISDN basic access. ECBM takes advantage of both the echo cancellation and the time compression techniques. It leaves a silent period in each direction of transmission; this creates periods in which only the received signal or only the echo is present, which greately simplifies the echo canceller and the timing recovery. The components of the family implement the signal processing, power feed, and line interface functions needed for the ISDN basic access (144 kbits/s); they take into account the requirement of different connection schemes, yet offering flexibility to accommodate possible standards evolution. Their coordination avoids "glue" components and facilitates some basic access functions (e.g., activation, maintenance, monitoring).  相似文献   

13.
A new switching architecture for broadband ISDN, "Synchronous Composite Packet Switching (SCPS)," is proposed and evaluated. It efficiently integrates circuit and packet switching functions on a single switching system and accommodates very high speed-up to several tens of Mbit/s-communication services, such as very high speed bursts of data, still picture, and motion video, as well as 64 kbit/s or less voice and data services. The SCPS system comprises plural switch modules and plural Very high speed synchronous loops. In the SCPS system, messages on plural circuit switched channels are assembled into quasi-packets, called "composite packets," and switched synchronously between switch modules, maintaining complete time transparency and short absolute delay time. A system parameter design to obtain high system efficiency and appropriate system modularity is explained, and an example for a very large capacity transit switch of 4 Gbit/s throughput is presented. System implementation problems to realize the SCPS principle, such as efficient implementation of the composite packet assembling and loop transmission functions, are investigated and an experimental system constructed for circuit switching part is presented. The most remarkable characteristic of the SCPS is that it efficiently integrates64 times nkbit/s circuit switching with packet switching. Moreover, the SCPS system retains compatibility with existing networks and the possibiliy of evolution toward a future broadband ISDN. On the basis of the above investigations and experimental system construction, the authors conclude that the SCPS is one of the most practical switching architectures for the coming broadband ISDN era.  相似文献   

14.
A variety of signal processing techniques have been developed over the past 10 years to increase the bit rate of digital transmission through telephone loop twisted pairs. The ISDN basic rate access 2B1Q digital subscriber line (DSL) was the first technology of this type to be deployed commercially at 160 kb/s full-duplex transmission on a single twisted pair. Other transmitter/receiver circuits have been developed over the years that support symmetric and asymmetric data transmission from several hundreds of kilobits per second to several megabits per second using the 2B1Q line code in the case of HDSL and various modulation techniques (QAM, CAP, and DMT) in the case of ADSL. These more recent forms of xDSL circuitry have begun to be used to provide commercial Internet access. This article analyzes the system level considerations for using these technologies in the increasing complex loop network of telephone companies. A “next generation” of xDSL access system is proposed, and the requirements for such a system are discussed  相似文献   

15.
A high-reliability 565 Mbit/s trunk transmission system capable of operating over a 25.5 dB fiber section loss at 1.3 μm is described. Details of the line terminal and repeater design are presented, together with an outline of the integrated circuit design and process. Aspects of the line code and interface choice are also discussed in relation to the optical receiver, transmitter, and supervisory circuits. Finally, systems design aspects are considered and field experience resulting from a system installation spanning 77 km between Birmingham and Derby is reported.  相似文献   

16.
Transmission Delay Line Based ID Generation Circuit for RFID Applications   总被引:4,自引:0,他引:4  
A transmission delay line based ID generation circuit is presented for radio frequency identification (RFID) applications. The ID generation circuit has been designed using microstrip transmission lines as delay lines for its operation at ultra high frequency (UHF: 915MHz). The layout has been realized on a flexible substrate using photolithography based fabrication techniques. The circuit has been tested with an on-off-key (OOK) modulated input signal and different combinations of 4bit ID code have been generated. Obtained results confirm the concept and its use in RFID applications  相似文献   

17.
A new type of digital echo canceler for two-wire digital transmission is presented. The new principle involves very simple signal processing and is thus an interesting alternative for digital transmission on subscriber lines. The principle is compared with other echo cancellation techniques, and it is shown how choice of line code, equalization, and carrier recovery are affected by the new echo canceler. A theoretical analysis of the principle is given, taking into account finite accuracy, jitter, noise, and correlated data streams. The echo canceler can be used for line attenuation up to 40 dB. At 80 kbits/s this corresponds to at least 7 km 0.6 mm cable and is sufficient to cover more than 99 percent of the existing Norwegian subscriber lines.  相似文献   

18.
This paper describes gigabit single-mode fiber transmission using 1.3-μm edge-emitting LED's for broad-band subscriber loops, focusing on a method of calculation for maximum transmission distance and 1.2-Gbit/s and 600-Mbit/s transmission experiments. Gigabit single-mode fiber transmission is necessary for subscriber loops, especially in broad-band ISDN and optical CATV systems. Edgeemitting LED's are excellent light sources because of their high power launched into the fiber compared with surface-emitting LED's, and currently lower cost and higher reliability than laser diodes. The maximum transmission distance is carefully estimated by taking into account the wavelength dependence for both chromatic dispersion and loss of the single-mode fiber, and the possibility of gigabit transmission near the dispersion free wavelength 1.3 μm, is confirmed. Encouraged by the above results, we demonstrate 1.2-Gbi,t/s 10-km and 600-Mbit/s 20-km transmission experiments using a newly developed 1.3-μm edge-emitting LED and a new driver circuit with a simple response compensation circuit. These results show the proposed calculation method and the LED response compensation circuit to be powerful tools for the realization of low-cost gigabit single-mode fiber transmission using edge-emitting LED's.  相似文献   

19.
A digitally-implemented echo canceller operating at a rate greater than twice the highest passband frequency is proposed for fullduplex data transmission on a two-wire circuit. Located at each end of the communication circuit, the cancellers operate independently of the local receivers and do not require synchronization of the two data stations. Economies in storage and A/D conversion, in comparison with voice-type cancellers described in the literature, are achieved by accepting data symbols as reference input instead of samples of the transmitted line signal. Convergence of transversal filter tap weights is demonstrated under a mean-squared error criterion, and use of the real passband error rather than the complex analytic error is found to lead to the same residual error at the expense of a doubled convergence time. An operational protocol and adaptation algorithm are proposed which make possible both rapid start-up and slower adaptation during double talking. Provision is made for limiting the number and location of active taps on the transversal filter to those actually necessary for replicating the echo channel, resulting in two transversal filter sections of moderate length separated by a bulk delay. Results from a computer simulation of the proposed canceller are offered to demonstrate that convergence of mean-squared tap-weight error follows the predicted exponential characteristic, that the length of the bulk delay can be determined from a single channel sounding under typical channel noise conditions, and that the use of an averaged-gradient algorithm will allow the canceller to adapt, although slowly, to a change in the echo channel during full-duplex operation.  相似文献   

20.
Reasons for using the echo-cancellation (EC) technique for full-duplex two-wire transmission of ISDN signals are given. Analysis of the performances achievable with different codes, such as 3B/2T, MMS43, partial response class 4 (PR4), and diphase, justifies the final selection of MMS43. A full-digital integrated U-interface circuit with MMS43 code and with Barker codeword synchronization is described. First laboratory test results are presented.  相似文献   

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