Malicious attack-resistant secure localization algorithm for wireless sensor network

In hostile environments, localization often suffers from malicious attacks that may distort transmit power and degrade positioning accuracy significantly for wireless sensor network. A robust semidefinite relaxation secure localiza-tion algorithm RSRSL was proposed to improve the location accuracy against malicious attacks. On the assumption of unknown transmit power, which is undoubtedly approximate to the fact of WSN, a novel secure location probability model was introduced for single-target and multi-target sensor networks, respectively. Taking the computational complexity of RSRSL into account, the nonlinear and non-convex optimization problem was simplified into a semidefinite programming problem. According to the results from both simulations and field experiments, it is clearly demonstrated that the proposed RSRSL has better performance on location accuracy, in contrast to the conventional localization algorithms.     

Side-channel attack-resistant AES S-box with hidden subfield inversion and glitch-free masking

A side-channel attack(SCA)-resistant AES S-box implementation is proposed,which is an improvement from the power-aware hiding(PAH)S-box but with higher security and a smaller area.We use the composite field approach and apply the PAH method to the inversion in the nonlinear kernel and a masking method to the other parts.In addition,a delaymatched enable control technique is used to suppress glitches in the masked parts.The evaluation results show that its area is contracted to 63.3%of the full PAH S-box,and its power-delay product is much lower than that of the masking implementation.The leakage assessment using simulation power traces concludes that it has no detectable leakage under t-test and that it at least can thwart the moment-correlation analysis using 665000 noiseless traces.     

Systematic design exploration of delta-sigma ADCs

An algorithm for architecture-level exploration of the /spl Delta//spl Sigma/ A/D converter (ADC) design space is presented. Starting from the desired specification, the algorithm finds an optimal solution by exhaustively exploring both single-loop and cascaded architectures, with a single-bit or multibit quantizer, for a range of oversampling ratios. A fast filter-level step evaluates the performance of all loop-filter topologies and passes the accepted solutions to the architecture-level optimization step which maps the filters on feasible architectures and evaluates their performance. The power consumption of each accepted architecture is estimated and the best top-ten solutions in terms of the ratio of peak signal-to-noise+distortion ratio versus power consumption are further optimized for yield. Experimental results for two different design targets are presented. They show that previously published solutions are among the best architectures for a given target but that better solutions can be designed as well.     

Systematic design of unitary space-time constellations

We propose a systematic method for creating constellations of unitary space-time signals for multiple-antenna communication links. Unitary space-time signals, which are orthonormal in time across the antennas, have been shown to be well-tailored to a Rayleigh fading channel where neither the transmitter nor the receiver knows the fading coefficients. The signals can achieve low probability of error by exploiting multiple-antenna diversity. Because the fading coefficients are not known, the criterion for creating and evaluating the constellation is nonstandard and differs markedly from the familiar maximum-Euclidean-distance norm. Our construction begins with the first signal in the constellation-an oblong complex-valued matrix whose columns are orthonormal-and systematically produces the remaining signals by successively rotating this signal in a high-dimensional complex space. This construction easily produces large constellations of high-dimensional signals. We demonstrate its efficacy through examples involving one, two, and three transmitter antennas     

Systematic design of superprism-based photonic crystal demultiplexers

In this paper, design of photonic crystal demultiplexers based on superprism effect is discussed. Figures of merit for performance of these demultiplexers are defined and a systematic design procedure is presented. We consider different design schemes, based on equal angular separation between channels and equal frequency separation between channels, and find the optimum structures among conventional photonic crystal lattices for each case. Our results provide design solutions for a range of current applications.     

ReTrust: attack-resistant and lightweight trust management for medical sensor networks

Wireless medical sensor networks (MSNs) enable ubiquitous health monitoring of users during their everyday lives, at health sites, without restricting their freedom. Establishing trust among distributed network entities has been recognized as a powerful tool to improve the security and performance of distributed networks such as mobile ad hoc networks and sensor networks. However, most existing trust systems are not well suited for MSNs due to the unique operational and security requirements of MSNs. Moreover, similar to most security schemes, trust management methods themselves can be vulnerable to attacks. Unfortunately, this issue is often ignored in existing trust systems. In this paper, we identify the security and performance challenges facing a sensor network for wireless medical monitoring and suggest it should follow a two-tier architecture. Based on such an architecture, we develop an attack-resistant and lightweight trust management scheme named ReTrust. This paper also reports the experimental results of the Collection Tree Protocol using our proposed system in a network of TelosB motes, which show that ReTrust not only can efficiently detect malicious/faulty behaviors, but can also significantly improve the network performance in practice.     

Systematic design of novel wide-angle low-loss symmetric Y-junctionwaveguides

To construct a low-loss and wide-branching-angle symmetric Y-junction waveguide, a novel structure is proposed. The structure consists of a pair of microprisms for precompensation and a microprism for phase-front acceleration. The structure of the Y-junction and the associated refractive indexes of microprisms are systematically derived. The simulated results using the fast Fourier transformation beam propagation method (FFT-BPM) demonstrate the performances of the proposed structure. The normalized transmitted power is more than 95% even though the branching angle is up to 200     

Systematic design of space-time codes employing multiple trelliscoded modulation

The design of space-time (ST) codes employing multiple trellis coded modulation (MTCM) is considered. This structure is shown to be necessary for achieving maximum transmit diversity gain when using trellis codes with parallel paths. Systematic code search procedures with low complexity are described based on the properties of ST-MTCM codes. It is illustrated that, if the trellis branches are properly labeled, the overall coding gain can be made larger than that achieved by conventional ST codes with the same transmission rate and the same number of states     

Systematic generation of linear allocation functions in systolic array design

Linear allocation functions are commonly used in mapping programs expressed as systems of recurrence equations to systolic arrays. The interconnections in a systolic array are usually required to belong to a small set ofpermissible vectors. Thus, the design space of all systolic arrays that can be derived from a given program is limited, regardless of the program being mapped. By investigating the nature of this constraint of permissible interconnections, we derive upper bounds on the number of possible systolic arrays that can be derived. These bounds are surprisingly small: there can be no more than 4 linear systolic implementations of 2-dimensional recurrences, and no more than 13 (purely systolic) planar arrays for a 3-dimensional system of recurrences. We present an efficient procedure to utilize thse bounds to generate all possible linear allocation functions for a given system of recurrences, and show how it may be used for the computer-aided design of optimal systolic arrays.Supported by NSF grant MIP-8802454. Authors' email address:     

The design and development of a family of personal computers for engineers and scientists

Hewlett-Packard introduced its first personal computer, a scientific calculator with firmware transcendental functions, in late 1968. Three generations of personal computers with increasing memory sizes, versatility, performance/price, and ease of use, have evolved from the original design. The newest generation, the Hewlett-Packard Series 200, is based upon the same primary objectives and principles which guided the designs of the earlier product families. The paper traces this product evolution, examines the requirements and objectives, and discusses the hardware and software design details of the Series 200 product family.     

Pattern recognition using a family of design algorithms based uponthe generalized probabilistic descent method

This paper provides a comprehensive introduction to a novel approach to pattern recognition which is based on the generalized probabilistic descent method (GPD) and its related design algorithms. The paper contains a survey of recent recognizer design techniques, the formulation of GPD, the concept of minimum classification error learning that is closely related to the GPD formalization, a relational analysis between GPD and other important design methods, and various embodiments of GPD-based design, including segmental-GPD, minimum spotting error training, discriminative utterance verification, and discriminative feature extraction. GPD development has its origins in basic pattern recognition and Bayes decision theory. It represents a simple but careful re-investigation of the classical theory and successfully leads to an innovative framework. For clarity of presentation, detailed discussions about its embodiments are provided for examples of speech pattern recognition tasks that use a distance-based classifier. Experimental results in speech pattern recognition tasks clearly demonstrate the remarkable utility of the family of GPD-based design algorithms     

Systematic design of the pipelined analog-to-digital converter with radix<2

A systematic design of the pipelined analog-to-digital converter with radix<2 is described. A 50 MHz, 3.3 V, 10-bit pipelined analog-to-digital converter has been implemented in a 0.25-μm CMOS technology using radix<2 architecture. It achieves more than 54 dB signal-to-noise plus distortion ratio in Nyquist signal sampling at 3.0 V (10% lower than the 3.3 V nominal value) over −40 to +120 °C temperature range with a full-scale sinusoidal input. The IM3 of the converter, which is an important parameter for the OFDM based systems, is less than −64 dB. Non-linearity is reduced through digital self-calibration and correction. The digital calibration procedure takes less than 24 μS and can be done either on power up or intermittently. The layout area is 1.8 mm×1.2 mm. The converter consumes 100 mA out of a 3.3 V supply including the reference circuitry, analog cells, and all digital blocks at full-scale Nyquist sampling speed.     

Systematic approach for IG-FinFET amplifier design using gm/Id method

In this paper, a systematic approach has been used to apply gm/Id method for the design of Independent Gate (IG) FinFET amplifiers. The design of high-performance amplifiers using g_m/I_d method has been successfully applied to nanometer devices. IG-FinFETs have been widely used in digital circuit implementations. However, the application of IG-FinFETs in analog circuits is limited and brings many advantages including low power, low voltage operation of transistors. Independent gates of FinFET can receive different voltages that facilitate low voltage operation of the circuit. Simulation-based g_m/I_d method has been applied to IG-FinFET transistors and a systematic methodology has been developed for the design of IG-FinFET amplifiers. The Berkeley BSIM-IMG 55 nm technology parameters have been used for HSPICE simulations. The designed amplifier has a DC gain of about 45 dB while consuming 6.5 µW from single 1 V power supply.

     

Systematic derivation of latchup design rules for submicron CMOS processes from test structures

A dedicated set of test structures can be used to determine the latchup susceptibility of a process as a function of n⁺p⁺-spacing, placement of N_well and substrate contacts and guardring width and distance to the injecting junction. A systematic approach is given for the translation of these test structure data into latchup design rules resulting in latchup robust products. The methodology is demonstrated using data from a submicron CMOS process on p⁻/p⁺⁺ epitaxial substrates.     

Systematic derivation of explicit design formulae for log-domain: A 3rd-order lowpass example

The operational simulation of passive prototypes in log-domain is feasible either by means of state-space-based techniques or by transforming the SFG corresponding to the linear prototype. However, the correlation of the prototype element values with circuit parameter (i.e. capacitor and biasing current) values constitutes a synthesis step, which is not explained in detail by the available literature and usually entails a considerable amount of expertise. This paper aims at elaborating one possible way of such an explicit correlation by means of the concept of the Intermediate Transfer Function. An exemplary 3rd-order LP ladder Chebychev response is synthesised and analytic design relations are systematically derived.The resulting general formulae allow the engineer to explore several possible design freedom parameters as far as the filter topology selection and its performance are concerned. HSPICE simulation results are provided.     

Systematic photonic crystal device design: global and local optimization and sensitivity analysis

We present a set of modeling, sensitivity analysis, and design optimization methods for photonic crystal structures based on Wannier basis field expansion and efficient matrix analysis techniques. We develop the sensitivity analysis technique to analyze both refractive index perturbations and dielectric boundary shift perturbations. Our modeling method is /spl sim/1000/spl times/ faster than finite-difference time-domain (FDTD) for searching through a large number of similar device designs. We show that our optimization techniques, relying on the efficiency of the modeling and sensitivity analysis methods, enable systematic global and local optimizations of integrated optical components. We show that our design method can be controlled to favor designs without high-energy build-ups, potentially making them more fabrication-error tolerant. We present design examples and verify our designs with FDTD calculations.     

Systematic design of double-sampling /spl Sigma//spl Delta/ A/D converters with a modified noise transfer function

Double-sampling /spl Sigma//spl Delta/ analog-digital converters (ADCs) are sensitive to path mismatch which causes quantization noise to fold into the signal band. A recent solution for this problem consists of modifying the noise transfer function (NTF) of the modulator such that it has one or several zeros at the Nyquist frequency, next to those in the baseband. In this brief, we present a systematic design strategy for such ADCs. It consists of finding optimal pole positions for the modified NTF. This can be combined with optimizing the zeros as well. Next, we introduce several efficient structures that have enough degrees of freedom to realize the optimized pole positions.