基区复合电流对双极晶体管厄利电压的影响

推导了在考虑了基区复合电流后双极晶体管厄利电压的理论表达式。用该表达式计算了Si/SiGe异质结双极晶体管的厄利电压,并且与仿真结果进行了比较。比较结果表明,两种情况下计算出的厄利电压值符合良好。     

异质结双极晶体管基区复合电流的解析模型

从求解异质结双极晶体管基区的二维电流连续性方程出发，推导出了基区少数载流子浓度的解析解，由此获得了基区各处复合电流的解析表达式。基于该模型完成了算法研究和软件编制，计算出了器件所能达到理论电流增益。     

异质结双极晶体管基区复合电流的解析模型

从求解异质结双极晶体管基区的二维电流连续性方程出发，推导出了基区少数载流子浓度的解析解，由此获得了基区各种复合电流的解析表达式。基于该模型完成了算法研究和软件编制，计算出了器件所能达到的理论电流增益。     

晶体管厄利电压对功放电路静态电流影响实例分析

通过对某款功放电路的静态电流随电源电压增加而快速增大的实例,分析了晶体管厄利电压对静态电流变化的影响。通过对同款电路在不同工艺平台中测试结果的对比,分析了静态电流随电源电压变化过快的现象跟晶体管参数厄利电压的相关性,并分析了浅结工艺用于制造功放电路的缺点。分析结果表明通过优化或改变工艺条件(即增加基区结深),使晶体管厄利电压增大,可以解决该款功放电路静态电流随电源电压增大增速过快的问题。     

集成双极晶体管基区表面电势的二维模型及其应用

基区表面电特性对双极器件影响很大,本文建立了集成双极npn晶体管基区表面电势的二维模型。文中还通过对采用SiO_2膜和Si_3N_4-SiO_2双层膜一次钝化的电容(MOS和MNOS)和栅控npn晶体管的表面电特性的研究,发现SiO_2-Si_3N_4一次钝化膜能有效地减小基区表面电势。     

硅锗基区异质结双极晶体管的研究进展

叙述了硅锗基区异质结双极晶体管的研究发展现状，分析了该晶体管的结构机理，特点及制造技术，并且阐述了该器的发展前景。     

低温硅双极晶体管基区优化设计

常规双极晶体管在７７Ｋ下电流增益和频率性能都严重退化。本文首先分析了低温双极晶体管基区Ｇｕｍｍｅｌ数，基区方块电阻，渡越时间和穿通电压等参数与温度及基区掺杂的关系，然后讨论了低温双极器件基区的优化设计问题。     

基区复合对nSi/pSi_(1-x)Ge_x/nSi晶体管共射极电流增益的影响

采用二维数值模拟方法详细分析了基区复合电流对nSi/pSi1-xGex/nSi应变基区异质结双极晶体管(HBT)共射极电流放大系数β的影响,给出了Si1-xGexHBT的Gummel图、平衡能带图.得出在靠近发射结附近基区的复合电流是引起β下降的主要因素,并给出了减小基区复合电流的Ge分布形式.     

低温下双极型晶体管电流增益和基区杂质浓度的新关系

<正>近年来,低温(77K)微电子器件和电路的研究得到了国际上广泛重视,已成为半导体学科十分重要和活跃的领域之一.本文建立了低温下双极型晶体管电流增益和基区杂质浓度的新关系,这将成为低温双极型晶体管设计的重要理论依据.以n~+pn型晶体管为例进行分析,当基区杂质浓度N_B小于N_0=1×10~(17)cm~(-3)时,基区中无禁带变窄效应的存在,此时电流增益H_(FE)将随基区杂质浓度N_B上升而下降.     

高电流增益的碳化硅双极型晶体管

A novel 4H-SiC BJT of high current gain with a suppressing surface traps effect has been proposed. It is effective to improve the current gain due to the lower electrons density in the surface region by extending the emitter metal to overlap the passivation layer on the extrinsic base surface. The electrons trapped in the extrinsic base surface induce the degeneration of Si C BJTs device performance. By modulating the electron recombination rate, the novel structure can increase the current gain to 63.2% compared with conventional ones with the compatible process technology. Optimized sizes are an overlapped metal length of 4 m, as well as an oxide layer thickness of 50 nm.     

Analytical models for the base transit time of a bipolar transistor with double base epilayers

arriers when transiting the base region and reduce the base transit time. From the simulation results, the base transit time reaches a minimal value when the ratio of L2/L2is about 2.     

双外延基区BJT基区渡越时间的模型研究

The doping profile function of a double base epilayer is constructed according to drift-diffusion theory. Then an analytical model for the base transit time τb is developed assuming a small-level injection based on the characteristics of the 4H-SiC material and the principle of the 4H-SiC BJTs. The device is numerically simulated and validated based on two-dimensional simulation models. The results show that the built-in electric field generated by the double base epilayer configuration can accelerate the carriers when transiting the base region and reduce the base transit time. From the simulation results, the base transit time reaches a minimal value when the ratio of L2/L1 is about 2.     

不同辐照剂量率下NPN晶体管的电流增益退化模型

电离辐照使NPN晶体管基极电流增加,导致电流增益退化。辐照感生的界面态使表面复合速率,感生的氧化物电荷改变基区表面势,导致表面复合率增加,这两者都引起基极电流增加;基于此,建立了电流增益退化模型。结合感生的界面态和氧化物电荷的产生机制,这个模型能够解释辐照导致的增益退化,以及增益退化的低剂量率增强效应。在Co60 源上进行了γ射线辐照试验,高剂量率为10 rad (Si)/,低剂量率为0.1 rad(Si)/s,总剂量为70krad(Si)。这个模型很好解释实验数据。     

晶体管电流增益的表达式修正及电流增益在可靠性评估中的应用

Considering the impacts of ideal factor n, VBE and band gap changes with the temperature on current gain, the current gain expression has been corrected to make the results closer to the actual test. Besides, the accelerating lifetime study method in the constant temperature-humidity stress is used to estimate the reliability of the same batch transistors. Applying the revised findings from the expression, the current gains before and after the test are compared and analyzed, and, according to the degradation data of the current gain, the transistor lifetimes in the test stress are respectively extrapolated in the different failure criteria.     

Power bipolar devices

This paper deals with the specific aspects of bipolar device physics and with the problems posed by the design of their structure. Emphasis will be placed on the fundamental mechanisms which determine the on-state, the off-state and the switching performance. A number of relationships between operating characteristics and structure parameters are established. These relationships are useful for improving structure designs. The current-handling capability of high-voltage transistors is discussed thoroughly as a relevant example. Finally, the state of the art and trends of power bipolar devices are briefly reviewed.     

基于电压阀和电流阀模型的晶体管放大电路分析

依据已经提出的电压阀和电流阀两种非线性电路模型以及由电压阀和电流阀构造出的晶体管模型,进一步对各种晶体管放大电路进行了非线性模型等效,并在等效的模型电路基础上,研究晶体管放大电路的静态工作点计算方法、动态参数计算方法.该方法具有电路直观、概念清晰、分析计算准确等特点,而且能够判断出晶体管是否截止或饱和、动态工作范围大小等.     

Early voltage in heterojunction bipolar transistors: Quantum tunneling and base recombination effects

An extension of the thermionic emission expression for Early voltage V_A for heterojunction bipolar transistors including quantum mechanical tunneling and base recombination effects is provided. The theoretical model is based on a single flux treatment of the carrier transport invoking the concise notation of scattering matrices. V_A is numerically evaluated under the WKB quantum mechanical approximation for triangular and parabolic barriers. The temperature dependence of the Early voltage is simulated numerically and compared to earlier theoretical V_A predictions and actual experimental results of V_A in heterojunction bipolar transistors.     

Neutral base recombination and its influence on the temperaturedependence of Early voltage and current gain-Early voltage product inUHV/CVD SiGe heterojunction bipolar transistors

We present the first comprehensive investigation of neutral base recombination (NBR) in ultra-high vacuum/chemical vapor deposited (UHV/CVD) SiGe heterojunction bipolar transistors (HBT's), and its influence on the temperature characteristics of Early voltage (V_A ) and current gain-Early voltage product (βV_A). We show that a direct consequence of NBR in SiGe HBT's is the degradation of V_A when transistors are operated with constant-current input (forced-I_B) as opposed to a constant-voltage input (forced-V_BE). In addition, experimental and theoretical evidence indicates that with cooling, V_A in SiGe HBT's degrades faster than in Si bipolar junction transistors (BJT's) for forced-I_B mode of operation. Under the forced-V_BE mode of operation, however, SiGe HBT's exhibit a thermally-activated behavior for both V_A and βV_A, in agreement with the first-order theory. The differences in V_A as a function of the input bias and temperature for SiGe HBT's are accurately modeled using a modified version of SPICE. The performance of various practical SiGe HBT circuits as a function of temperature, in the presence of NBR, is analyzed using this calibrated SPICE model     

High temperature characterization of double base epilayer 4H-SiC BJTs

Based on the material characteristics and the operational principle of the double base epilayer BJTs, and according to the drift-diffusion and the carrier recombination theory, the common emitter current gain is calculated considering four recombination processes. Then its performance is analyzed under high temperature conditions. The results show that the emitter injection efficiency decreases due to an increase in the base ionization rate with increasing temperature. Meanwhile, the SiC/SiO2 interface states and the quality of the passivation layer will affect the surface recombination velocity, and make an obvious current gain fall-off at a high collector current.