基于最大电源噪声门级模型的遗传算法电源噪声估计

提出一种能够综合考虑IR drop和di/dt噪声的门级电路模型.实验表明,利用这种模型进行电源噪声估计,可以比传统模型提高5.3%的精度,同时运算时间降低10.7%.根据输入信号对最大电源噪声的影响,还提出了关键输入信号模型.实验表明,在进行电源噪声估计中,基于这些模型的遗传算法,能够比传统的遗传算法提高最多19.0%的精度,并且收敛更加迅速.     

基于电源树分布RLC模型估计同步切换噪声

在超深亚微米 ( VDSM)工艺下 ,器件频繁的同步切换可在电源 /地分配网络上形成大开关电流 ,影响VLSI的可靠性和信号完整性。文中提出一种估计电源树同步切换噪声的解析方法 :利用事件驱动机制、节点重组及参数重编号技术建立切换电流传播路径 ,以二极点模型近似切换电流非线性传递过程 ,简化噪声提取程序。仿真实例表明该方法的可行性和有效性     

一种高效率低电源噪声电荷泵的设计

提出了一种高效率低电源噪声的电荷泵DC-DC转换器设计,采用多增益工作模式,可有效提高在不同输入电源电压下的效率;同时采用低噪声控制方法-线型模式控制方法,既可以减小电荷泵输出电压纹波,又可以减小电源电流纹波,降低噪声.基于CSMC 0.6 μm BiCMOS工艺,Cadence仿真结果显示,此设计降低了电源噪声,并且在不同输入电源电压下均能保持较高效率,输出轻负载(36 mA)时效率可达94%.     

小电压电源噪声的测量

影响电源噪声测试精度的有很多因素,但是最主要的因素之一是测试仪器的精度问题,而测试仪器的精度主要决定于其本身的量化误差,即ADC的位数,当前几乎所有的实时数字示波器均是8位ADC的,而力科公司最近推出了一款12位ADC的高精度实时示波器,将非常有益于高精度小信号的测试,本文将对电源噪声测试方法和测试精度问题进行讨论和分...     

电荷灵敏前置放大器消除电源噪声的设计

在高灵敏度光电探测领域,常常采用雪崩二极管(APD)等高增益探测器,这些探测器通常需要上百伏的工作电压,因此电源噪声对探测器的性能影响很大。针对单光子探测的需要,论文提出了一种电荷灵敏前置放大器消除电源噪声的设计,通过采用匹配的差分输入,可以有效抵消电源的共模噪声。论文首先对APD探测器在不同偏压下的结电容进行测试,然后采用可调电容对APD电容进行匹配,用MultiSim对提出的电路进行了仿真分析,最后制作实验电路进行了测试和验证。结果表明:差分输入电荷灵敏前置放大器能够有效消除电源噪声(包括低频噪声和高频噪声),实现高灵敏度的光探测。     

传感器电路中乘法器噪声模型分析

本文对两输入端都带噪声情况下乘法器的响应进行了理论推导,得到其噪声模型:乘法器输出噪声包括载波携带信号噪声项、信号携带载波噪声项以及噪声相乘项.设计传感器电路时,通过提高载波纯度及其幅度、在信号输入端加性能优良的带通滤波器,可以得到优异的噪声性能.本文用实验验证了该模型的正确性.     

基于宏模型的同步开关噪声仿真分析

同步开关噪声(SSN)对具有上百个输入/输出端口的高性能FPGA系统具有很大的影响,已经成为深亚微米设计所必须考虑的主要问题之一.由于没有考虑电压反馈效应,IBIS模型在仿真SSN时,总是过高估计电源噪声、地噪声和静线噪声.为提高IBIS模型仿真SSN的精度提出了一种改进的方法,利用自研发的工具SSWI(SSN simulation with IBIS)获得了自动IBIS优化模型.利用美国北卡州立大学开发的工具S2IBIS直接从SPICE模型中提取了IBIS模型,与SPICE模型仿真结果验证了该方法的有效性,采用该法可以提高IBIS模型仿真SSN的精度60%～70%.     

噪声环境下多模态函数优化的遗传算法

 针对噪声环境下多模函数的优化,本文理论上分析了噪声对多模函数优化的全局收敛性和收敛精度的影响,并通过全局区域搜索率和全局区域收敛精度分析噪声对算法的影响程度.实验结果和分析表明,增加多模函数寻优难度和噪声强度,遗传算法的全局区域搜索率都在下降,全局区域收敛精度总体变差;重采样的方法能够有效提高算法的全局区域搜索率,总体改善算法的全局区域收敛精度;确定性排挤遗传算法(Deterministic Crowding Genetic Algorithm,DCGA)和多种群遗传算法(Multi-Population Genetic Algorithm,MPGA)的全局区域搜索率和全局区域收敛精度要优于杰出保留遗传算法(Elist Genetic Algorithm,EGA).     

数字锁相环的电源噪声灵敏度分析

通过建立电源噪声影响I/O信号抖动的方法学,从而打破狭义电源完整性纯粹追求低噪声的设计思路,佐证了电源噪声灵敏度这一概念。搭建锁相环模型仿真绘制出灵敏度曲线,并通过分析,得到不同频率噪声存在互调的结论,对高速串行链路接口设计具有一定指导性意义。     

低压降CMOS稳压器的电源噪声抑制分析

通过对低压降CMOS稳压器工作原理的分析,给出了一种频域分析模型。基于此模型,对低压降稳压器的电源噪声抑制进行了分析和研究,得到了低压降稳压器在频域的传递函数;依据此传递函数,给出了改善电源噪声抑制的方法。此外,给出了几种有效提高电源噪声抑制的方法和电路。     

Jitter and phase noise of ADPLL due to PSN with deterministic frequency

In this article, jitter and phase noise of all-digital phase-locked loop due to power supply noise (PSN) with deterministic frequency are analysed. It leads to the conclusion that jitter and phase noise heavily depend on the noise frequency. Compared with jitter, phase noise is much less affected by the deterministic PSN. Our method is utilised to study a CMOS ADPLL designed and simulated in SMIC 0.13?µm standard CMOS process. A comparison between the results obtained by our method and those obtained by simulation and measurement proves the accuracy of the predicted model. When the digital controlled oscillator was corrupted by PSN with 100?mVpk-pk, the measured jitters were 33.9?ps at the rate of f_G?=?192?MHz and 148.5?ps at the rate of f_G?=?40?MHz. However, the measured phase noise was exactly the same except for two impulses appearing at 192 and 40?MHz, respectively.     

Image denoising with anisotropic bivariate shrinkage

This paper presents a novel image denoising algorithm based on the modeling of wavelet coefficients with an anisotropic bivariate Laplacian distribution function. The anisotropic bivariate Laplacian model not only captures the child-parent dependency between wavelet coefficients, but also fits the anisotropic property of the variances of wavelet coefficients in different scales of natural images. With this statistical model, we derive a closed-form anisotropic bivariate shrinkage function in the framework of Bayesian denoising and a new image denoising approach with local marginal variance estimation based on this newly derived shrinkage function is proposed in the discrete wavelet transform (DWT) domain. The proposed anisotropic bivariate shrinkage approach is also extended to the dual-tree complex wavelet transform (DT-CWT) domain to further improve the performance of image denoising. To take full advantage of DT-CWT, a more accurate noise variance estimator is proposed and the way the anisotropic bivariate shrinkage function applied to the magnitudes of DT-CWT coefficients is presented. Experiments were carried out in both the DWT and the DT-CWT domain to validate the effectiveness of the proposed method. Using a representative set of standard test images corrupted by additive white Gaussian noise, the simulation results show that the proposed method provides promising results and is competitive with the best wavelet-based denoising results reported in the literature both in terms of peak signal-to-noise ratio (PSNR) and in visual quality.     

An analytical approach to dynamic crosstalk in coupled interconnects

This paper deals with waveform analysis, crosstalk peak and delay estimation of CMOS gate driven capacitively and inductively coupled interconnects. Simultaneously switching inputs for the coupled interconnects are considered. A transmission line-based coupled model of interconnect is used for analysis. Alpha-power Law model of MOS transistor is used to represent the transistors in CMOS driver. Peaks and delays at far-end of victim line are estimated for conditions when the inputs to the two coupled interconnects are switching in-phase and out-of-phase. The comparison of analytically obtained results with SPICE simulations show that the proposed model captures noise peak and their timing; 90% propagation delay; transition time delay and waveform shape with good accuracy, such as not more than 5% error in crosstalk peak estimation.     

Parametric autofocus of SAR imaging - inherent accuracy limitations and realization

In synthetic aperture radar (SAR) imaging, low scene contrast may degrade the performance of most of the existing autofocus methods. In this paper, by dividing a slow-time signal into three isolated components, namely target, clutter, and noise, in SAR imaging, a novel parametric statistical model is proposed during the coherent processing interval. Based on the model, Cramer-Rao bounds (CRBs) of the estimation of unknown parameters are derived. It is shown that the CRBs of the target parameter estimation strongly depend on the background, i.e., clutter and noise, and the CRBs of the background parameter estimation may be obtained regardless of the target component. Motivated from this result and using the estimated background parameters, a novel effective parametric autofocus method is developed, which is applicable to any scene contrast. In addition, a preprojection is also introduced to simplify the subsequent parameter estimation. Finally, the proposed model and the novel method are illustrated by some real SAR data.     

基于NSCT域各向异性双变量萎缩图像去噪

提出了一种用各向异性双变量拉普拉斯函数模型去模拟NSCT域的系数的图像去噪算法,这种各向异性双边拉普拉斯模型不仅考虑了NSCT系数相邻尺度间的父子关系,同时满足自然图像不同尺度间NSCT系数方差具有各向异性的特征,基于这种统计模型,文中先推导出了一种各向异性双变量收缩函数的近似形式,然后基于贝叶斯去噪法和局部方差估计将这种新的阈值收缩函数应用于NSCT域,实验结果表明文中提出的方法同小波域BiShrink算法、小波域ProbShrink算法、小波域NeighShrink算法相比,能够有效地去除图像的高斯噪声,提高了图像的峰值信噪比;并较完整地保持了图像的纹理和边缘等细节信息,从而明显改善了图像的视觉效果。     

Variation aware intuitive clock gating to mitigate on-chip power supply noise

With the advent of semiconductor process technology, both the dynamic and static power consumption have become major concerns for the circuit designers. Though clock gating (CG) is a potentially accomplished technique to minimise the dynamic power, it generally fails to cut down the static power dissipation. To address the same, we have unveiled a new CG scheme incorporating leakage control transistor, which simultaneously curbs the static and dynamic power along with the alleviation of power supply noise (PSN) in silicon chips by smartly controlling the current ramp (di/dt) and average current i(t): the main contributors to PSN. The proposed CG does not only save average, dynamic and static power by 84.34%, 90.33% and 66.73%, respectively, but also reduces PSN by 84.44% with respect to its non-gated counterpart when simulated using Cadence Virtuoso® for 90 nm Generic Process Design Kit at a switching frequency of 5 GHz and power supply voltage of 1.1 V.     

高斯色噪声背景下的单通道信源数目估计算法

目前信源数目估计算法大都是基于多通道接收模型且对高斯色噪声抑制能力较差,而实际应用中单通道接收模型及色噪声环境非常普遍,因此研究色噪声背景下的单通道信源数目估计算法意义重大。针对现有算法的缺陷提出了一种基于构建信号时间快拍和四阶累积量矩阵的单通道信源数目估计算法。首先通过构建信号时间快拍实现单通道接收信号的升维得到矢量化空间,然后以此组信号空间构造出四阶累积量矩阵,并从理论上验证了该四阶累积量矩阵能有效抑制高斯白噪声及高斯色噪声的影响,最后对该矩阵进行奇异值分解并通过信息论准则估计出信源个数。仿真实验和实际信号实验都表明本文算法能较好地解决单通道信源数目估计问题,且能有效抑制高斯色噪声。      

基于光谱空间信息的高光谱遥感图像混合噪声评估

综合利用高光谱图像的光谱信息和空间信息,提出了一种新的混合噪声评估方法.首先通过滤波算法进行图像中均匀图像块的自动选取;然后利用多元线性回归模型,将均匀图像块内像素点的信号值和噪声值进行分离,并实现了图像中加性、乘性噪声的粗评估;最后根据噪声模型构建似然函数,利用最大似然估计法求解噪声模型参数.通过仿真图像和真实高光谱图像进行实验,验证了该方法的准确性和鲁棒性.     

利用信号功率谱密度的麦克风阵列噪声消除方法

本文研究了一种在背景噪声和干扰噪声存在的情况下基于麦克风阵列的噪声消除方法,具有准确的指向性。波束形成可以更好的获取指定方向的增强语音及抑制其它方向的噪声的效果。而现已存在的波束形成的方法处理后,增强之后的语音仍然会存在部分的干扰噪声。针对这样的问题,本文提出了一种利用信号功率谱密度比值的广义旁瓣消除波束形成方法来进一步实现对背景噪声和干扰噪声的抑制。此外,本文还进一步利用深度神经网络的方法,通过训练多目标函数下的掩蔽值结合最优改进对数谱幅度,做后置滤波可以更高效地对残留干扰噪声进行消除。本文中通过对比实验,比较了不同的基线方法,更好地验证了所提出算法的有效性。