Self-aligned bipolar transistors for high-performance and low-power-delay VLSI

An n-p-n bipolar transistor structure with the emitter region self-aligned to the polysilicon base contact is described. The self-alignment results in an emitter-to-base contact separation less than 0.4 µm and a collector-to-emitter area ratio about 3:1 for a two-sided base contact. This ratio can be less than 2:1 for a base contacted only on one side. The vertical doping profile can be optimized independently for high-performance and/or high-density and low-power-delay circuit applications. The technology, using recessed oxide isolation, was evaluated using 13-stage nonthreshold logic (NTL) and 11-stage merged-transition logic (MTL) ring-oscillator circuits designed with 2.5 µm design rules. For transistors with 200-nm emitter junction depth the common-emitter current gain for polysilicon emitter contact is typically 2-4 times that for Pd2Si emitter contact. There is no observable circuit performance degradation attributable to the polysilicon emitter contact. Typical observed per-stage delays were 190 ps at 1.3 mW and 120 ps at 2.3 mW for the NTL (FI = FO = 1) circuits and 1.3 ns at 0.15 mA for the MTL (FO = 4) circuits.     

Design considerations of high-performance narrow-emitter bipolar transistors

The control of the lateral diffusion of the extrinsic base is a key issue in the downscaling of high-speed bipolar transistors for achieving the lowest base resistance without altering the shallow impurity profile of the intrinsic region. This letter will present the effects of lateral encroachment of the extrinsic-base dopant on the characteristics of transistors with submicrometer emitter stripe width, measurement of the amount of encroachment, and its relationship to the vertical profile.     

DC, RF, and noise characteristics of carbon-doped base InP/InGaAsheterojunction bipolar transistors

The first successful demonstration of high-performance InP/InGaAs heterojunction bipolar transistors utilizing a highly carbon-doped base is reported. The detailed device characteristics including dc, RF, and noise performance have been investigated. For the first time base layers free of hydrogen passivation have been obtained using chemical beam epitaxy. The HBT's showed almost ideal dc characteristics; a gain independent of collector current, a near unity ideality factor, a very small offset-voltage, and a high breakdown voltage. Devices having two 1.5 μm×15 μm emitter fingers exhibited a maximum f_T of 115 GHz and f_max of 52 GHz. The device also exhibited a minimum noise figure of 3.6 dB and associated gain of 13.2 dB at a collector current level of 2 mA where a f_T of 29 GHz and f_max of 23 GHz were measured. The nearly ideal dc characteristics, excellent speed performance, and RF noise performance demonstrate the great potential of the carbon-doped base InP/InGaAs HBT's     

Lateral high-speed bipolar transistors on SOI for RF SoC applications

This paper introduces a novel silicon-on-insulator (SOI) lateral radio-frequency (RF) bipolar transistor. The fabrication process relies on polysilicon side-wall-spacer (PSWS) to self-align the base contact to the intrinsic base. The self-aligned base and emitter regions greatly reduce the parasitic components. In this unique design, the critical dimensions are not limited by lithography resolution. With the control of the SOI film thickness or SWS width, the device can be optimized for higher speed, gain, breakdown, or current drive capability. Furthermore, with no additional mask, both common-emitter and common-collector layout configurations can be realized, providing more flexibility to the circuit design and more compact layout. The experimental f/sub T//f/sub max/ of the high-speed device are 17/28 GHz, the second fastest reported f/sub T/ for lateral bipolar junction transistors (LBJT) so far. As for the high-voltage device, the measured f/sub T//f/sub max/ of 12/30 GHz and BV/sub CEO/ of over 25 V produces a Johnsons product well above 300 GHz /spl middot/V. This figure is currently the closest reported data to the Johnsons limit for lateral BJTs. This technology can easily be integrated with CMOS on SOI. Therefore, it is feasible to build fully complimentary bipolar and MOS transistors on a single SOI substrate to form a true complementary-BiCMOS process. This silicon-based lateral SOI-BJT technology is a promising candidate for realizing future RF SoC applications.     

Empirical expression for base transit time in bipolar transistors

A new and compact formula for the base transit time, τ _b , of a modern high speed npn bipolar transistor with exponential base doping profile is derived considering doping dependence of mobility, bandgap narrowing effect, high injection effect and carrier velocity saturation at the base edge of the collector–base junction. The collector current density, J _c , and minority carrier stored charge, Q _b , in the base are separately expressed as a function of the injected electron density n _o in the base in order to find an empirical expression for τ _b . The modelling of J _c , Q _b and τ _b is essential for the design of high-speed bipolar transistor. The expressions are applicable for arbitrary injection before the onset of the Kirk effect and they are simple and straight forward to give insight into device operation. The base transit time calculated analytically is compared with simulation results in order to demonstrate the validity of the assumptions made in deriving the expression. The closed form expressions for collector current density and base transit time offer a physical insight into device operation and are a useful tool in device design and optimization.     

Extrinsic base surface passivation in GaInP/GaAs heterojunctionbipolar transistors

The authors demonstrate excellent passivation of the extrinsic base surfaces in GaInP/GaAs heterojunction bipolar transistors (HBTs) having small emitter areas. Passivated devices with an area as small as 4×20 μm² exhibit the highest reported current gain value of 2690 for GaInP/GaAs HBTs, while unpassivated 4×20-μm ² devices exhibit a current gain of only 500. Measured current gains as a function of collector current density are almost identical for devices with varying emitter widths of 4, 6, 8, 12, 16, and 100 μm. The current gains are also nearly identical for devices with varying passivation ledge widths of 1, 2, 3, and 6 μm. These results are contrasted with those of a previously published study reporting surface passivation for a GaInP/GaAs HBT with a large emitter area     

Boundary condition for evaluating minority base charge in bipolar transistors

In the letter, a formula for the minority density at the boundary between the neutral base region and the collector transition region of bipolar transistors is derived. The formula is applied to the `regional? evaluation of the electron distribution in the base of a 1-dimensional n?p?n transistor. The results obtained in this way are shown to be in good agreement with those of numerical solutions of the system of differential equations formed by Poisson's law and the transport and continuity equations.     

The effects of base dopant diffusion on DC and RF characteristicsof InGaAs/InAlAs heterojunction bipolar transistors

The effects of base p-dopant diffusion at junction interfaces of InGaAs/InAlAs HBTs with thin base thicknesses and high base dopings are reported. It is shown that HBTs with compositionally graded emitter-based (E-B) junctions are very tolerant to base dopant outdiffusion into the E-B graded region. The RF performance is nearly unaffected by the diffusion, and the DC current gain and E-B junction breakdown voltages are improved with finite Be diffusion into the E-B graded region     

Silicon-germanium base heterojunction bipolar transistors bymolecular beam epitaxy

The devices were fabricated using molecular-beam epitaxy (MBE), low-temperature processing, and germanium concentrations of 0, 6%, and 12%. The transistors demonstrate current gain, and show the expected increase in collector current as a result of reduced bandgap due to Ge incorporation in the base. For a 1000-Å base device containing 12% Ge, a six-times increase in collector current was measured at room temperature, while a 1000-times increase was observed to 90 K. The temperature dependence of the collector current of the Si_0.88Ge_0.12 base transistor is consistent with a bandgap shrinkage in the base of 50 meV. For the homojunction transistors, base widths as thin as 800 Å were grown, corresponding to a neutral base width of no more than 400 Å     

Measurement of the base resistance of bipolar transistors

By measuring the transistor parameters hfe and yfb as functions of frequency, it is possible to determine the base resistance of bipolar transistors. This method has proved to be fast and accurate over a relatively large current range for integrated-circuit transistors, as well as for many types of discrete transistors.     

Silicon npn bipolar transistors with indium-implanted base regions

In this paper, silicon npn bipolar transistors with indium-implanted base regions are discussed. Polysilicon emitter bipolar transistors are fabricated using a standard 0.5-μm BIC-MOS process flow where the base BF₂ implant is replaced by an indium implant. In indium-implanted transistors, the integrated hole concentration (G_b) in the quasi-neutral base is reduced due to incomplete ionization of indium acceptor states. The novel utilization of this impurity freeze-out effect results in much increased collector currents and common-emitter transistor gains (h_fe) compared to boron-implanted transistors. Also, since indium acceptor states in depletion regions become fully ionized, the spreading of the reverse-biased collector-base junction depletion region into the transistor base (base-width modulation) is minimized. Hence, for indium base bipolar transistor an improved h_fe-V_A product is anticipated. Our first attempt at fabricating bipolar transistors with indium-implanted base regions resulted in devices with greatly increased collector current, impressive gains of h_fe≈1600, excellent collector current saturation characteristics, an Early Voltage of V_A≈10 V, h_fe-V_A product of 16000 (implying an extended device design space), base-emitter breakdown voltages of BV_EBO≈9.6 V, and a cut-off frequency of f_t=17.8 GHz     

Sub-20 ps ECL circuits with high-performance super self-alignedselectively grown SiGe base (SSSB) bipolar transistors

This paper describes a high maximum frequency of oscillation f_max self-aligned SiGe-base bipolar transistor technology, based on a self-aligned selective epitaxial growth (SEG) technology including graded Ge profile in an intrinsic base and link-base engineering using a borosilicate glass (BSG) sidewall structure. The transistor is a new self-aligned transistor, which we call a Super Self-aligned Selectively grown SiGe Base (SSSB) bipolar transistor. The 1st step of the annealing (800°C, 10 min) was performed for the diffusion of boron from the BSG film, before the deposition of an emitter polysilicon film. The 2nd step of the annealing (950°C, 10 sec) of emitter drive-in was carried out, which enabled us to obtain sufficient current gain using in-situ phosphorus doped polysilicon as an emitter electrode. Sheet resistance for a link-region more than one order lower than that of the epitaxial intrinsic base was obtained after heat treatment. Base profile (boron and Ge) design, and the 2-step annealing technique have realized cut-off frequency f_T of 51 GHz and f_max of 50 GHz. ECL circuits of 19-psec gate delay have been achieved     

Direct measurement of base drift field in bipolar transistors

The authors have developed a method to measure an effective base drift field and the base transit-time reduction factor of bipolar transistors, by measuring the excess phase of the base transport factor. This technique relies on measuring small-signal characteristics of the transistor at a low frequency and following the phase of the transconductance at the frequency approaching and exceeding the unit current gain frequency (f_T). With this technique, the authors verify that the effective drift inside the base of Si bipolar transistors decreases with increased base implantation energy and thermal treatment. Such directly measured drift-dependent base transport provides additional insight for optimizing processing used in bipolar technology development     

Transient base dynamics of bipolar transistors in high injection

The transient behavior of a bipolar transistor in high level injection is analyzed both through simulations and an analytic model based on the quasi-neutral base approximation. It is found that, unlike the situation for low injection, transient operation can be influenced by the base majority carrier mobility and by the characteristics of the extrinsic base. While the quasi-neutrality approximation frequently remains valid, cases are presented in which it fails. In these cases, the transient conditions cause at least some small region of the normally quasi-neutral base to develop a space charge. The reclaimable fraction of the stored base charge is determined and discussed     

RTS noise in submicron SiGe epitaxial base bipolar transistors

In this paper, we report a comprehensive study of Random Telegraph Signal (RTS) noise in SiGe epitaxial base bipolar transistors. We analyse the multilevel fluctuations of base and emitter forward currents before and after reverse stress on the emitter-base junction. We show the influence of the chemical treatment preceeding polysilicon emitter deposition on noise properties. We identified that RTS noise arises from different regions in the device : the silicon/polysilicon interface if an oxidizing surface preparation is used, and the emitter periphery after stress-induced degradation. Temperature and bias dependent measurements allowed us to characterize these defects (activation energy, defect type), to analyse their impact to the low frequency noise properties of these transistors and to discuss the role of hot carrier stressing.     

Non-ideal base current in bipolar transistors at low temperatures

Bipolar transistors havetraditionally been considered not useful in low-temperature applications. This assumption, however, is based upon an incomplete physical understanding of bipolar device physics at low temperatures. This paper shows experimentally that recombination mechanisms play a substantially larger role in determining base current at low temperatures than at room temperature. The results are explained and quantitatively modeled using conventional Shockley-Read-Hall theory, with the addition of the Poole-Frenkel high field effect. It is concluded that trap levels in the silicon bandgap due to bulk traps or interface states are very important in determining bipolar transistor base currents at low temperatures. Non-ideality factors larger than 2 are often observed. Such trap levels will have to be carefully controlled if low-temperature operation of bipolar transistors is to be considered.     

Fabrication and characterization of high-performance InP/InGaAsdouble-heterojunction bipolar transistors

This paper is on high-performance InP/InGaAs double-heterojunction bipolar transistors (DHBT's) utilizing compositionally step-graded InGaAsP layers between the InGaAs base and InP collector to suppress the current blocking effect. These DHBT's exhibit current gains of 200 and excellent breakdown behavior. Moreover, the DHBT's permit collector current density levels J_C up to 3×10⁵ A/cm ² at V_CE=1.5 V. A current gain cutoff frequency of 155 GHz and a maximum oscillation frequency of 90 GHz have been successfully obtained at J_C=1.6×10⁵ A/cm². We have also investigated electron transport properties in the InP collector using a set of DHBT's with different injection energies into the InP collector. By increasing the injection energies, electron velocity is found to decrease from 3.5×10⁷ cm/s to 1.6×10⁷ cm/s, due to increased population of upper valleys. This result clearly demonstrates the significant role of nonequilibrium Γ-valley transport in determining the high-speed performance of InP/InGaAs DHBT's     

Method for determining the emitter and base series resistances of bipolar transistors

A simple method for determining both the emitter and the base series resistances of bipolar transistors from the measured I - V characteristics is described. The method is based on the observation that deviation of the base current from the idealexp (qV_{BE}/kT)behavior at high currents can be attributed solely and relatively simply to series resistances. Series resistances determined by this method are given for sample high-speed digital bipolar transistors.     

Ultra-low-power and high-speed SiGe base bipolar transistors forwireless telecommunication systems

Ultra-low-power and high-speed SiGe base bipolar transistors that can be used in RF sections of multi-GHz telecommunication systems have been developed. The SiGe base and a poly-Si/SiGe base-contact were formed by selective growth in a self-aligned manner. The transistors have a very small base-collector capacitance (below 1 fF for an emitter area of 0.2×0.7 μm) and exhibit a high maximum oscillation frequency (30-70 GHz) at low current (5-100 μA). The power-delay product of an ECL ring oscillator is only 5.1 fJ/gate for a 250-mV voltage swing. The maximum toggle frequency of a one-eighth static divider is 4.7 GHz at a switching current of 68 μA/FF     

New method to determine the base resistance of bipolar transistors

A new method to determine the base resistance of bipolar transistors under forward-bias conditions is presented. Using special transistor structures, the total base resistance has been directly measured and then separated into its components, the external and internal base resistances. The sheet resistance for the internal base region can be estimated for a base-emitter voltage range of practical interest. An accurate estimation of the base resistance of advanced bipolar transistors under high-forward-bias conditions is demonstrated