Comparative Study of the Low-Frequency-Noise Behaviors in a-IGZO Thin-Film Transistors With $hbox{Al}_{2}hbox{O}_{3}$ and $hbox{Al}_{2}hbox{O}_{3}/hbox{SiN}_{x}$ Gate Dielectrics

A comparative study is made of the low-frequency noise (LFN) in amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistors (TFTs) with $hbox{Al}_{2}hbox{O}_{3}$ and $hbox{Al}_{2}hbox{O}_{3}/hbox{SiN}_{x}$ gate dielectrics. The LFN is proportional to $hbox{1}/f^{gamma}$, with $gamma sim hbox{1}$ for both devices, but the normalized noise for the $hbox{Al}_{2}hbox{O}_{3}/hbox{SiN}_{x}$ device is two to three orders of magnitude lower than that for the $hbox{Al}_{2} hbox{O}_{3}$ device. The mobility fluctuation is the dominant LFN mechanism in both devices, but the noise from the source/drain contacts becomes comparable to the intrinsic channel noise as the gate overdrive voltage increases in $hbox{Al}_{2}hbox{O}_{3}/hbox{SiN}_{x}$ devices. The $hbox{SiN}_{x}$ interfacial layer is considered to be very effective in reducing LFN by suppressing the remote phonon scattering from the $hbox{Al}_{2}hbox{O}_{3}$ dielectric. Hooge's parameter is extracted to $sim !!hbox{6.0} times hbox{10}^{-3}$ in $hbox{Al}_{2}hbox{O}_{3}/hbox{SiN}_{x}$ devices.      

High-Density and Low-Leakage-Current MIM Capacitor Using Stacked $hbox{TiO}_{2}/hbox{ZrO}_{2}$ Insulators

We have fabricated high-$kappa hbox{Ni}/hbox{TiO}_{2}/hbox{ZrO}_{2}/ hbox{TiN}$ metal–insulator–metal (MIM) capacitors. A low leakage current of $hbox{8} times hbox{10}^{-8} hbox{A/cm}^{2}$ at 125 $^{circ}hbox{C}$ was obtained with a high 38- $hbox{fF}/muhbox{m}^{2}$ capacitance density and better than the $hbox{ZrO}_{2}$ MIM capacitors. The excellent device performance is due to the lower electric field in 9.5-nm-thick $hbox{TiO}_{2}/ hbox{ZrO}_{2}$ devices to decrease the leakage current and to a higher $kappa$ value of 58 for $ hbox{TiO}_{2}$ as compared with that of $hbox{ZrO}_{2}$ to preserve the high capacitance density.      

Nonvolatile-Memory Characteristics of $hbox{AlO}^{-}$ -Implanted $hbox{Al}_{2}hbox{O}_{3}$

The nonvolatile-memory (NVM) characteristics of $hbox{AlO}^{-}$ -implanted $hbox{Al}_{2}hbox{O}_{3}$ structures are reported and shown to exhibit promising behaviors, including fast program/erase speeds and high-temperature data retention. Photoconductivity spectra show the existence of two dominant trap levels, located at around 2 and 4 eV below the conduction band minimum of $hbox{Al}_{2}hbox{O}_{3}$, and our calculations show that these levels are likely attributed to the defects in the $hbox{Al}_{2}hbox{O}_{3}$, such as the Al–O divacancy. The relative concentrations of these defects vary with the implant fluence and are shown to explain the NVM characteristics of the samples irradiated to different fluences.      

Electrical Properties of Amorphous $hbox{Bi}_{5} hbox{Nb}_{3}hbox{O}_{15}$ Thin Film for RF MIM Capacitors

Amorphous $hbox{Bi}_{5}hbox{Nb}_{3}hbox{O}_{15}(hbox{B}_{5} hbox{N}_{3})$ film grown at 300 $^{circ}hbox{C}$ showed a high-$k$ value of 71 at 100 kHz, and similar $k$ value was observed at 0.5–5.0 GHz. The 80-nm-thick film exhibited a high capacitance density of 7.8 fF/$muhbox{m}^{2}$ and a low dissipation factor of 0.95% at 100 kHz with a low leakage-current density of 1.23 nA/ $hbox{cm}^{2}$ at 1 V. The quadratic and linear voltage coefficient of capacitances of the $hbox{B}_{5}hbox{N}_{3}$ film were 438 ppm/$hbox{V}^{2}$ and 456 ppm/V, respectively, with a low temperature coefficient of capacitance of 309 ppm/$^{circ}hbox{C}$ at 100 kHz. These results confirmed the potential of the amorphous $hbox{B}_{5}hbox{N}_{3}$ film as a good candidate material for a high-performance metal–insulator–metal capacitors.      

Improvement of Resistive Switching in $hbox{Cu}_{x} hbox{O}$ Using New RESET Mode

Wide dispersions of memory switching parameters are observed in resistive random access memory based on $hbox{Al/Cu}_{x}hbox{O/Cu}$ structure. Moreover, the switching instability induced by these dispersions is studied. In this letter, a ramped-pulse series operation method is put forward, which can improve switching stability and cycling endurance remarkably. A method for minimizing the dispersion of $V_{rm reset}$ by optimizing the amplitude of pulse is proposed further. The write–read–erase–read operations can be over $hbox{8} times hbox{10}^{3}$ cycles without degradation by using the new operation mode. The role of Joule heating behind this behavior of $ hbox{Al/Cu}_{x}hbox{O/Cu}$ device is discussed.      

Lattice-Mismatched $hbox{In}_{0.4}hbox{Ga}_{0.6} hbox{As}$ Source/Drain Stressors With In Situ Doping for Strained $hbox{In}_{0.53}hbox{Ga}_{0.47}hbox{As}$ Channel n-MOSFETs

We report the first demonstration of a strained $hbox{In}_{0.53} hbox{Ga}_{0.47}hbox{As}$ channel n-MOSFET featuring in situ doped $hbox{In}_{0.4}hbox{Ga}_{0.6}hbox{As}$ source/drain (S/D) regions. The in situ silicondoped $hbox{In}_{0.4}hbox{Ga}_{0.6}hbox{As}$ S/D was formed by a recess etch and a selective epitaxy of $hbox{In}_{0.4}hbox{Ga}_{0.6}hbox{As}$ in the S/D by metal–organic chemical vapor deposition. A lattice mismatch of $sim$0.9% between $ hbox{In}_{0.53}hbox{Ga}_{0.47}hbox{As}$ and $hbox{In}_{0.4} hbox{Ga}_{0.6}hbox{As}$ S/D gives rise to lateral tensile strain and vertical compressive strain in the $hbox{In}_{0.53}hbox{Ga}_{0.47}hbox{As}$ channel region. In addition, the in situ Si-doping process increases the carrier concentration in the S/D regions for series-resistance reduction. Significant drive-current improvement over the control n-MOSFET with Si-implanted $hbox{In}_{0.53}hbox{Ga}_{0.47}hbox{As}$ S/D regions was achieved. This is attributed to both the strain-induced band-structure modification in the channel that reduces the effective electron mass along the transport direction and the reduction in the S/D series resistance.      

Extraction of the Effective Mobility of $ hbox{In}_{0.53}hbox{Ga}_{0.47}hbox{As}$ MOSFETs

The extraction of the effective mobility on $hbox{In}_{0.53} hbox{Ga}_{0.47}hbox{As}$ metal–oxide–semiconductor field-effect transistors (MOSFETs) is studied and shown to be greater than 3600 $hbox{cm}^{2}/hbox{V} cdot hbox{s}$. The removal of $C_{rm it}$ response in the split $C$–$V$ measurement of these devices is crucial to the accurate analysis of these devices. Low-temperature split $C$–$V$ can be used to freeze out the $D_{rm it}$ response to the ac signal but maintain its effect on the free carrier density through the substrate potential. Simulations that match this low-temperature data can then be “warmed up” to room temperature and an accurate measure of $Q_{rm inv}$ is achieved. These results confirm the fundamental performance advantages of $hbox{In}_{0.53}hbox{Ga}_{0.47}hbox{As}$ MOSFETs.      

Electrical Properties of $hbox{Bi}_{5}hbox{Nb}_{3} hbox{O}_{15}$ Thin Film Grown on $hbox{TiN}/hbox{SiO}_{2}/ hbox{Si}$ at Room Temperature for Metal–Insulator–Metal Capacitors

Buckling was observed in $hbox{Bi}_{5}hbox{Nb}_{3}hbox{O}_{15}$ (BiNbO) films grown on $hbox{TiN}/hbox{SiO}_{2}/hbox{Si}$ at 300 $^{circ}hbox{C}$ but not in films grown at room temperature and annealed at 350 $^{circ}hbox{C}$. The 45-nm-thick films showed a high capacitance density and a low dissipation factor of 8.81 $hbox{fF}/muhbox{m}^{2}$ and 0.97% at 100 kHz, respectively, with a low leakage current density of 3.46 $hbox{nA}/hbox{cm}^{2}$ at 2 V. The quadratic and linear voltage coefficients of capacitance of this film were 846 $hbox{ppm}/hbox{V}^{2}$ and 137 ppm/V, respectively, with a low temperature coefficient of capacitance of 226 $hbox{ppm}/^{circ}hbox{C}$ at 100 kHz. This suggests that a BiNbO film grown on a $hbox{TiN}/ hbox{SiO}_{2}/hbox{Si}$ substrate is a good candidate material for high-performance metal–insulator–metal capacitors.      

A Theoretical Comparison of the Breakdown Behavior of $hbox{In}_{0.52}hbox{Al}_{0.48}hbox{As}$ and InP Near-Infrared Single-Photon Avalanche Photodiodes

We study the breakdown characteristics and timing statistics of InP and $hbox{In}_{0.52}hbox{Al}_{0.48}hbox{As}$ single-photon avalanche photodiodes (SPADs) with avalanche widths ranging from 0.2 to 1.0 $mu{hbox {m}}$ at room temperature using a random ionization path-length model. Our results show that, for a given avalanche width, the breakdown probability of $hbox{In}_{0.52}hbox{Al}_{0.48}hbox{As}$ SPADs increases faster with overbias than InP SPADs. When we compared their timing statistics, we observed that, for a given breakdown probability, InP requires a shorter time to reach breakdown and exhibits a smaller timing jitter than $hbox{In}_{0.52}hbox{Al}_{0.48}hbox{As}$ . However, due to the lower dark count probability and faster rise in breakdown probability with overbias, $hbox{In}_{0.52}hbox{Al}_{0.48}hbox{As}$ SPADs with $hbox{avalanche} hbox{widths}leq 0.5 mu{hbox {m}}$ are more suitable for single-photon detection at telecommunication wavelengths than InP SPADs. Moreover, we predict that, in InP SPADs with $hbox{avalanche} hbox{widths}leq 0.3 mu{hbox {m}}$ and $hbox{In}_{0.52}hbox{Al}_{0.48}hbox{As}$ SPADs with $hbox{avalanche} hbox{widths}leq 0.2 mu{hbox {m}}$, the dark count probability is higher than the photon count probability for all applied biases.      

A Comparative NBTI Study of $hbox{HfO}_{2}$, $hbox{HfSiO}_{x}$, and SiON p-MOSFETs Using UF-OTF $I_{rm DLIN}$ Technique

The time, temperature, and oxide-field dependence of negative-bias temperature instability is studied in $hbox{HfO}_{2}/hbox{TiN}$, $ hbox{HfSiO}_{x}/hbox{TiN}$, and SiON/poly-Si p-MOSFETs using ultrafast on-the-fly $I_{rm DLIN}$ technique capable of providing measured degradation from very short (approximately microseconds) to long stress time. Similar to rapid thermal nitrided oxide (RTNO) SiON, $hbox{HfO}_{2}$ devices show very high temperature-independent degradation at short (submilliseconds) stress time, not observed for plasma nitrided oxide (PNO) SiON and $hbox{HfSiO}_{x}$ devices. $hbox{HfSiO}_{x}$ shows lower overall degradation, higher long-time power-law exponent, field acceleration, and temperature activation as compared to $hbox{HfO}_{2}$, which are similar to the differences between PNO and RTNO SiON devices, respectively. The difference between $ hbox{HfSiO}_{x}$ and $hbox{HfO}_{2}$ can be attributed to differences in N density in the $hbox{SiO}_{2}$ IL of these devices.      

Electrical Properties of $hbox{Ga}_{2}hbox{O}_{3}/ hbox{GaAs}$ Interfaces and GdGaO Dielectrics in GaAs-Based MOSFETs

Electrical properties of $hbox{Ga}_{2}hbox{O}_{3}/hbox{GaAs}$ interfaces with GdGaO cap dielectrics used in recent enhancement-mode GaAs-based NMOSFETs which perform in line with theoretical model predictions are presented. Capacitors with GdGaO thickness ranging from 3.0 to 18 nm ($hbox{0.9} leq hbox{EOT} leq hbox{3.9} hbox{nm}$) have been characterized by capacitance–voltage measurements. Midgap interface state density $D_{rm it}$, effective workfunction $phi_{m}$, fixed charge $Q_{f}$, dielectric constant $kappa$, and low field leakage current density are $hbox{2} times hbox{10}^{11} hbox{cm}^{-2} cdot hbox{eV}^{-1}$, 4.93 eV, $-hbox{8.9} times hbox{10}^{11} hbox{cm}^{-2}$, 19.5, and $hbox{10}^{-9}{-} hbox{10}^{-8} hbox{A/cm}^{2}$, respectively. The presence of interfacial Gd was confirmed to dramatically degrade electrical interface properties. The data illuminate the intimate interplay between heterostructure and interface engineering to achieve optimum MOSFET operation.      

0.8-V Supply Voltage Deep-Submicrometer Inversion-Mode $hbox{In}_{0.75}hbox{Ga}_{0.25}hbox{As}$ MOSFET

We report the experimental demonstration of deep-submicrometer inversion-mode $hbox{In}_{0.75}hbox{Ga}_{0.25}hbox{As}$ MOSFETs with ALD high- $k$ $hbox{Al}_{2}hbox{O}_{3}$ as gate dielectric. In this letter, n-channel MOSFETs with 100–200-nm-long gates have been fabricated. At a supply voltage of 0.8 V, the fabricated devices with 200–130-nm-long gates exhibit drain currents of 232–440 $muhbox{A}/muhbox{m}$ and transconductances of 538–705 $muhbox{S}/muhbox{m}$. The 100-nm device has a drain current of 801 $muhbox{A}/muhbox{m}$ and a transconductance of 940 $muhbox{S}/muhbox{m}$. However, the device cannot be pinched off due to severe short-channel effect. Important scaling metrics, such as on/off current ratio, subthreshold swing, and drain-induced barrier lowering, are presented, and their relations to the short-channel effect are discussed.      

High Microwave-Noise Performance of AlGaN/GaN MISHEMTs on Silicon With Gate Insulator Grown by ALD

High microwave-noise performance is realized in AlGaN/GaN metal–insulator semiconductor high-electron mobility transistors (MISHEMTs) on high-resistivity silicon substrate using atomic-layer-deposited (ALD) $hbox{Al}_{2}hbox{O}_{3}$ as gate insulator. The ALD $hbox{Al}_{2}hbox{O}_{3}/hbox{AlGaN/GaN}$ MISHEMT with a 0.25- $muhbox{m}$ gate length shows excellent microwave small signal and noise performance. A high current-gain cutoff frequency $f_{T}$ of 40 GHz and maximum oscillation frequency $f_{max}$ of 76 GHz were achieved. At 10 GHz, the device exhibits low minimum-noise figure $(hbox{NF}_{min})$ of 1.0 dB together with high associate gain $(G_{a})$ of 10.5 dB and low equivalent noise resistance $(R_{n})$ of 29.2 $Omega$. This is believed to be the first report of a 0.25-$muhbox{m}$ gate-length GaN MISHEMT on silicon with such microwave-noise performance. These results indicate that the AlGaN/GaN MISHEMT with ALD $hbox{Al}_{2}hbox{O}_{3}$ gate insulator on high-resistivity Si substrate is suitable for microwave low-noise applications.      

Gate-Recessed InAlN/GaN HEMTs on SiC Substrate With $ hbox{Al}_{2}hbox{O}_{3}$ Passivation

We studied submicrometer $(L_{G} = hbox{0.15} {-} hbox{0.25} mu hbox{m})$ gate-recessed InAlN/AlN/GaN high-electron mobility transistors (HEMTs) on SiC substrates with 25-nm $hbox{Al}_{2}hbox{O}_{3}$ passivation. The combination of a low-damage gate-recess technology and the low sheet resistance of the InAlN/AlN/GaN structure resulted in HEMTs with a maximum dc output current density of $I_{{rm DS}, max} = hbox{1.5} hbox{A/mm}$ and a record peak extrinsic transconductance of $g_{m, {rm ext}} = hbox{675} hbox{mS/mm}$. The thin $hbox{Al}_{2}hbox{O}_{3}$ passivation improved the sheet resistance and the transconductance of these devices by 15% and 25%, respectively, at the same time that it effectively suppressed current collapse.      

Low Turn-On Voltage and High-Current $hbox{InP}/ hbox{In}_{0.37}hbox{Ga}_{0.63}hbox{As}_{0.89}hbox{Sb}_{0.11}/hbox{In}_{0.53}hbox{Ga}_{0.47}hbox{As}$ Double Heterojunction Bipolar Transistors

We report on the dc and microwave characteristics of an $ hbox{InP/In}_{0.37}hbox{Ga}_{0.63}hbox{As}_{0.89}hbox{Sb}_{0.11}/hbox{In}_{0.53}hbox{Ga}_{0.47}hbox{As}$ double heterojunction bipolar transistor grown by solid-source molecular beam epitaxy. The pseudomorphic $hbox{In}_{0.37}hbox{Ga}_{0.63}hbox{As}_{0.89}hbox{Sb}_{0.11}$ base reduces the conduction band offset $Delta E_{C}$ at the emitter/base junction and the base band gap, which leads to a very low $V_{rm BE}$ turn-on voltage of 0.35 V at 1 $hbox{A/cm}^{2}$ . A current gain of 125 and a peak $f_{T}$ of 238 GHz have been obtained on the devices with an emitter size of $hbox{1}times hbox{10} muhbox{m}^{2}$, suggesting that a high collector average velocity and a high current capability are achieved due to the type-II lineup at the InGaAsSb/InGaAs base/collector junction.      

Strain Enhanced nMOS Using In Situ Doped Embedded $hbox{Si}_{1 - x}hbox{C}_{x}$ S/D Stressors With up to 1.5% Substitutional Carbon Content Grown Using a Novel Deposition Process

This letter reports on the implementation of high carbon content and high phosphorous content $hbox{Si}_{1 - x}hbox{C}_{x}$ layers in the source and drain regions of n-type MOSFET in a 65-nm-node integration scheme. The layers were grown using a novel epitaxial process. It is shown that by implementing stressors with $x approx hbox{0.01}$ , nMOSFET device performance is enhanced by up to 10%, driving 880 $mu hbox{A}/muhbox{m}$ at 1-V $V_{rm DD}$. It is also demonstrated that the successful implementation of $hbox{Si}_{1 - x} hbox{C}_{x}$ relies on the careful choice of integration and epitaxial layer parameters. There is a clear impact of the postepitaxial implantation and thermal treatment on the retained substitutional C content $([C_{rm sub}])$. Furthermore, adding a Si capping layer on top of the $hbox{Si}_{1 - x}hbox{C}_{x}$, greatly improves upon the stressors' stability during the downstream processing and the silicide sheet resistance.      

Performance Improvement of N-Type $hbox{TiO}_{x}$ Active-Channel TFTs Grown by Low-Temperature Plasma-Enhanced ALD

We report on performance improvement of $n$-type oxide–semiconductor thin-film transistors (TFTs) based on $hbox{TiO}_{x}$ active channels grown at 250 $^{circ}hbox{C}$ by plasma-enhanced atomic layer deposition. TFTs with as-grown $hbox{TiO}_{x}$ films exhibited the saturation mobility $(mu_{rm sat})$ as high as 3.2 $hbox{cm}^{2}/hbox{V}cdothbox{s}$ but suffered from the low on–off ratio $(I_{rm ON}/I_{rm OFF})$ of $hbox{2.0} times hbox{10}^{2}$. $hbox{N}_{2}hbox{O}$ plasma treatment was then attempted to improve $I_{rm ON}/I_{rm OFF}$. Upon treatment, the $hbox{TiO}_{x}$ TFTs exhibited $I_{rm ON}/I_{rm OFF}$ of $hbox{4.7} times hbox{10}^{5}$ and $mu_{rm sat}$ of 1.64 $hbox{cm}^{2}/hbox{V}cdothbox{s}$, showing a much improved performance balance and, thus, demonstrating their potentials for a wide variety of applications such as backplane technology in active-matrix displays and radio-frequency identification tags.      

Fabrication and Properties of $hbox{Pt}/hbox{Bi}_{3.15}hbox{Nd}_{0.85} hbox{Ti}_{3}hbox{O}_{12}/breakhbox{HfO}_{2}/hbox{Si}$ Structure for Ferroelectric DRAM (FEDRAM) FET

Metal–ferroelectric–insulator–semiconductor (MFIS) capacitors with 400-nm-thick $hbox{Bi}_{3.15}hbox{Nd}_{0.85}hbox{Ti}_{3}hbox{O}_{12}$ (BNdT) ferroelectric film and 4-nm-thick hafnium oxide $(hbox{HfO}_{2})$ layer on silicon substrate have been fabricated and characterized. It is demonstrated that the $hbox{Pt}/hbox{Bi}_{3.15}hbox{Nd}_{0.85}hbox{Ti}_{3}hbox{O}_{12}/ hbox{HfO}_{2}/hbox{Si}$ structure exhibits a large memory window of around 1.12 V at an operation voltage of 3.5 V. Moreover, the MFIS memory structure suffers only 10% degradation in the memory window after $hbox{10}^{10}$ switching cycles. The retention time is 100 s, which is enough for ferroelectric DRAM field-effect-transistor application. The excellent performance is attributed to the formation of well-crystallized BNdT perovskite thin film on top of the $ hbox{HfO}_{2}$ buffer layer, which serves as a good seed layer for BNdT crystallization, making the proposed $hbox{Pt}/hbox{Bi}_{3.15}hbox{Nd}_{0.85}hbox{Ti}_{3}hbox{O}_{12}/ hbox{HfO}_{2}/hbox{Si}$ suitable for high-performance ferroelectric memories.      

High-Performance $hbox{In}_{0.7}hbox{Ga}_{0.3}hbox{As}$ -Channel MOSFETs With High-$kappa$ Gate Dielectrics and $alpha$-Si Passivation

Long and short buried-channel $hbox{In}_{0.7}hbox{Ga}_{0.3}hbox{As}$ MOSFETs with and without $alpha$-Si passivation are demonstrated. Devices with $alpha$-Si passivation show much higher transconductance and an effective peak mobility of 3810 $hbox{cm}^{2}/ hbox{V} cdot hbox{s}$. Short-channel MOSFETs with a gate length of 160 nm display a current of 825 $muhbox{A}/muhbox{m}$ at $V_{g} - V_{t} = hbox{1.6} hbox{V}$ and peak transconductance of 715 $muhbox{S}/muhbox{m}$. In addition, the virtual source velocity extracted from the short-channel devices is 1.4–1.7 times higher than that of Si MOSFETs. These results indicate that the high-performance $hbox{In}_{0.7}hbox{Ga}_{0.3} hbox{As}$-channel MOSFETs passivated by an $alpha$ -Si layer are promising candidates for advanced post-Si CMOS applications.      

Effect of Oxygen Pressure on the Electrical Properties of $hbox{Bi}_{5} hbox{Nb}_{3}hbox{O}_{15}$ Films Grown by RF Magnetron Sputtering

$hbox{Bi}_{5}hbox{Nb}_{3}hbox{O}_{15} (hbox{B}_{5}hbox{N}_{3})$ films grown under a low oxygen partial pressure (OP) of 1.7 mtorr showed a high leakage current density of 0.1 $hbox{A/cm}^{2}$ at 1.0 MV/cm. However, the leakage current density decreased with increasing OP to a minimum of $hbox{5.8} times hbox{10}^{-9} hbox{A/cm}^{2}$ for the film grown under 5.1 mtorr due to the decreased number of oxygen vacancies. This film also showed an improved breakdown field of 2.2 MV/cm and a large capacitance density of 24.9 $hbox{fF}/muhbox{m}^{2}$. The electrical properties of the film, however, deteriorated with a further increase in OP, which is probably due to the formation of oxygen interstitial ions. Therefore, superior electrical properties for the $ hbox{B}_{5}hbox{N}_{3}$ film can be obtained by careful control of OP.