(100) and (111) Si MOS transistors fabricated with low growthtemperature (400°C) gate oxide by Kr/O2 microwave-excitedhigh-density plasma

A drastic reduction in the growth temperature (400°C) of highly reliable SiO₂ gate oxides grown by a Kr/O₂ microwave-excited high-density plasma technique is shown to yield MOS I-V characteristics comparable to those obtained in transistors with conventionally grown dry gate oxides at 900°C. The benefits of this technique are summarized     

Highly reliable ultrathin silicon oxide film formation at lowtemperature by oxygen radical generated in high-density krypton plasma

This paper focuses attention on electrical properties of silicon oxide films grown by oxygen radical generated in Kr/O₂ mixed high-density microwave-excited plasma at 400°C. They represent high growth rate, low activation energy, high dielectric strength, high charge-to-breakdown, and low interface trap density and bulk charge enough to replace thermally grown silicon oxide     

Effects of post-deposition anneal on the electrical properties ofSi3N4 gate dielectric

The effects of postdeposition anneal of chemical vapor deposited silicon nitride are studied. The Si₃N₄ films were in situ annealed in either H₂(2%)/O₂ at 950°C or N₂O at 950°C in a rapid thermal oxidation system. It is found that an interfacial oxide was grown at the Si₃N₄/Si interface by both postdeposition anneal conditions. This was confirmed by thickness measurement and X-ray photoelectronic spectroscopy (XPS) analysis. The devices with H₂ (2%)/O₂ anneal exhibit a lower gate leakage current and improved reliability compared to that of N₂O anneal. This improvement is attributed to a greater efficiency of generating atomic oxygen in the presence of a small amount of hydrogen, leading to the elimination of structural defects in the as-deposited Si₃N ₄ film by the atomic oxygen. Good drivability is also demonstrated on a 0.12 μm n-MOSFET device     

Uniform durable thin dielectrics prepared by rapid thermalprocessing in an N2O ambient

Thin dielectrics grown on silicon wafers by rapid thermal processing in an N₂O ambient at temperatures of 1100°C, 1150°C, and 1200°C are discussed. The resulting films, in conjunction with an O₂ ambient control were characterized by thickness measurements and electrical performance. Dielectrics formed in N₂O in this temperature range were all superior to that prepared in an O₂ ambient in terms of interface state generation and flatband voltage shift after constant current stressing. Although all N₂O prepared samples exhibited similar cross wafer electrical uniformity, higher growth temperatures favored thickness uniformity. The electrical behavior of the N₂O wafers was not strongly dependent on growth temperature; however, a 60-s 1100°C post-oxynitridation N₂ anneal was found to significantly reduce subsequent electrical performance. It is also demonstrated that under optimum process conditions, high-quality uniform dielectrics can be formed by RTP in N₂O     

Improving low-temperature APCVD SiO2 passivation byrapid thermal annealing for Si devices

The quality of low-temperature (≈400°C) atmospheric pressure chemical vapor deposited (APCVD) silicon dioxide (SiO₂ ) films has been improved by a short time rapid thermal annealing (RTA) step. The RTA step followed by a low temperature (400°C) forming gas anneal (FGA) results in a well-passivated Si-SiO₂ interface, comparable to thermally grown conventional oxides. Efficient and stable surface passivation is obtained by this technique on virgin silicon as well as on photovoltaic devices with diffused (n⁺p) emitter surface while maintaining a very low thermal budget. Device parameters are improved by this APCVD/RTA/FGA passivation process     

High performance poly-crystalline silicon thin film transistorsfabricated using remote plasma chemical vapor deposition of SiO2

A remote plasma chemical vapor deposition (RPCVD) of SiO₂ was investigated for forming an interface of SiO₂/Si at a low temperature below 300°C. A good SiO₂/Si interface was formed on Si substrates through decomposition and reaction of SiH₄ gas with oxygen radical by confining plasma using mesh plates. The density of interface traps (D_it) was as low as 3.4×10¹⁰ cm^-2eV^-1. N- and p-channel Al-gate poly-Si TFTs were fabricated at 270°C with SiO₂ films as a gate oxide formed by RPCVD and laser crystallized poly-crystalline films formed by a pulsed XeCl excimer laser. They showed good characteristics of a low threshold voltage of 1.5 V (n-channel) and -1.5 V (p-channel), and a high carrier mobility of 400 cm²/Vs     

InGaN/GaN light emitting diodes activated in O2 ambient

Mg-doped GaN epitaxial layers were annealed in pure O₂ and pure N₂. It was found that we could achieve a low-resistive p-type GaN by pure O₂ annealing at a temperature as low as 400°C. With a 500°C annealing temperature, it was found that the forward voltage and dynamic resistance of the InGaN/GaN light emitting diode (LED) annealed in pure O₂ were both smaller than those values observed from InGaN/GaN LED annealed in pure N₂. It was also found that an incomplete activation of Mg will result in a shorter LED lifetime     

Rapid thermal anneal of gate oxides for low thermal budget TFT's

The performance and reliability of deposited gate oxides for thin film transistors (TFT's) has been studied as a function of rapid thermal annealing (RTA) conditions. The effect of temperature ranging from 700 to 950°C and the annealing ambients including oxygen (O₂), argon (Ar), and nitrous oxide (N₂O) is investigated. Improvement in charge to breakdown (Q_bd) is seen starting from 700°C, with marked increase at 900°C temperature and above. The N₂O and Ar ambients result in higher Q_bd compared to O₂ ambient and we attribute this to reduced interfacial stress. Fourier Transform Infrared spectroscopy (FTIR) is used to qualitatively measure the stress. The bias temperature instability is decreased by RTA. The TFT characteristics are significantly improved with RTA gate oxide. The RTA-Ar anneal at 950°C results in the lowest trap density in TFT's as measured from charge pumping technique     

Electrical properties of low-temperature pyrolytic SiO2on InP

The first application of a new technique (SiH₄+O₂ at 83-330°C and 2-12 torr) for deposition of SiO₂ on InP is reported. SiO₂ deposited at 150-330°C has breakdown strength of 8-10 MV/cm, resistivity >10¹⁵ Ωcm, and refractive index of 1.45-1.46 comparable to thermal SiO ₂ grown at 1100°C. C/V measurements on Al/SiO₂/InP MIS structures suggest that very low temperature oxides (90-100°C) have the best interfacial properties     

Thin-gate SiO2 films formed by in situ multiple rapidthermal processing

A reliable method of forming very thin SiO₂ films (<10 nm) has been developed by rapid thermal processing (RTP) in which in situ multiple RTP sequences have been employed. Sub-10-nm-thick SiO₂ films formed by single-step RTP oxidation (RTO) are superior to conventional furnace-grown SiO₂ on the SiO₂ /Si interface characteristics, dielectric strength, and time-dependent dielectric-breakdown (TDDB) characteristics. It has been confirmed that the reliability of SiO₂ film can be improved by pre-oxidation RTP cleaning (RTC) operated at 700-900°C for 20-60 s in a 1%HCl/Ar or H₂ ambient. The authors discuss the dielectric reliability of the SiO₂ films formed by single-step RTO in comparison with conventional furnace-grown SiO₂ films. The effects and optimum conditions of RTC prior to RTO on the TDDB characteristics are demonstrated. The dielectric properties of nitrided SiO₂ films formed via the N₂O-oxynitridation process are described     

High performance low temperature polysilicon thin film transistorusing ECR plasma thermal oxide as gate insulator

Electron cyclotron resonance (ECR) plasma thermal oxide has been investigated as a gate insulator for low temperature (⩽600°C) polysilicon thin-film transistors based on solid phase crystallization (SPC) method. The ECR plasma thermal oxide films grown on a polysilicon film has a relatively smooth interface with the polysilicon film when compared with the conventional thermal oxide and it shows good electrical characteristics. The fabricated poly-Si TFT's without plasma hydrogenation exhibit field-effect mobilities of 80 (60) cm²/V·s for n-channel and 69 (48) cm²/V·s for p-channel respectively when using Si₂ H₆(SiH₄) source gas for the deposition of active poly-Si films     

Tin oxide gas sensor fabricated using CMOS micro-hotplates andin-situ processing

A monolithic tin oxide (SnO₂) gas sensor realized by commercial CMOS foundry fabrication (MOSIS) and postfabrication processing techniques is reported. The device is composed of a sensing film that is sputter-deposited on a silicon micromachined hotplate. The fabrication technique requires no masking and utilizes in situ process control and monitoring of film resistivity during film growth. Microhotplate temperature is controlled from ambient to 500°C with a thermal efficiency of 8°C/mW and thermal response time of 0.6 ms. Gas sensor responses of pure SnO₂ films to H₂ and O₂ with an operating temperature of 350°C are reported. The fabrication methodology allows integration of an array of gas sensors of various films with separate temperature control for each element in the array, and circuits for a low-cost CMOS-based gas sensor system     

Atmospheric pressure ionization mass spectroscopy for the study ofpermeation in polymeric tubing

An atmospheric pressure ionization mass spectrometer (APIMS) is used to determine the permeation coefficients for two widely used kinds of polymeric tubing, PF and Kel-F (PCTFE), at 25°C and 75°C. In the experiments, an ultra-high-purity N₂ gas flow was maintained through the test tubing. The net impurity uptake by nitrogen due to the permeation of O₂, CO₂, H₂O, and CH₄ from surrounding air into the polymeric tubing was measured by APIMS with sub-ppb sensitivities. CH₄ had the highest and O₂ had the lowest permeation coefficients. Results show that Kel-F was a superior barrier material for all impurities studied. The permeation coefficients for these polymers increased with temperature but did not change significantly with the permeant partial pressure. The permeability of PFA showed a stronger temperature dependence than that of Kel-F     

Polyoxides grown on n+ polysilicon

The polarity asymmetry on the electrical characteristics of the oxides grown on n⁺ polysilicon (polyoxides) was investigated in terms of the oxidation process, the doping level of the lower polysilicon layer, the oxidation temperature and the oxide thickness. It was found that the thin polyoxide prepared by using a low-temperature wafer loading and N₂ pre-annealing process, has a smoother polyoxide/polysilicon interface and exhibits a lower oxide tunneling current, a higher dielectric breakdown field when the top electrode is positively biased, a lower electron trapping rate and a larger charge-to-breakdown than does the normal polyoxide. The polarity asymmetry is also strongly dependent on the doping level of the lower polysilicon layer, the oxidation temperature and the oxide thickness. It was found that only the thinner polyoxides (⩽240 Å) grown on the heavily-doped polysilicon film (30 Ω/sq) by using the higher-temperature oxidation process (⩾950°C) conduct a less oxide tunneling current when the top electrode is positively biased     

Novel capacitor process using diffusion barrier rounded by Si3N4 spacer for high density FRAM device

A novel capacitor process was successfully implemented in 4 Mb FRAM device by developing a barrier layer rounded by Si₃N₄ spacer (BRS) scheme. Using this process, it is possible to eliminate an undesired barrier etching damage, which is a major role in degrading ferroelectric properties. The novel capacitor process was generated by etching an Ir barrier layer and rounding the barrier by a Si₃N₄ spacer before preparing Pb(Zr _1-xTi_x)O₃ (PZT) films. It was observed that uniform sol-gel derived PZT films were prepared on the patterned Ir substrate by using Si₃N₄ spacer, which provides a smooth edge of the patterned cell. The contact resistance between bottom electrode and polysilicon plug after full integration was monitored below 700 Ω per contact with contact size 0.6×0.6 (μm²). Compared to the ferroelectric capacitor damaged by barrier etching, the novel Pb(Zr_1-xTi_x)O₃ (PZT) capacitor exhibited a well-saturated Q-V curve. The fully processed novel capacitor having 1.2×1.2 (μm²) effective area displayed remnant polarization of 14 (μC/cm²) at an operating voltage of 3.0 V. The BRS ferroelectric capacitor showed a reliable retention property until 100 h at 125°C. Same state retention (Qss) was stable with time up to 100 h while opposite state retention (Qos) showed a log-linear decay rate at 125°C thermal stress     

The characteristics of polysilicon oxide grown in pureN2O

This work reports on the characteristics of polysilicon oxide grown in pure N₂O (N₂O-grown polyoxide). The obtained polyoxide has a desirable polarity asymmetry of J-E characteristic, i.e., a lower leakage current and a higher breakdown electric field, which are ideal for the nonvolatile memory application, when the top electrode is positively biased. The asymmetry is due to the smoother surface of the N₂O-grown polyoxide. Comparing to conventional polyoxides, the N₂O-grown polyoxide has a lower electron trapping rate and a larger Q_bd, which are attributed to the incorporated nitrogen at the polyoxide/poly-1 interface. The centroids of trapped charges of the N₂O-grown polyoxide are more away from the polyoxide/poly-1 interface and this affects the polarity dependence of trapping     

Effect of bottom electrode materials on the electrical andreliability characteristics of (Ba, Sr)TiO3 capacitors

The dielectric constant and the leakage current density of (Ba, Sr)TiO₃ (BST) thin films deposited on various bottom electrode materials (Pt, Ir, IrO₂/Ir, Ru, RuO₂/Ru) before and after annealing in O₂ ambient were investigated. The improvement of crystallinity of BST films deposited on various bottom electrodes was observed after the postannealing process. The dielectric constant and leakage current of the films mere also strongly dependent on the postannealing conditions. BST thin film deposited on Ir bottom electrode at 500°C, after 700°C annealing in O₂ for 20 min, has the dielectric constant of 593, a loss tangent of 0.019 at 100 kHz, a leakage current density of 1.9×10 ^-8 A/cm² at an electric field of 200 kV/cm with a delay time of 30 s, and a charge storage density of 53 fC/μm² at an applied field of 100 kV/cm. The BST films deposited on Ir with post-annealing can obtain better dielectric properties than on other bottom electrodes in our experiments. And Ru electrode is unstable because the interdiffusion of Ru and Ti occurs at the interface between the BST and Ru after postannealing. The ten year lifetime of time-dependent dielectric breakdown (TDDB) studies indicate that BST on Pt, Ir, IrO₂/Ir, Ru, and RuO₂/Ru have long lifetimes over ten gears on operation at the voltage bias of 2 V     

Interface characteristics of selective tungsten on silicon using anew pretreatment technology for ULSI application

The characteristics of selective tungsten film on silicon strongly depend on the surface properties of the underlying substrate. In this work, a new pretreatment process prior to selective tungsten film deposition has been developed. A CF₄/O₂ mixed plasma modification procedure and a subsequent O₂ plasma ashing step combine to achieve efficient surface precleaning. The damage and contamination induced by reactive ion etching (RIE) are thus eliminated. Concurrently, a subsequent anhydrous HF cleaning was used to remove the native oxide on silicon as well as to obtain a fluorine-passivated silicon surface which can avoid reoxidation during the transport of wafers. This new pretreatment technology produces tungsten films that retain superior physical properties within the aspects of deposition rate, film morphology, and selectivity. Also, excellent interface characteristics with low silicon consumption, low contact resistance, low contact leakage current, and fewer impurities of fluorine, oxygen, and carbon within the interfacial region are obtained     

Effects of growth temperature on TDDB characteristics of N2O-grown oxides

Effects of oxide growth temperature on time-dependent dielectric breakdown (TDDB) characteristics of thin (115 Å) N₂O-grown oxides are investigated and compared with those for conventional O₂-grown SiO₂ films with identical thickness. Results show that TDDB characteristics of N₂O oxides are strongly dependent on the growth temperature and, unlike conventional SiO₂, TDDB properties are much degraded for N ₂O oxides with an increase in growth temperature. Large undulations at the Si/SiO₂ interface, caused by locally retarded oxide growth due to interfacial nitrogen, are suggested as a likely cause of degradation of TDDB characteristics in N₂O oxides grown at higher temperatures     

Low-threshold current, high-efficiency 1.3-μm wavelengthaluminum-free InGaAsN-based quantum-well lasers

We demonstrate high-performance Al-free InGaAsN-GaAs-InGaP-based long-wavelength quantum-well (QW) lasers grown on GaAs substrates by gas-source molecular beam epitaxy using a RF plasma nitrogen source. Continuous wave (CW) operation of InGaAsN-GaAs QW lasers is demonstrated at λ=1.3 μm at a threshold current density of only J_TH =1.32 kA/cm². These narrow ridge (W=8.5 μm) lasers also exhibit an internal loss of only 3.1 cm^-1 and an internal efficiency of 60%. Also, a characteristic temperature of T₀=150 K from 10°C to 60°C was measured, representing a significant improvement over conventional λ=1.3 μm InGaAsP-InP lasers. Under pulsed operation, a record high maximum operating temperature of 125°C and output powers greater than 300 mW (pulsed) and 120 mW (CW) were also achieved