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1.
采用射频磁控溅射方法,在P型硅基片上制备了非晶掺氮氧化铟锌沟道层及其薄膜晶体管(a-IZO∶N-TFTs)器件,探讨了氮气对a-IZO∶N-TFTs性能和电学稳定性的影响。研究发现,当沉积过程中的氮气流量增加时,a-IZO∶N-TFTs的阈值电压(Vth)不断右移,说明氮气掺杂有效抑制了器件的载流子浓度。在对a-IZO∶N-TFTs进行0~5400 s的栅极正偏压应力测试中发现,通入4 m L/min(标准状态)的氮气能使Vth的变化量从3.77下降到0.72 V,表明氮气掺杂提高了a-IZO∶NTFTs的电学稳定性。然而,同时发现过量掺杂氮气也会造成新的氮相关缺陷从而降低器件的稳定性。  相似文献   

2.
采用直流反应磁控溅射In/Zn合金靶材在室温下制备了非晶掺锌氧化铟(a-IZO)薄膜,作为沟道层应用于氧化物薄膜晶体管。通过在沉积过程中适当调节氧气压强,制备的a-IZO薄膜的电阻率可具有10-3~106Ω.cm即109倍的变化范围。在氧气压强Po2=5×10-2Pa制备的薄膜,其可见光范围平均透射率大于85%。试制了基于a-IZO薄膜沟道层的顶栅结构的氧化物薄膜晶体管。测试表明该薄膜晶体管工作在n型沟道增强模式,场效应迁移率为4.25 cm2V-1s-1,电流开关比约为103。实验结果预示a-IZO薄膜在TFT-LCD和AMOLED等平板显示领域具有应用前景。  相似文献   

3.
采用射频磁控溅射法制备了非晶铟锌钨氧化物(a-IZWO)薄膜和以此半导体薄膜为沟道层的薄膜晶体管。研究了沟道宽长比和退火时间对器件电学性能的影响。结果表明,沟道宽长比为400μm:400μm的器件经过120min200℃空气退火后其电学性能达到最佳,场效应迁移率达到7.29 cm^2/Vs,阈值电压为-2.86 V,电流开关比超过10~7,亚阈值摆幅低至0.13 V/decade。偏压稳定性测试结果证实了器件的偏压稳定性主要受到沟道层缺陷、背沟道表面氧离子和H_2O^+离子吸附等因素的影响。随着器件沟道宽长比不断增大,退火时间不断延长,器件受到这些因素的影响变小,稳定性越来越好。  相似文献   

4.
采用射频磁控溅射法制备了非晶铟锌钨氧化物(a-IZWO)薄膜和以此半导体薄膜为沟道层的薄膜晶体管。研究了沟道宽长比和退火时间对器件电学性能的影响。结果表明,沟道宽长比为400μm:400μm的器件经过120min200℃空气退火后其电学性能达到最佳,场效应迁移率达到7.29 cm~2/Vs,阈值电压为-2.86 V,电流开关比超过10~7,亚阈值摆幅低至0.13 V/decade。偏压稳定性测试结果证实了器件的偏压稳定性主要受到沟道层缺陷、背沟道表面氧离子和H_2O~+离子吸附等因素的影响。随着器件沟道宽长比不断增大,退火时间不断延长,器件受到这些因素的影响变小,稳定性越来越好。  相似文献   

5.
碳纳米管场效应晶体管电子输运性质是其结构参量(纵向结构参量:如CNT的直径、栅介质层厚度、介质介电常数等;横向结构参量:如沟道长度、源/漏区掺杂浓度等)的复杂函数.本论文在量子力学非平衡格林函数理论框架内,通过自洽求解泊松方程和薛定谔方程以得到MOS-CNTFET电子输运特性.在此基础上系统地研究了沟道长度及源/漏区掺杂浓度对MOS-CNTFET器件的漏极导通电流、关态泄漏电流、开关态电流比、阈值电压、亚阈值摆幅及双极性传导等输运性质的影响.结果表明:当沟道长度在15 nm以上时,上述各性质受沟道长度的影响均较小,而导通电流、开关态电流比及双极性传导特性与源/漏掺杂浓度的大小有关,开关态电流比与掺杂浓度正相关,导通电流及双极性导电特性与源/漏掺杂浓度负相关.当沟道长度小于15 nm时,随沟道长度减小,漏极导通电流呈增加趋势,但同时导致器件阈值电压及开关电流比减小,关态漏电流及亚阈值摆幅增大且双极性传导现象严重,短沟道效应增强,此时,通过适当降低源/漏掺杂区掺杂浓度,可一定程度地减弱MOS-CNTFET器件短沟道效应.  相似文献   

6.
通过磁控溅射方法制备一种新型薄膜晶体管有源层材料Nb掺杂的氧化铟锌(IZO)非晶薄膜(a-INZO)。运用XRD、光致发光、Hall测试等检测方法分析INZO薄膜微观结构、缺陷状态以及电学性能。光致发光结果表明,INZO相较于Ga掺杂的IZO(IGZO)具有更低的深能级缺陷密度。Hall效应测试结果表明,通过调节溅射过程中氧气流量可有效控制INZO薄膜载流子浓度,使之适合于制备薄膜晶体管(TFT)器件。INZO薄膜迁移率随载流子浓度的变化规律符合渗流传导模型,载流子浓度较低时,迁移率随载流子浓度增加而增加;载流子浓度较高时,迁移率下降,光学数据的分析表明其带尾态宽度较大,结构更无序。提高溅射基底温度可有效提高迁移率,但对薄膜无序度的改善并不明显。  相似文献   

7.
在重掺杂的Si衬底上分别制备了底电极(Bottom—contact organic thin—film transistors,BCOTFYs)和顶电极(Top—contact organic thin—film transistors,TC—OTFYs)有机薄膜场效应晶体管,探讨了源、漏电极位置对器件性能的影响。结果表明,顶电极可以形成良好的欧姆接触,其器件的迁移率和开关电流比均高出BC—OTFYs器件三个数量级。研究了栅绝缘层的薄膜厚度对器件的电性能的影响。结果表明,在相同电压下,薄的绝缘层增大了沟道区域的电场,可积累更多的电荷,以填充更多的陷阱,使器件的场效应迁移率和工作电流得到了明显的提高。  相似文献   

8.
过渡金属二硫属化物在电学、光学和机械电子领域展示了强大的应用潜力和价值.其中,二硫化钼作为场效应晶体管中绝缘栅极材料和沟道材料,得到了越来越多的关注.本文研究了基于场效应晶体管原理制备而成的多层二硫化钼光电探测器.通过光学显微镜和原子力显微镜表征了该器件的表面形貌,同时研究了该器件基于场效应晶体管的电学特性和作为光电探测器的光电特性.该器件中,二硫化钼的电子迁移率达到了80 cm2/(V·s),最高探测光电响应为5 A/W.该光电探测器的探测波长极广,并且在所有测试过程中器件稳定性优良.  相似文献   

9.
论述了45~32nm技术节点下高K材料取代SiO2的必要性和基本要求,综述了高K栅介质中极具代表性的Hf基材料.研究表明,向HfO2中分别掺杂Al、si、Ta、N等形成的复合Hf基高K栅介质材料具备较Hfo2更加优异的物理结构、晶化温度、热力学稳定性以及电学特性,但与此同时也存在如何优化掺杂量、沟道载流子迁移率下降以及中间层引起的界面退化等难题.针对这些挑战,探讨了新型"堆垛结构"和引起载流子迁移率下降的物理机制,展望了高K材料在未来先进COMS器件中的应用.  相似文献   

10.
作为神经形态计算系统的基本组成单元,人工突触器件在高性能并行计算、人工智能和自适应学习方面具有巨大的应用潜力。其中,电解质栅突触晶体管(Electrolyte-gated synaptic transistors, EGSTs)以其沟道电导的可控性成为下一代神经形态器件被广泛研究的对象,并用来模拟神经突触功能。EGSTs因双电层的快速自放电效应,导致其存在长程塑性持续时间较短和沟道电导不易调控等问题。本研究采用水诱导的In2O3薄膜作为沟道材料,以壳聚糖作为栅电解质材料,制备了基于In2O3的EGSTs,并对器件沟道层进行了氧等离子体处理。研究发现,利用氧等离子体中的活性氧自由基在沟道层表面产生陷阱态,使更多氢离子在电解质/沟道界面处被俘获,器件性能表现为回滞窗口增大,对EGSTs器件的长程塑性实现调控。基于双电层的静电耦合效应和电化学掺杂效应,本研究利用EGSTs器件模拟了神经突触的兴奋性突触后电流(EPSC)、双脉冲易化(PPF)、短程塑性(STP)和长程塑性(LTP)等突触行为。同时,基于该器...  相似文献   

11.
Presented in this study are the results of an experiment that was performed regarding the effects of plasma post-treatment on the material properties of amorphous indium zinc oxide (a-IZO) films, and on the device characteristics of the thin film transistor when an a-IZO film is used as the channel layer. Prior to the source/drain deposition, post-treatment was performed on the area that was not covered by photoresist (PR), using Ar and H2 plasma. The electrical resistivity of a-IZO films was dramatically reduced when they were plasma-treated. The creation of an oxygen vacancy and the formation of hydroxyls in the a-IZO film due to plasma treatment were identified via X-ray photoelectron spectroscopy (XPS) analysis. The change in the field effect mobility (μFE) due to the plasma post-treatment was inversely proportional to the change in the contact resistance (RC) of the plasma-treated a-IZO layer. The prolonged (> 1 min) treatment using H2 plasma caused deep electron traps and surface damages, resulting in the increased RC (or decreased μFE) of the a-IZO TFT. In addition, for the a-IZO TFT that underwent H2 plasma treatment, the VT monotonically decreased whereas the VT of the a-IZO TFT that was Ar-plasma-treated remained almost the same as that of the untreated a-IZO TFT.  相似文献   

12.
Chemically deposited lead sulfide (PbS) thin films were used as the semiconductor active layer in common-gated thin film transistors. The PbS films were deposited at room temperature on SiO2/Si-p wafers. Lift-off was used to define source and drain contacts (gold, Au) on top of the PbS layer with channel lengths ranging from 10 to 80 μm. The Si-p wafer with a back chromium-gold contact served as the common gate for the transistors. Experimental results show that as-deposited PbS are p-type in character and the devices exhibit typical drain current versus source-drain voltage (IDS-VDS) behavior as a function of gate voltage. The values of threshold voltage of the devices were in the range from −7.8 to 1.0 V, depending on the channel length. Channel mobility was approximately 10− 4 cm2V− 1 s− 1. The low channel mobility in the devices is attributed to the influence of the microstructure of the nanocrystalline thin films. The electrical performance of the PbS-based devices was improved by thermal annealing the devices in forming gas at 250 °C. In particular, channel mobility increased and threshold voltage decreased as a consequence of the thermal annealing.  相似文献   

13.
Jong Hoon Kim 《Thin solid films》2008,516(7):1529-1532
Coplanar type transparent thin film transistors (TFTs) have been fabricated on the glass substrates. The devices consist of intrinsic ZnO, Ga doped ZnO (GZO), and amorphous HfO2 for the semiconductor active channel layer, electrode, and gate insulator, respectively. GZO and HfO2 layers were prepared by using a pulsed laser deposition (PLD) and intrinsic ZnO layers were fabricated by using an rf-magnetron sputtering. The transparent TFT exhibits n-channel, enhancement mode behavior. The field effect mobility, threshold voltage, and a drain current on-to-off ratio were measured to be 14.7 cm2/Vs, 2 V, and 105, respectively. High optical transmittance (> 85%) in visible region makes ZnO TFTs attractive for transparent electronics.  相似文献   

14.
石墨烯具有较高的透过率及良好的电导率, 作为透明导电薄膜具有潜在的应用价值。首先在石英基底上引入SiO2纳米球阵列结构作为光学减反射层, 使石英基底可见光区光学透过率从93.2%增加到99.0%。然后利用常压化学气相沉积方法, 通过基底表面铜颗粒远程催化碳源, 直接在减反层上可控制备具有石墨烯/纳米减反结构的新型复合透明导电薄膜。通过去除SiO2纳米球阵列结构形成反相复制的石墨烯空心球阵列结构, 且生长时间10 min时, 对应半高宽约40 cm-1, I2D/IG = 2.31, ID/IG = 0.77, 证明在SiO2纳米球阵列减反结构上制备了低缺陷且连续的全包覆少层石墨烯薄膜。引入SiO2纳米球阵列减反结构后, 其在可见光区光学550 nm波长处的透过率平均提高了5.5%, 方块电阻相对无减反射层基底平均降低了20.09%。本研究方法避免了复杂的转移工序, 减少了对石墨烯的损失与破坏, 同时实现了高透光性及高导电性的功能协同, 在光伏器件、平板显示等领域展示出更大的应用前景。  相似文献   

15.
The thin film transistors (TFTs) based on nitrogen doped zinc oxide (ZnO) were investigated by laser molecular beam epitaxy. The increase of ZnO films' resistivity by nitrogen doping was found and applied in enhancement mode ZnO-TFTs. The ZnO-TFTs with a conventional bottom-gate structure were fabricated on thermally oxidized p-type silicon substrate. Electrical measurement has revealed that the devices operate as an n-channel enhancement mode and exhibit an on/off ratio of 104. The threshold voltage is 5.15 V. The channel mobility on the order of 2.66 cm2 V− 1 s− 1 has been determined.  相似文献   

16.
多晶硅薄膜的表面处理工艺   总被引:2,自引:0,他引:2  
采用NH3和N2O的等离子体分别对p-Si(多晶硅)薄膜表面进行了钝化处理,处理后的p-Si TFT(薄膜晶体管)具有比未处理FTF更优越的性能,通电试验与热应力试验后,处理后的器件呈现出更好的承受电负荷和热应力能力,钝化的微观机理是NH3和N2O等离子体中和了p-Si薄膜的悬挂键,形成牢固的Si-N键,减少了表面态密度。  相似文献   

17.
We report on the growth of p-type ZnO thin films with improved stability on various substrates and study the photoconductive property of the p-type ZnO films. The nitrogen doped ZnO (N:ZnO) thin films were grown on Si, quartz and alumina substrates by radio frequency magnetron sputtering followed by thermal annealing. Structural studies show that the N:ZnO films possess high crystallinity with c-axis orientation. The as-grown films possess higher lattice constants compared to the undoped films. Besides the high crystallinity, the Raman spectra show clear evidence of nitrogen incorporation in the doped ZnO lattice. A strong UV photoluminescence emission at ~ 380 nm is observed from all the N:ZnO thin films. Prior to post-deposition annealing, p-type conductivity was found to be unstable at room temperature. Post-growth annealing of N:ZnO film on Si substrate shows a relatively stable p-type ZnO with room temperature resistivity of 0.2 Ω cm, Hall mobility of 58 cm2/V s and hole concentration of 1.95 × 1017 cm− 3. A homo-junction p-n diode fabricated on the annealed p-type ZnO layer showed rectification behavior in the current-voltage characteristics demonstrating the p-type conduction of the doped layer. Doped ZnO films (annealed) show more than two orders of magnitude enhancement in the photoconductivity as compared to that of the undoped film. The transient photoconductivity measurement with UV light illumination on the doped ZnO film shows a slow photoresponse with bi-exponential growth and bi-exponential decay behaviors. Mechanism of improved photoconductivity and slow photoresponse is discussed based on high mobility of carriers and photodesorption of oxygen molecules in the N:ZnO film, respectively.  相似文献   

18.
In this work we have grown CdS thin films using an ammonia-free chemical bath deposition process for the active layer in thin film transistors. The CdS films were deposited substituting sodium citrate for ammonia as the complexing agent. The electrical characterization of the as-deposited CdS-based thin film transistors shows that the field effect mobility and threshold voltage were in the range of 0.12-0.16 cm2V−1 s−1 and 8.8-25 V, respectively, depending on the channel length. The device performance was improved considerably after thermal annealing in forming gas at 250 °C for 1 h. The mobility of the annealed devices increased to 4.8-8.8 cm2V−1 s−1 and the threshold voltage decreased to 8.4-12 V. Ion/Ioff for the annealed devices was approximately 105-106.  相似文献   

19.
PdSe2薄膜主要通过机械剥离法和气相沉积法制得,本研究采用一种简单有效的可在SiO2/Si衬底上制备PdSe2薄膜的方法.通过高真空磁控溅射技术在SiO2/Si衬底上沉积一层Pd金属薄膜,将Pd金属薄膜与Se粉封在高真空的石英管中并在一定的温度下进行硒化,获得PdSe2薄膜.根据截面高分辨透射电镜(HRTEM)照片可...  相似文献   

20.
Heavily doped metal oxide semiconductors are being developed as thin film transparent electrodes for many applications and their deposition at low substrate temperature can extend the use on heat sensitive devices. The structural and electro-optical characteristics of such metal oxide coatings are tightly related and depend on the specific deposition parameters apart from the material composition. In this work, SnO2:Sb (ATO) and ZnO:Al (AZO) thin films have been prepared by sputtering at room temperature on glass substrates, changing the deposition time to obtain various layer thicknesses from 0.2 to 0.9 μm; and they have been analyzed by X-ray diffraction, spectrophotometry, and Hall-effect measurements. ATO samples crystallize in the tetragonal structure with mean crystallite size increasing from 8 to 20 nm when the film thickness grows. The comparison of Hall mobility and optical mobility values indicates a significant contribution of grain boundary scattering for these ATO layers. Otherwise, AZO films show larger crystallites (21–27 nm) and a strong preferential orientation for analogous thickness increment, resulting in a lower contribution of the grain boundary scattering to the overall Hall mobility. The in-grain mobility for each sample is also related to the respective crystallite size and carrier concentration values.  相似文献   

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