Three-State Quantum Dot Gate FETs Using ZnS-ZnMgS Lattice-Matched Gate Insulator on Silicon

This paper presents the three-state behavior of quantum dot gate field-effect transistors (FETs). GeO _x -cladded Ge quantum dots (QDs) are site-specifically self-assembled over lattice-matched ZnS-ZnMgS high-κ gate insulator layers grown by metalorganic chemical vapor deposition (MOCVD) on silicon substrates. A model of three-state behavior manifested in the transfer characteristics due to the quantum dot gate is also presented. The model is based on the transfer of carriers from the inversion channel to two layers of cladded GeO _x -Ge quantum dots.     

Novel Multistate Quantum Dot Gate FETs Using SiO2 and Lattice-Matched ZnS-ZnMgS-ZnS as Gate Insulators

Multistate behavior has been achieved in quantum dot gate field-effect transistor (QDGFET) configurations using either SiO _x -cladded Si or GeO _x -cladded Ge quantum dots (QDs) with asymmetric dot sizes. An alternative method is to use both SiO _x -cladded Si and GeO _x -cladded Ge QDs in QDGFETs. In this paper, we present experimental verification of four-state behavior observed in a QDGFET with cladded Si and Ge dots site-specifically self-assembled in the gate region over a thin SiO₂ tunnel layer on a Si substrate. This paper also investigates the use of lattice-matched high-κ ZnS-ZnMgS-ZnS layers as a gate insulator in mixed-dot Si QDGFETs. Quantum-mechanical simulation of the transfer characteristic (I _D–V _G) shows four-state behavior with two intermediate states between the conventional ON and OFF states.     

p-Si TFT栅绝缘层用SiN薄膜的研究

以NH3和SiH4为反应源气体,采用射频等离子体增强化学气相沉积(RF-PECVD)法在多晶硅(p-Si)衬底上沉积了一系列SiN薄膜,并利用椭圆偏振测厚仪、超高电阻-微电流计、C-V测试仪对所沉积的薄膜作了相关性能测试.系统分析了沉积温度和射频功率对SiN薄膜的相对介电常数、电学性能及界面特性的影响.分析表明,沉积温度和射频功率主要是通过影响SiN薄膜中的Si/N比影响薄膜的性能,在制备高质量的p-Si TFT栅绝缘层用SiN薄膜方面具有重要的参考价值.     

Quantum Dot Gate Three-State and Nonvolatile Memory Field-Effect Transistors Using a ZnS/ZnMgS/ZnS Heteroepitaxial Stack as a Tunnel Insulator on Silicon-on-Insulator Substrates

This paper describes the use of II–VI lattice-matched gate insulators in quantum dot gate three-state and flash nonvolatile memory structures. Using silicon-on-insulator wafers we have fabricated GeO _x -cladded Ge quantum dot (QD) floating gate nonvolatile memory field-effect transistor devices using ZnS-Zn_0.95Mg_0.05S-ZnS tunneling layers. The II–VI heteroepitaxial stack is nearly lattice-matched and is grown using metalorganic chemical vapor deposition on a silicon channel. This stack reduces the interface state density, improving threshold voltage variation, particularly in sub-22-nm devices. Simulations using self-consistent solutions of the Poisson and Schrödinger equations show the transfer of charge to the QD layers in three-state as well as nonvolatile memory cells.     

p-Si TFT栅绝缘层用SiNx薄膜界面特性的研究

以NH3和SiH4为反应源气体,在低温下采用射频等离子体增强化学气相沉积(RF-PECVD)法在多晶硅(p-Si)衬底上沉积了SiNx薄膜.系统地分析讨论了沉积温度、射频功率、反应源气体流量比对SiNx薄膜界面特性的影响.分析表明,沉积温度和射频功率主要是通过影响SiNx薄膜中的si/N比和H含量影响薄膜的界面特性,而NH3/SiH4流量比则主要通过影响薄膜中的H含量影响薄膜界面特性.实验制备的SiNx薄膜层中的固定电荷密度、可动离子密度、SiNx与p-si之间的界面态密度分别达到了1.7×1012/cm2、1.4×1012/cm2、3.5×1012/(eV·cm2),其界面特性达到了制备高质量p-si TFT栅绝缘层的性能要求.     

具有L型栅极场板的双槽双栅绝缘体上硅器件新结构

为了降低绝缘体上硅（SOI）功率器件的比导通电阻,同时提高击穿电压,利用场板（FP）技术,提出了一种具有L型栅极场板的双槽双栅SOI器件新结构.在双槽结构的基础上,在氧化槽中形成第二栅极,并延伸形成L型栅极场板.漂移区引入的氧化槽折叠了漂移区长度,提高了击穿电压;对称的双栅结构形成双导电沟道,加宽了电流纵向传输面积,使比导通电阻显著降低;L型场板对漂移区电场进行重塑,使漂移区浓度大幅度增加,比导通电阻进一步降低.仿真结果表明：在保证最高优值条件下,相比传统SOI结构,器件尺寸相同时,新结构的击穿电压提高了123%,比导通电阻降低了32%;击穿电压相同时,新结构的比导通电阻降低了87.5%;相比双槽SOI结构,器件尺寸相同时,新结构不仅保持了双槽结构的高压特性,而且比导通电阻降低了46%.     

Modeling of Nonvolatile Quantum Dot Gate Structures Operating at Millimeter Wave Frequencies for Memory Applications

This paper models electrical characteristics of quantum dot nonvolatile memory cells during READ and WRITE operations. Capacitance-voltage characteristics are calculated by self-consistently solving the Schrodinger and Poisson equations. The memory access time for a 32 kb NOR array is 73 ps, which reduces to 13 ps in lightly-doped sheath (LDS) structures. The results show that a change in the quantum dot charge has a strong effect on drain to source current. The calculated cutoff frequency f _T is 135 GHz for a 0.1 μm channel length Si field-effect memory structures. The application of a quantum dot memory cell as a programmable resistor in RF circuits is presented. By changing the quantum dot charge, the resistor values can be changed by 25%.     

Fabrication and Simulation of an Indium Gallium Arsenide Quantum-Dot-Gate Field-Effect Transistor (QDG-FET) with ZnMgS as a Tunnel Gate Insulator

An indium gallium arsenide quantum-dot-gate field-effect transistor using Zn_0.95Mg_0.05S as the gate insulator is presented in this paper, showing three output states which can be used in multibit logic applications. The spatial wavefunction switching effect in this transistor has been investigated, and modeling simulations have shown supporting evidence that additional output states can be achieved in one transistor.     

发展中的SiCOI技术

SiCOI技术是SiC材料与SOI技术结合而形成的一种新的微电子技术，它的产生与发展不仅推动SIC半导体技术的发展，还将弥补SI SOI技术应用的局限性，并将在高温、高频、大功率、抗辐射等电子学领域得到应用的发展。文章介绍了近年来SiCOI技术的最新进展和简要评述。     

非对称量子点中强耦合磁极化子的性质

采用线性组合算符和幺正变换方法研究了非对称量子点中强耦合磁极化子的性质。导出了非对称量子点中强耦合磁极化子的振动频率和基态结合能随量子点的横向和纵向有效受限长度、磁场的回旋频率和电子-声子耦合强度的变化关系。数值计算结果表明:非对称量子点中强耦合磁极化子的振动频率和基态结合能随量子点的横向和纵向有效受限长度的减小而迅速增大,表现出奇特的量子尺寸效应。振动频率和基态结合能随回旋频率的增加而增大,随电子-声子耦合强度的增加而增大。     

Passivation of a (100) Silicon Surface by Silicon Dioxide Grown in Nitric Acid

This letter investigates silicon dioxide layers grown at low temperature in concentrated nitric acid using a two-step process developed by Imai for thin-film transistors. With photoconductance measurements, we find that, prior to an anneal, nitric acid oxidation does not passivate the silicon surface, but, after a 30-min nitrogen anneal at 1100 $^{circ}hbox{C}$, a surface recombination velocity (SRV) of 107 cm/s (at $Delta n = hbox{10}^{15} hbox{cm}^{-3}$ ) is attained on 1-$Omegacdothbox{cm}$ n-type silicon. The SRV is further decreased to 42 cm/s after a 30-min forming gas anneal (FGA) at 400 $^{circ}hbox{C}$, which is equivalent to a thermal oxide under similar annealing conditions, although it is not stable and returns to its pre-FGA state over time. Capacitance–voltage and photoconductance measurements suggest that the oxides contain a high positive fixed charge—particularly after a 1100 $^{circ}hbox{C} hbox{N}_{2}$ anneal—which aids the passivation of n-type and intrinsic silicon but harms the passivation of low-resistivity p-type silicon.      

抗反射条定域再结晶方法在SOI技术中的应用

对Si_3N_4/SiO_2/Si多层膜系统对Ar~+激光的反射率进行了模型计算,设计了各种结构的抗反射条并且用CW—Ar~+激光对两种结构进行了再结晶实验研究。通过实验,确定了最佳的抗反射膜结构和条宽。用这种结构可以很好地将晶界限制在低反射区。实验结果支持了计算模型和设计。在设定的区域(500μm×300μm)范围内可以得到无晶界的条形薄膜(由光刻决定条的位置)。把MOSFET的栅区制作在膜的无晶介条上,测量得到表面电子和空穴迁移率分别为(μ-)_n=630cm~2/V·S·(μ-)_p=143cm~2/V·S;NMOS与PMOS管单位沟道宽度的沟道漏电流分别为I_n=3.3pA/μm,I_p=0.067pA/μm。     

非对称量子点中强耦合束缚极化子的性质

采用线性组合算符和幺正变换方法研究库仑场对非对称量子点中强耦合极化子性质的影响。导出了非对称量子点中强耦合束缚极化子的振动频率、基态能量和基态结合能随量子点的横向和纵向有效受限长度,库仑束缚势和电子-声子耦合强度的变化关系。数值计算结果表明:非对称量子点中强耦合束缚极化子的振动频率、基态能量和基态结合能随量子点的横向和纵向有效受限长度的减小而迅速增大,表现出新奇的量子点的量子尺寸效应。基态能量随库仑束缚势和电子-声子耦合强度的增加而减小,振动频率和基态结合能随电子-声子耦合强度和库仑束缚势的增加而增大。     

Strain Reduction in Selectively Grown CdTe by MBE on Nanopatterned Silicon on Insulator (SOI) Substrates

Silicon-based substrates for the epitaxy of HgCdTe are an attractive low-cost choice for monolithic integration of infrared detectors with mature Si technology and high yield. However, progress in heteroepitaxy of CdTe/Si (for subsequent growth of HgCdTe) is limited by the high lattice and thermal mismatch, which creates strain at the heterointerface that results in a high density of dislocations. Previously we have reported on theoretical modeling of strain partitioning between CdTe and Si on nanopatterned silicon on insulator (SOI) substrates. In this paper, we present an experimental study of CdTe epitaxy on nanopatterned (SOI). SOI (100) substrates were patterned with interferometric lithography and reactive ion etching to form a two-dimensional array of silicon pillars with ～250 nm diameter and 1 μm pitch. MBE was used to grow CdTe selectively on the silicon nanopillars. Selective growth of CdTe was confirmed by scanning electron microscopy (SEM), atomic force microscopy (AFM), and X-ray photoelectron spectroscopy (XPS). Coalescence of CdTe on the silicon nanoislands has been observed from the SEM characterization. Selective growth was achieved with a two-step growth process involving desorption of the nucleation layer followed by regrowth of CdTe at a rate of 0.2 Å s^?1. Strain measurements by Raman spectroscopy show a comparable Raman shift (2.7 ± 2 cm^?1 from the bulk value of 170 cm^?1) in CdTe grown on nanopatterned SOI and planar silicon (Raman shift of 4.4 ± 2 cm^?1), indicating similar strain on the nanopatterned substrates.     

大功率In(Ga)As/GaAs量子点激光器

利用分子束外延技术和S-K生长模式,系统研究了InAs/GaAs材料体系应变自组装量子点的形成和演化.研制出激射波长λ≈960nm,条宽100μm,腔长800μm的In(Ga)As/GaAs量子点激光器:室温连续输出功率大于3.5W,室温阈值电流密度218A/cm2,0.61W室温连续工作寿命超过3760小时.     

On the Spin States of Electrons in a Double Quantum Dot in a Two-Dimensional Topological Insulator with Spin-Orbit Interaction

Semiconductors - The spectra and spin structure of the states of two interacting electrons localized in a double quantum dot in a two-dimensional topological insulator with spin-orbit interaction...     

Growth of Lattice-Matched ZnTeSe Alloys on (100) and (211)B GaSb

A key issue with the current HgCdTe/Si system is the high dislocation density due to the large mismatch between HgCdTe and Si. An alternative system that has superior lattice matching is HgCdSe/GaSb. A buffer layer to mitigate issues with direct nucleation of HgCdSe on GaSb is ZnTe_1?x Se _x . We have performed preliminary studies into the growth of lattice-matched ZnTe_1?x Se _x on both (100) and (211)B GaSb. The effects of substrate orientation, substrate temperature, and growth conditions on the morphology and crystallography of ZnTe_0.99Se_0.01 alloys were investigated. The lattice-matching condition yielded minimum root-mean-square (rms) roughness of 1.1?nm, x-ray rocking curve full-width at half-maximum (FWHM) value of ~29?arcsec, and density of nonradiative defects of mid-10⁵?cm^?2 as measured by imaging photoluminescence.     

非对称量子点中磁极化子有效质量的温度性质

采用Tokuda线性组合算符法和Lee-Low-Pines(LLP)变换法,研究了温度和磁场对非对称抛物量子点中弱耦合磁极化子性质的影响,推导出了弱耦合磁极化子的振动频率λ和有效质量m*与相关参数之间的函数关系式。数值计算结果表明,非对称量子点中弱耦合磁极化子的振动频率λ随量子点的横向受限强度ω1、纵向受限强度ω2和回旋频率ωc的增加而增大;磁极化子的有效质量m*随温度T的升高而减小,随耦合强度α的增加而增大。外磁场将对磁极化子的振动频率及其变化产生显著影响,而磁极化子的有效质量及其变化强烈地受到温度的影响。