减小指针调整候时抖动的新方法—收端再调整技术

减小指针调整候时抖动是ＳＤＨ中的关键技术之一。本文介绍了最近研究出的一种减小候时抖动的新方法─—收端再调整技术。这项技术不仅可以用来有效地减小指针调整候时抖动，而且还可以用来减小传统的比特调整（正调整，正／零／负调整）的候时抖动。     

国外单层共底贮箱的检漏

国外较多的运载火箭上，采用二种类型的单层共底贮箱存放Ｎ２Ｏ４（四氧化二氮）、ＵＤＭＨ（偏二甲肼）液体推进剂等。而对共底贮箱气密性泄漏检测，乌克兰＂旋风号一３＂二级共底贮箱采用大型真空罐真空法，法国＂阿里安１＂二级共底贮箱采用德国＂道尼尔公司＂研制的正压差累积法检漏。二种检漏方法的验收泄漏率均在１×１０－５Ｐａ·ｍ３／ｓ左右。     

怎样调整压力表常见示值超差

一、被检表示值误差总是增加或减少一个固定值 当被检表随压力的增大，误差成等量增加或减少，在整个测量范围内．指针读数总是与标准表示值相差某一固定值。此故障是由指针安装不正确和指针轴的弯曲而引起的系统误差。调整这种误差，首先应把指针轴矫直．然后重新起针，调整指针安装位置，可以消除误差。如果误差极小，微量转动刻度盘可解决。     

压力表检定常见问题及修理技巧

一、被检表误差总是增加或减少一个固定值 这种误差的特征是，被检表随压力的增大误差也等量地增加或减少，在整个测量范围内，指针读数总是与标准示值相差某一固定值，它是由于指针安装不正确而引起的系统误差。调整这种误差很容易，只要重新起针调整指针的安装位置，就可以消除。如果误差极小，微量转动表盘即可解决问题。     

测温仪表指针摆动故障处理

测温仪表指针摆动故障处理在检修ＸＷＣ－３０２型、ＸＱＣ－３０２型自动平衡记录仪时，曾多次遇到仪表指针一直左右摆动不止。调节线路板上的２２０Ω阻尼电位器和放大器上的４７０Ω灵敏度调节电位器仍不能消除故障。这种现象一般多见于量程较大的仪表。分析原因，大多...     

液压材料试验机常见故障及其排除方法

材料试验机作为机械性能测定的主要装备之一,在机械加工行业得到了广泛的应用。本文就企业中常用的液压万能材料试验机常见故障及排除方法逐一进行阐述。1.试验机在加荷过程中度盘指针抖动,其可能原因有(1)试验机与其附近的其他机器(如金属切削机床,大功率电机等)发生机械共振,引起指针抖动;应采取的措施:消除共振源。(2)安装地基不牢固或地脚螺钉松动(一般为地脚螺钉松动);应采取的措施:紧固地脚螺钉。(3)液压系统中有空气,使出油不均导致液压系统产生震动,从而引起指针抖动。这有两个可能因素:一是油泵中进了空气;二是主体油缸接管带进了…     

电子型／离子型导电高分子共混物

用苯胺在酸性水溶液中的进行化学氧化聚合合成了能溶于Ｎ－甲基吡咯烷酮的高分子量聚苯胺（ＰＡｎ），并用这种ＰＡｎ与一种高分子固态离子导体－－聚乙二醇聚醚氨酯脲（ＰＥＵＵ）和ＬｉＣｌＯ４的复合物（ＰＥＵＵ－ＬｉＣｌＯ４）进行溶液共混制得了具有电子型／离子型两种导电功能的新型高分子共混物。用差示扫描量热法、动态粘弹仪、应力－应变试验、四探针法和交流阻抗谱对这种高分子共混物进行研究。实验结果表明，上述ＰＡｎ     

计量型原子力显微镜

本文报导国际上研制的第一台在纳米测量中，在中等测量范围内，具有微型光纤传导激光干涉三维测量系统、可自校准和进行绝对测量的计量型原子力显微镜。它的诞生，可使目前用于纳米技术研究的扫描隧道显微镜定量化，并将其所测量的纳米量值直接与米定义相衔接。使人们更加准确地了解纳米范围内的各种物理现象，并对它们进行更精确的分析。文章对计量型原子力显微镜进行了理论分析，提出了对各种测量误差的抑制及其补偿方法，并进行了大量的实验，得到良好的结果。目前，该计量型原子力显微镜在其测量范围内，任意两点间距离的测量不确定度为Ｕ９５＝５ｎｍ＋２×１０－４ｌ；在ｚ－轴上的测量不确定度为Ｕ９５＝（１．１～１．２ｎｍ）＋２×１０－４ｈ。     

水表指针错位及判读窍门

水表指针错位导致判谈特别容易出错，往往造成检定工作和收费工作的麻烦，甚至经济损失。指针式水表的分度盘上，分布着多个指针，每个指针有个分度圆，按十进制排列，由于指针多，分度圆小，即使指针不错位，不熟练的人抄表也往往读错。在指针错位时就更难判读了。要想熟练地掌握准确判读错位水表读数的方法，必须先弄清水表指针错位的原因。过去有人认为水表指针错位是“由于齿轮之间有间隙造成的，时间越长、间隙越大，指针错位就越严重”。这种解释我认为是不严谨的。究竟指针错位的主要原因是什么？只要认真观素分析，就不难发现，指针…     

电绝缘氧化铝膜形成重要参数的研究

在硫酸介质中，对铝箔表面进行阳极氧化。最佳条件为：Ｈ２ＳＯ４（１５％），Ｈ２Ｃ２Ｏ４（１５ｇ／ｌ），ＮｉＳＯ４（８ｇ／ｌ），ＮＰ－１０（０．１ｇ／ｌ），电流密度（２Ａ／ｄｍ＾２），氧化时间（１０ｍｉｎ），温度（２５±１℃）。获得了耐蚀、韧性好和击穿电压高的电绝缘氧化铝膜，这种铝箔用于电磁线圈的绕制，得到了满意的结果。     

Jitter testing technique and results at VC-4 desynchronizer outputof SDH equipment

Specifications relative to jitter and wander generation, at the output of desynchronizer systems, represent one of the hottest topics in characterizing SDH equipment. Among the many factors involved, pointer adjustments, due to phase deviations between the received timing signal and the SDH equipment internal clock, play indeed a primary role in phase noise accumulation. This paper deals with two different kinds of test designed for measuring-from 0 Hz on-phase transients due to AU pointer adjustments, namely: static and dynamic jitter measurement configuration. Moreover, results obtained by applying this technique to different suppliers' equipment are herein presented     

Time interval analysis errors in measuring recording mediatransition jitter

Media transition position jitter noise can be a dominant signal-to-noise ratio (SNR) issue in magnetic recording systems with magnetoresistive (MR) heads and (0,k) PRML channels, since the high MR head “gain” emphasizes media jitter noise over electronic noise, and (0,k) codes are sensitive to dibit jitter. Time interval analyzer (TIA) instruments are useful for measuring transition jitter (write jitter), since they can separate write jitter from electronic noise (read jitter) with minimal synchronization and speed variation difficulties. This paper analyzes TIA errors due to read channel intersymbol interference (ISI), which occurs even though TIA measurements are made with periodic LF or HF bit patterns at equal bit intervals “T”, which should be unchanged by ISI. Theory and data show that TIA measurements underestimate jitter by as much as 40% at low channel bit density D_c≡P₅₀/T≈1.5-1.8, and overstate jitter at high density. Even though typical TIA jitter measurements are made between nonadjacent pattern pulses, these errors still occur due to ISI by unmeasured neighbor pulses. It is shown that similar errors occur with TIA electronic read jitter noise measurements. At channel densities above D_c≈2.6, channel amplification of transition jitter occurs, which may be a factor in PRML channel bit density limits     

Evaluation of partial-response maximum-likelihood detection for phase-change optical data storage

We describe the application of partial-response (PR) maximum-likelihood (ML) detection in rewritable phase-change optical data storage. The input to this detector, which is simulated in software, is the actual signal (without any equalization), reproduced from reading of the recorded sequence on an optical disk. The detection algorithm involves the extraction of the impulse response from the readout signal, PR equalization, the adjustment of gain and recovery of clock, ML sequence estimation with the Viterbi algorithm, and analysis of PRML performance. With a laser wavelength of 0.69 mum and an objective lens with a numerical aperture of 0.6, three linear densities are examined: 0.35 and 0.31 mum/bit without modulation code and 0.2 mum/bit with the (1, 7) modulation code. The equalized signal exhibits good eye patterns, especially at the densities of 0.35 and 0.31 mum/bit. Analyses of noise and bit-error rate indicate that jitter, rather than noise, is the main obstacle to realizing ultrahigh density in phase-change media with PRML detection. We also briefly discuss the problem of the inherent nonlinear effect in phase-change readout.     

Generation and Measurement of Phase Jitter Using Phase-Lock Techniques

The phase-locked loop (PLL) is applied to generating and measuring large phase jitter that can be encountered in digital transmission systems. It is shown that jitter can be generated and measured by a PLL operated as a phase modulator and phase demodulator, respectively. Equations and examples are given for practical PLL designs to generate and measure jitter of a certain amplitude range and bandwidth. Practical considerations such as 1) phase detector range, 2) limited voltage-controlled oscillator sensitivity, 3) frequency tolerances, 4) pull-in time, and 5) calibration are included. PLL's designed in this way can be useful in evaluating digital transmission systems. Jitter measuring sets have been designed to measure jitter on the 1.5, 6.3, 45, and 274 Mbit/s signals used in the LD-4 digital cable system [1]. A jitter set for measuring jitter on 45 Mbit/s signals is described in this paper.     

低功耗高速时钟数据恢复电路

为了降低高速串行接口的时钟数据恢复(CDR)电路的功耗,在研究、分析现有时钟数据恢复结构的基础上,提出了一种新的时钟数据鉴相算法及其电路实现方法。新的电路设计仅使用一个高速采样时钟,比传统的鉴相电路减少一半的采样率,从而减少了前端采样模块的功耗。该鉴相算法采用统计方法减小鉴相时钟的噪声,进而达到很低的误码率。该鉴相算法可使用数字综合的方法实现,工作在较低的频率下,这样便于迁移到不同的工艺中。整个电路使用40nm工艺实现,实际芯片测试数据表明,使用该电路的接收端可以稳定工作在13Gb/s的速率下,功耗达到0.83p J/bit,误码率低于10E-12。     

The effects of accumulated timing jitter on some sine wavemeasurements

This paper investigates the effects of accumulated timing jitter on the signal-to-noise ratio (SNR) and on the phase angle measurement of real sine waves. These measurements are done via the Fast Fourier Transform (FFT) method. Accumulated timing jitter occurs when the sine wave is sampled by an unstable clock where the clock periods are randomly changing. Also, accumulated jitter is a problem in ramp-type bases that were often used in sampling oscilloscopes. Expressions for an estimate of the signal-to-noise ratio [SNR_(est.)] and phase variance in terms of the jitter distribution parameters and the number of FFT points (N) are derived. The derived expressions are verified through computer simulations. Finally, a comparison between independent and accumulated jitter is presented     

Special issue on BIT CMOS built-in test architecture for high-speed jitter measurement

Timing measurements for gigahertz clock frequencies require high accuracy and resolution. This paper proposes a scalable built-in self-test (BIST) method that measures accumulated period jitter over a programmable number of periods, without using another reference clock. This on-chip method uses a charge pump to convert time to a voltage, which is digitized by an all-digital flash analog-to-digital converter (ADC). The ADC employs multiple chains of inverter strings composed of three series inverters instead of the popular analog comparators. The inverter thresholds set the reference voltages for triggering given an input dc value. The output is calibrated and converted to jitter measurement. The design using a 0.25 /spl mu/m BiCMOS process, with an input range of 625 MHz-1 GHz, shows that a resolution of 70 ps root mean square (rms) jitter can be achieved, while occupying 0.0575 mm/sup 2/ area with a very conservative layout style. The design has been fabricated and tested, and the test results are presented.     

Optimum divergence angle of a Gaussian beam wave in the presence of random jitter in free-space laser communication systems

The average bit error rate (BER) of optical communication systems is considered in the presence of random angular jitter. First, the received power and the BER in the absence of jitter are reviewed. Then the average BER is obtained in the presence of circularly symmetric, normally distributed jitter by using the probability density function of the optical signal. By minimizing the power penalty for average BER, the optimum ratio of the divergence angle of the laser beam to the random angular jitter at the desired BER is obtained. An analytic approximation of the optimum ratio is derived as a function of the desired average BER. The results can be used for designing the link budget of optical communication and tracking channels in the presence of jitter.     

A fundamental limit on the performance of correlation based phasecorrection and flow estimation techniques

Cross correlation and similar operations are used in ultrasonic imaging to estimate blood or soft tissue motion in one or more dimensions and to measure echo arrival time differences for phase aberration correction. These estimates are subject to large errors known as false peaks and smaller magnitude errors known as jitter. While false peaks can sometimes be removed through nonlinear processing, jitter errors place a fundamental limit on the performance of delay estimation techniques. This paper applies the Cramer-Rao Lower Bound to derive analytical expressions which predict the magnitude of jitter for 1-D and 2-D problems using both radio frequency (RF) and envelope detected data. One-dimensional simulation results are presented which closely match theoretical predictions. These results indicate that for typical clinical conditions axial jitter for detected data is approximately five times greater than that for RF data. Lateral jitter is approximately ten times greater than axial jitter for RF data. Examples are presented which utilize these results to predict the performance of phase aberration correction and flow estimation systems