Low-Power Dynamic Memory Word Line Decoding for Static Random Access Memories

Conventional memory address decoders based on static CMOS gates incur high clock loading and unnecessary power dissipation in unselected banks. This paper presents a dynamic word line decoder which is fast, has reduced active and leakage power dissipation, and also enables faster race-free sense timing. In a multi-bank memory array with sixteen decoders, the energy–delay product of the dynamic decoder is 66% lower than a low-power static version. The design leverages the predictability of dynamic circuits to provide significant decoder leakage reduction in unselected banks. The dynamic decoder has been fabricated on a 90 nm bulk CMOS process. The measured test chip address to word line delay is 170 ps at 1.5 V and the measured leakage reduction is over 20x at $V_{rm DD}$ greater than 0.8 V.      

适合WDM网络动态增益均衡的全光增益锁定光纤放大器

在光纤放大器内部同时建立增益谱锁定与平坦机制，研制出适合ＷＤＭ网络应用的全光锁定高增益、大功率掺铒光纤放大器（ＥＤＦＡ）。在２３ｄＢ输入功率动态范围（－４０～－１７ｄＢｍ）内的增益箝制在３３ｄＢ，对应总输入功率为－１７ｄＢｍ的输出光功率为１６ｄＢｍ，锁定的－１ｄＢ增益带宽为１４ｎｍ（１５４７～１５６１ｎｍ）。     

Line Protection Switching for the L5 Coaxial System

A new 1-for-10 line protection switching system called LPSS-3 has been developed for the L5 coaxial system. Reliability and economic considerations dictate maximum switching spans of 150 mi. Control is primarily by integrated-circuit logic. The line switches use microwave switching diodes to achieve the required pass, modulation, and isolation characteristics. Switching is initiated when temperature pilot levels deviate ± 5 dB from nominal or when the total system energy increases 9 dB above nominal (system overload is imminent). For release, the pilot must be within ± 2 dB of nominal and total energy must be less than +5 dB above nominal. Interstation signaling is accomplished by pulse code modulating complementary channels. Checking complements and parity lends immunity to error. Retransmission of failed codes is automatic. Complete manual control, both local and via telemetry, is provided.     

Low-Noise Ultralinear Line Repeaters for the L5 Coaxial System

Two major characteristics of the coaxial cable that are of paramount importance in the design of coaxial line repeaters are the nominal cable loss and the variation in the cable loss due to seasonal variations in cable temperature. As a result, there are two types of line repeaters used to equalize for the cable loss characteristics. One is a low-noise ultralinear fixed-gain amplifier. It is designated the basic repeater and is used to equalize for the nominal loss of the coaxial cable. The second type, called the regulating repeater, includes a basic repeater plus additional circuitry which automatically corrects for dynamic variations in cable loss due to temperature. Some of the important design techniques that are used to achieve these low-noise ultralinear repeaters are described. In addition, an analysis of the steady-state response of a tandem string of regulating repeaters is included.     

轴向压缩悬臂梁压电双晶片动静态特性研究

研究施加轴向压缩力于悬臂梁压电双晶片端部以增大端部输出位移和力的问题,对其进行了有限元分析,并推导了弹性力学解析解及模态方程,得到了符合程度较好的结果。研究结果表明,在120V电压及5.5N轴向力作用下,端部阻塞力达0.25N,输出位移较原来增大3倍以上(达5mm),而一阶特征频率随轴向力增大而加速减小。当轴向力达到一阶临界屈曲时,一阶特征频率趋于0,但当轴向力取一阶屈曲力的70%时,其1阶固有频率仍有45Hz,相较于普通伺服舵机有较大的优势,可有效提高微小型飞行器的操稳性。     

Analyses of Static and Dynamic Random Offset Voltages in Dynamic Comparators

When mismatches are present in a dynamic comparator, due to internal positive feedback and transient response, it is always challenging to analytically predict the input-referred random offset voltages since the operating points of transistors are time varying. In this paper, a novel balanced method is proposed to facilitate the evaluation of operating points of transistors in a dynamic comparator. Thus, it becomes possible to obtain an explicit expression for offset voltage in dynamic comparators. We include two types of mismatches in the model: 1) static offset voltages from the mismatch in $muhbox{C}_{rm ox}$ and threshold voltage ${rm V}_{rm th}$ and 2) dynamic offset voltage due to the mismatch in the parasitic capacitances. From the analytical models, designers can obtain an intuition about the main contributors to offset and also fully explore the tradeoffs in dynamic comparator design, such as offset voltage, area and speed. To validate the balanced method, two topologies of dynamic comparator implemented in 0.25- $mu{hbox {m}}$ and 40-nm CMOS technology are applied as examples. Input-referred offset voltages are first derived analytically based on SPICE Level 1 model, whose values are compared with more accurate Monte Carlo transient simulations using a sophisticated BSIM3 model. A good agreement between those two verifies the effectiveness of the balanced method. To illustrate its potential, the explicit expressions of offset voltage were applied to guide the optimization of “Lewis-Gray” structure. Compared to the original design, the input offset voltage was easily reduced by 41% after the optimization while maintaining the same silicon area.      

压电双晶片的静动态特性分析与测量

在忽略剪切振动、弯曲振动、扭转振动和横效应振动的近似条件下,分析了压电双晶片的纵效应振动。从压电方程和波动方程出发,推导出了厚度伸缩振动模式的阻抗频响和导纳频响,并在此基础上得到了纵效应振动的一般导纳公式。推导出纵效应振动的等效电路,绘制出阻抗频率响应曲线。另外,采用有限元软件对压电双晶片进行了静态变形、动态特性分析,同时进行了静态和动态测试。将理论计算、有限元分析和实验测试结果进行比对分析,三者结果吻合。     

我国区域数字鸿沟静态与动态综合测度

通过对已有关于数字鸿沟综合指标体系、测度模型和结构模型等方面研究成果的总结、分析、归纳和演绎,本文确定了适合测度我国区域数字鸿沟涵盖技术、经济、政府、教育、社会5个方面的综合指标体系。应用层次分析法,通过专家评分,计算判断矩阵,对指标体系中各指标赋予了权重。在采集我国31个省市自治区2002-2007年共6年数据的基础上,利用均值化法对数据进行标准化,既对数据进行了无量纲处理又保留其变异程度信息,根据计算出的各年数字鸿沟指数值和排名,对我国区域数字鸿沟进行了静态分析。进一步结合平均差分析法分析数字鸿沟历年变化趋势,进行了动态测度。论文创新性地解决了难以量化的数字鸿沟综合指标随时间变化所呈现的差距变化真实水平的量化问题。论文最后还分析了数字鸿沟的分布情况和成因,提出了缩小我国区域数字鸿沟的指导建议。     

Static and Dynamic Temperature-Aware Scheduling for Multiprocessor SoCs

Thermal hot spots and high temperature gradients degrade reliability and performance, and increase cooling costs and leakage power. In this paper, we explore the benefits of temperature-aware task scheduling for multiprocessor system-on-a-chip (MPSoC). We evaluate our techniques using workload characteristics collected from a real system by Sun's Continuous System Telemetry. We first solve the task scheduling problem statically using integer linear programming (ILP). The ILP solution is guaranteed to be optimal for the given assumptions for tasks. We formulate ILPs for minimizing energy, balancing energy, and reducing hot spots, and provide an extensive comparison of their thermal behavior against our technique. Our static solution can reduce the frequency of hot spots by 35%, spatial gradients by 85%, and thermal cycles by 61% in comparison to the ILP for minimizing energy. We then design dynamic scheduling policies at the OS-level with negligible performance overhead. Our adaptive dynamic policy reduces the frequency of high-magnitude thermal cycles and spatial gradients by around 50% and 90%, respectively, in comparison to state-of-the-art schedulers. Reactive thermal management strategies, such as thread migration, can be combined with our scheduling policy to further reduce hot spots, temperature variations, and the associated performance cost.      

三值动态和静态广义时序机理论

该文在三值电路三要素理论的基础上提出了三值动态和静态广义时序机理论。首先找出三值状态图和电路方程间的关系,该关系既适用于静态电路,又适用于动态电路。对静态电路文中推导出各型三值触发器完整特性方程,它描述了触发器全时刻的行为,用以代替常规特性方程,使三值同步和异步时序电路统一。对动态电路该文用电容代替触发器存储三值信息,实现三值动态时序电路(特别是三值同步动态时序电路,属于非触发器式的时序电路)。因动态电路和静态电路主要差别是负载行为,故此可以在三值电路三要素理论和广义时序机理论下统一三值动态和静态,同步和异步时序电路。     

具有动态增益均衡特性的低噪声全光增益箝位EDFA

针对全光增益箝位EDFA噪声指数恶化以及用于WDM系统时增益动态变化两个问题,提出具有动态增益均衡特性的低噪声全光增益箝位EDFA,在35 nm范围内,输入信号功率在-40 dBm到0 dBm之间变化时,增益变化被箝制在1 dB范围内,同时保持单波长输入噪声指数<4.5 dB,多波长输入增益谱不平坦度<0.4,噪声指数<5.5 dB,有效解决了以上问题.     

An Acoustic Bridge for Measuring the Static and Dynamic Impedance of the Eardrum

An acoustic impedance bridge is described that is capable of measuring the input impedance of the human ear in the frequency range of 250 to 1250 Hz, with an accuracy of 3 degrees and 5 percent in phase and magnitude, respectively. In addition to static impedance, the bridge measures and records both in-phase and quadrature components (re an arbitrary reference) of changes in the ear's impedance due to the acoustic reflex. Assumptions upon which the use of the bridge is based are stated, the calibration procedure is described, and an example of the use of the bridge is given.     

关于线性电容之静态电容和动态电容作用的研究

在对由两个初始电压不为零的电容及一个电阻串联构成的一阶电路分析时,发现研究动态电路的过渡过程时要区分静态电容和动态电容,否则有可能会导致分析计算的错误。计算线性电容储存能量公式中的电容是电容元件的静态电容,初始电荷不等的两个电容元件串联时,其等效静态电容无法确定。一阶RC电路的时间常数中的电容是电容元件的动态电容或电容元件串联、并联的等效动态电容。在分析一阶电路的动态过程时要特别注意这些问题,希望引起从事电路教学工作的同行注意。     

Static and Dynamic Integrated Analysis Scheme for Android Malware

The Android platform is the most popular mobile operating system. With the increase of the number of Android users, a lot of security issues have occurred. In order to detect the malicious behaviors for the installed Android Apps, in this paper, we propose an Android malware detecting scheme by integrating static and dynamic analysis methods. We use Androguard and DroidBox to extract the features, and then remove the irrelevant features. Then we employ the support vector machine (SVM) to classify the Android malware and benignware. From the result of our proposed scheme, the proposed integrated static and dynamic analysis scheme with SVM can effectively detect the Android malware.     

一种联合静动态标校的数据处理方法

针对坐标测量雷达精度标校过程中,静态标校存在局限性和动态标校存在分段非线性的问题,分析了静态标校和动态标校的机理和相互关系,得到两种标校方式是相互补充、完整统一的结论。提出了基于逆秩2 拟牛顿法(BFGS)的联合静态和动态标校的数据处理方法,该方法将静态标校值作为初值,动态校飞误差的最小均方值作为目标函数,通过搜索和迭代计算求得最终修正值。实际应用结果表明:该方法能够有效解决标校过程中的问题,提高雷达测量精度,对于指导开展雷达标校工作具有现实意义。     

Low Cost BIST for Static and Dynamic Testing of ADCs

This paper presents a low cost test method for the static and dynamic characterization of analog-to-digital converters. The method is suitable for implementation in a SoC environment, as a built-in self test (BIST) solution. In the proposed approach, noise is used as the test signal. Theory of operation and practical results demonstrating the effectiveness of the method for INL, DNL, THD and SINAD characterization are presented. The BIST surface overhead caused by the noise generator is only 7.4% of the ADC total area. The reduced number of data samples required allows a reduction of about 7.5× in test time, in comparison to the histogram method.Maria da Gloria Cataldi Flores was born in Santa Maria, Brazil, in 1978. She received the electrical engineering degree in 2000 from Universidade Federal de Santa Maria (UFSM) and the M.S. degree engineering in 2003 from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil. Since then, she has been working as a design engineer in an EAS Supply brazilian company. Her main research interests include mixed-signal and analog testing and digital signal processing.Marcelo Negreiros was born in Porto Alegre, Brazil, in 1969. He received the electrical engineering degree in 1992 and the M.S. degree engineering in 1994, both from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil. Since then he was been working as an associate researcher in the Signal Processing Lab. (LaPSI) of the Electrical Engineering Department at UFRGS. Since 2000 he also works toward a Ph.D. in Computer Science from UFRGS. His main research interests include mixed-signal and analog testing and digital signal processing.Luigi Carro was born in Porto Alegre, Brazil, in 1962. He received the Electrical Engineering and the M.Sc. degrees from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil, in 1985 and 1989, respectively. From 1989 to 1991 he worked at ST-Microelectronics, Agrate, Italy, in the R&D group. In 1996 he received the Ph.D. degree in the area of Computer Science from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil. He is presently a lecturer at the Electrical Engineering Department of UFRGS, in charge of Digital Systems Design and Digital Signal processing disciplines at the graduate and undergraduate level. He is also a member of the Graduation Program in Computer Science of UFRGS, where he is responsible for courses in Embedded Systems, Digital Signal Processing, and VLSI Design. His primary research interests include mixed-signal design, digital signal processing, mixed-signal and analog testing, and fast system prototyping. He has published more than 90 technical papers in those topics and is the author of the book Digital Systems Design and Prototyping (in portuguese).Altamiro A Susin was born in Vacaria-RS, Brazil, in 1945. He received the Electrical Engineering and the MSc. degrees from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil, in 1972 and 1977, respectively. Since 1968 he worked in the start up of Computer Centers of two local Universities. In 1981 he got his Dr. Eng degree from Institut National Polytechnique de Grenoble-France. He is presently a lecturer at the Electrical Engineering Department of UFRGS, in charge of Digital Systems Design disciplines at the graduate and undergraduate level. He is also a member of the Graduation Program in Computer Science of UFRGS, where he is responsible by courses in VLSI Architecture and is also thesis director. His main research interests are Integrated Circuit Architecture, Embedded Systems, Signal Processing with more than 50 technical papers published in those domains. He is/was responsible for several R&D projects either funded with public and/or industry resources.Felipe Ricardo Clayton received the B.S. degree in Electrical Engineering from State University of Campinas (UNICAMP), Brazil, in 1986. He worked at CPqD (Brazilian PTT R&D Center) till 1996 designing analog and mixed signal circuits for telecom and automotive applications. From 1997 to the second half of 1998, he worked at Instituto Superior Técnico (IST), Lisbon, Portugal, under the guidance of Prof. Carlos Azeredo Leme on development of CMOS RF circuits. Since October 1998 he had worked for Motorola SPS. Now he is head of the Power Managment Group at Freescale.Cristiano Benevento received his B.S. degree in Electrical Engineering from Universidade Estadual de Campinas (Unicamp), Brazil, in 1997. He worked at Motorola Cellular Infrastructure Group until August 2000 as a Systems Engineer. He joined Motorola Semiconductor Product Sector in August 2000 as IC Designer for Power Management Group and is now at Freescale.     

65m射电望远镜天线静动力学分析

介绍了65 m天线结构的基本情况,分析了用于有限元分析的基本矩阵方程和65 m天线的载荷和边界条件。对65 m天线进行了静力学和动力学分析,得到了在典型仰角下的天线精度和谐振频率。同时,对天线进行了强度分析,得到了不同仰角和不同工况下的安全系数。结果表明：天线结构在给定条件下,能够满足设计需要,不会产生破坏,为该工程的结构设计提供了依据。     

Static and Dynamic Modeling of Circular Grating-Coupled Distributed Feedback Lasers

A computer model is developed to analyze the steady-state and transient responses of circular grating-coupled distributed feedback (CGC DFB) lasers. The model solved the time-dependent coupled-mode equations and carrier rate equation self-consistently by using a modified time-domain finite-difference method. The nonuniform distributions of carrier concentration and refractive index are taken into calculation. Using the model, the temporal and spatial variations of electric field and carrier concentration of the CGC DFB lasers are examined. It is found that the laser performance would be underestimated if the carrier-induced index change is ignored in the calculation. On the other hand, it is noted that the output power and resonant oscillation frequency as well as damping rate of the lasers could be maximized simultaneously by an optimal design for the grating.     

晶闸管并联静动态均流原理的教学

晶闸管的并联均流是"电力电子技术"课程的一个内容,大多数教科书对该部分的介绍都以定性分析为主,使学生难以建立完整的概念.本文根据目前电力电子技术的发展,从影响晶闸管并联均流的因素,如通态压降、开关时间、器件温度和母线配置等,到实现均流的技术和方法,系统阐述了晶闸管并联的静动态均流特性,从而弥补了现有教科书中的不足.     

交流电动机矢量控制变压变频调速系统（二） 第二讲 异步电动机在静止坐标系上的数学模型

本文首先介绍了异步电动机空间矢量的概念，对异步电动机的各种坐标系进行了定义，在此基础上，根据电磁感应定律得到了异步电动机在静止坐标系上的数学模型，最后分析了异步电动机数学模型的性质。