首页 | 本学科首页   官方微博 | 高级检索  
相似文献
 共查询到20条相似文献,搜索用时 15 毫秒
1.
An InP/InGaAs single heterojunction bipolar transistor(SHBT) with high maximum oscillation frequency (f_(max)) and high cutoff frequency(f_t) is reported.Efforts have been made to maximize f_(max) and f_t simultaneously including optimizing the epitaxial structure,base-collector mesa over-etching and base surface preparation.The measured f_t and f_(max) both reached 185 GHz with an emitter size of 1×20μm~2,which is the highest f_(max) for SHBTs in mainland China.The device is suitable for ultra-high spee...  相似文献   

2.
Submicron InP-InGaAs-based single heterojunction bipolar transistors (SHBTs) are fabricated to achieve record-breaking speed performance using an aggressively scaled epitaxial structure coupled with a submicron emitter process. SHBTs with dimensions of 0.35 /spl times/16 /spl mu/m have demonstrated a maximum current gain cutoff frequency f/sub T/ of 377 GHz with a simultaneous maximum power gain cutoff frequency f/sub MAX/ of 230 GHz at the current density Jc of 650 kA/cm/sup 2/. Typical BV/sub CEO/ values exceed 3.7 V.  相似文献   

3.
Small-area regrown emitter-base junction InP/In-GaAs/InP double heterojunction bipolar transistors (DHBT) using an abrupt InP emitter are presented for the first time. In a device with emitter-base junction area of 0.7 /spl times/ 8 /spl mu/m/sup 2/, a maximum 183 GHz f/sub T/ and 165 GHz f/sub max/ are exhibited. To our knowledge, this is the highest reported bandwidth for a III-V bipolar transistor utilizing emitter regrowth. The emitter current density is 6/spl times/10/sup 5/ A/cm/sup 2/ at V/sub CE,sat/ = 1.5 V. The small-signal current gain h/sub 21/ = 17, while collector breakdown voltage is near 6 V for the 1500-/spl Aring/-thick collector. The emitter structure, created by nonselective molecular beam epitaxy regrowth, combines a small-area emitter-base junction and a larger-area extrinsic emitter contact, and is similar in structure to that of a SiGe HBT. The higher f/sub T/ and f/sub max/ compared to previously reported devices are achieved by simplified regrowth using an InP emitter and by improvements to the regrowth surface preparation process.  相似文献   

4.
Using high-quality polycrystalline chemical-vapor-deposited diamond films with large grains (/spl sim/100 /spl mu/m), field effect transistors (FETs) with gate lengths of 0.1 /spl mu/m were fabricated. From the RF characteristics, the maximum transition frequency f/sub T/ and the maximum frequency of oscillation f/sub max/ were /spl sim/ 45 and /spl sim/ 120 GHz, respectively. The f/sub T/ and f/sub max/ values are much higher than the highest values for single-crystalline diamond FETs. The dc characteristics of the FET showed a drain-current density I/sub DS/ of 550 mA/mm at gate-source voltage V/sub GS/ of -3.5 V and a maximum transconductance g/sub m/ of 143 mS/mm at drain voltage V/sub DS/ of -8 V. These results indicate that the high-quality polycrystalline diamond film, whose maximum size is 4 in at present, is a most promising substrate for diamond electronic devices.  相似文献   

5.
成功地将Polyimide钝化平坦化工艺应用于InP/InGaAs单异质结晶体管制作工艺中.在Vce=1.1V,Ic=33.5mA的偏置条件下,发射极尺寸为1.4μm×1.5μm的器件,其ft达到210GHz.这种器件非常适合高速低功耗方面的应用,例如超高速数模混合电路以及光学通信系统等.  相似文献   

6.
成功地将Polyimide钝化平坦化工艺应用于InP/InGaAs单异质结晶体管制作工艺中.在Vce=1.1V,Ic=33.5mA的偏置条件下,发射极尺寸为1.4μm×1.5μm的器件,其ft达到210GHz.这种器件非常适合高速低功耗方面的应用,例如超高速数模混合电路以及光学通信系统等.  相似文献   

7.
Scaling of submicron InP-InGaAs HBTs is investigated for low-power high-speed applications in mixed signal circuits. Device performance for transistors fabricated with a 0.5-/spl mu/m emitter width and varying emitter lengths are studied. The 0.5 /spl mu/m/spl times/2 /spl mu/m devices yielded excellent low-current RF performance, with an f/sub T/=173 GHz and an f/sub MAX/=187 GHz at 1 mA, the highest values reported for InP-based devices to date.  相似文献   

8.
An InP/InGaAs single heterojunction bipolar transistor (SHBT) with high maximum oscillation frequency (fmax) and high cutoff frequency (ft) is reported. Efforts have been made to maximize fmax and ft simultaneously including optimizing the epitaxial structure, base–collector mesa over-etching and base surface preparation. The measured ft and fmax both reached 185 GHz with an emitter size of 1 × 20 μ m2, which is the highest fmax for SHBTs in mainland China. The device is suitable for ultra-high speed digital circuits and low power analog applications.  相似文献   

9.
We report self-aligned indium-phosphide double-heterojunction bipolar transistor devices in a new manufacturable technology with both cutoff frequency (f/sub /spl tau//) and maximum oscillation frequency (f/sub max/) over 300 GHz and open-base breakdown voltage (BV/sub ceo/) over 4 V. Logic circuits fabricated using these devices in a production integrated-circuit process achieved a current-mode logic ring-oscillator gate delay of 1.95 ps and an emitter-coupled logic static-divider frequency of 152 GHz, both of which closely matched model-based circuit simulations.  相似文献   

10.
Describes 150-nm-thick collector InP-based double heterojunction bipolar transistors with two types of thin pseudomorphic bases for achieving high f/sub T/ and f/sub max/. The collector current blocking is suppressed by the compositionally step-graded collector structure even at J/sub C/ of over 1000 kA/cm/sup 2/ with practical breakdown characteristics. An HBT with a 20-nm-thick base achieves a record f/sub T/ of 351 GHz at high J/sub C/ of 667 kA/cm/sup 2/, and a 30-nm-base HBT achieves a high value of 329 GHz for both f/sub T/ and f/sub max/. An equivalent circuit analysis suggests that the extremely small carrier-transit-delay contributes to the ultrahigh f/sub T/.  相似文献   

11.
We report on the dc and RF characterization of laterally scaled, Si-SiGe n-MODFETs. Devices with gate length, L/sub g/, of 80 nm had f/sub T/=79 GHz and f/sub max/=212 GHz, while devices with L/sub g/=70 nm had f/sub T/ as high as 92 GHz. The MODFETs displayed enhanced f/sub T/ at reduced drain-to-source voltage, V/sub ds/, compared to Si MOSFETs with similar f/sub T/ at high V/sub ds/.  相似文献   

12.
InP-In/sub 0.53/Ga/sub 0.47/As-InP double heterojunction bipolar transistors (DHBTs) were grown on a GaAs substrate using a metamorphic buffer layer and then fabricated. The metamorphic buffer layer is InP - employed because of its high thermal conductivity to minimize device heating. An f/sub /spl tau// and f/sub max/ of 268 and 339 GHz were measured, respectively - both records for metamorphic DHBTs. A 70-nm SiO/sub 2/ dielectric sidewall was deposited on the emitter contact to permit a longer InP emitter wet etch for increased device yield and reduced base leakage current. The dc current gain /spl beta/ is /spl ap/35 and V/sub BR,CEO/=5.7 V. The collector leakage current I/sub cbo/ is 90 pA at V/sub cb/=0.3 V. These values of f/sub /spl tau//, f/sub max/, I/sub cbo/, and /spl beta/ are consistent with InP based DHBTs of the same layer structure grown on a lattice-matched InP substrate.  相似文献   

13.
InP/In/sub 0.53/Ga/sub 0.47/As/InP double heterojunction bipolar transistors (DHBT) have been designed for increased bandwidth digital and analog circuits, and fabricated using a conventional mesa structure. These devices exhibit a maximum 450 GHz f/sub /spl tau// and 490 GHz f/sub max/, which is the highest simultaneous f/sub /spl tau// and f/sub max/ for any HBT. The devices have been scaled vertically for reduced electron collector transit time and aggressively scaled laterally to minimize the base-collector capacitance associated with thinner collectors. The dc current gain /spl beta/ is /spl ap/ 40 and V/sub BR,CEO/=3.9 V. The devices operate up to 25 mW//spl mu/m/sup 2/ dissipation (failing at J/sub e/=10 mA//spl mu/m/sup 2/, V/sub ce/=2.5 V, /spl Delta/T/sub failure/=301 K) and there is no evidence of current blocking up to J/sub e//spl ges/12 mA//spl mu/m/sup 2/ at V/sub ce/=2.0 V from the base-collector grade. The devices reported here employ a 30-nm highly doped InGaAs base, and a 120-nm collector containing an InGaAs/InAlAs superlattice grade at the base-collector junction.  相似文献   

14.
This paper reports on SiGe NPN HBTs with unity gain cutoff frequency (fT) of 207 GHz and an fMAX extrapolated from Mason's unilateral gain of 285 GHz. fMAX extrapolated from maximum available gain is 194 GHz. Transistors sized 0.12×2.5 μm2 have these characteristics at a linear current of 1.0 mA/μm (8.3 mA/μm2). Smaller transistors (0.12×0.5 μm2) have an fT of 180 GHz at 800 μA current. The devices have a pinched base sheet resistance of 2.5 kΩ/sq. and an open-base breakdown voltage BVCEO of 1.7 V. The improved performance is a result of a new self-aligned device structure that minimizes parasitic resistance and capacitance without affecting fT at small lateral dimensions  相似文献   

15.
InP/InGaAs/InP double heterojunction bipolar transistors (DHBTs) were designed for wide band digital and analog circuits, and fabricated using a conventional mesa structure with benzocyclobutene (BCB) passivation and planarization process techniques. Our devices exhibit a maximum ft of 203 GHz, which is the highest ft for DHBTs in mainland China. The emitter size is 1.0×20 μm2. The DC current gain β is 166, and BVCEO=4.34 V. The devices reported here employ a 40 nm highly doped InGaAs base region and a 203 nm InGaAsP composite structure. They are suitable for high speed and intermediate power applications.  相似文献   

16.
为了适应数字及模拟电路带宽的不断增加,我们在传统的台面结构基础上利用BCB钝化平坦化工艺技术,设计并研制了InP/InGaAs/InP双异质结双极型晶体管。我们研制的晶体管ft达到203GHz,是目前国内InP基DHBT的最高水平,发射极尺寸为1.0μm×20μm,电流增益β为166,击穿电压为4.34V,我们的器件采用了40nm高掺杂InGaAs基区,以及203nm含有InGaAsP复合式结构的集电区。该器件非常适合高速中功耗方面的应用。  相似文献   

17.
High-speed results on sub-30-nm gate length pMOSFETs with platinum silicide Schottky-barrier source and drain are reported. With inherently low series resistance and high drive current, these deeply scaled transistors are promising for high-speed analog applications. The fabrication process simplicity is compelling with no implants required. A sub-30-nm gate length pMOSFET exhibited a cutoff frequency of 280 GHz, which is the highest reported to date for a silicon MOS transistor. Off-state leakage current can be easily controlled by augmenting the Schottky barrier height with an optional blanket As implant. Using this approach, good digital performance was also demonstrated.  相似文献   

18.
The selectively implanted buried subcollector (SIBS) is a method to decouple the intrinsic and extrinsic C/sub BC/ of InP-based double-heterojunction bipolar transistors (DHBTs). Similar to the selectively implanted collector (SIC) used in Si-based bipolar junction transistors (BJTs) and HBTs, ion implantation is used to create a N+ region in the collector directly under the emitter. By moving the subcollector boundary closer to the BC junction, SIBS allows the intrinsic collector to be thin, reducing /spl tau//sub C/, while simultaneously allowing the extrinsic collector to be thick, reducing C/sub BC/. For a 0.35 /spl times/ 6 /spl mu/m/sup 2/ emitter InP-based DHBT with a SIBS, 6 fF total C/sub BC/ and >6 V BV/sub CBO/ were obtained with a 110-nm intrinsic collector thickness. A maximum f/sub T/ of 252 GHz and f/sub MAX/ of 283 GHz were obtained at a V/sub CE/ of 1.6 V and I/sub C/ of 7.52 mA. Despite ion implantation and materials regrowth during device fabrication, a base and collector current ideality factor of /spl sim/2.0 and /spl sim/1.4, respectively, at an I/sub C/ of 100 /spl mu/A, and a peak dc /spl beta/ of 36 were measured.  相似文献   

19.
We report an InP-InGaAs-InP double heterojunction bipolar transistor (DHBT), fabricated using a conventional triple mesa structure, exhibiting a 370-GHz f/sub /spl tau// and 459-GHz f/sub max/, which is to our knowledge the highest f/sub /spl tau// reported for a mesa InP DHBT-as well as the highest simultaneous f/sub /spl tau// and f/sub max/ for any mesa HBT. The collector semiconductor was undercut to reduce the base-collector capacitance, producing a C/sub cb//I/sub c/ ratio of 0.28 ps/V at V/sub cb/=0.5 V. The V/sub BR,CEO/ is 5.6 V and the devices fail thermally only at >18 mW//spl mu/m/sup 2/, allowing dc bias from J/sub e/=4.8 mA//spl mu/m/sup 2/ at V/sub ce/=3.9 V to J/sub e/=12.5 mA//spl mu/m/sup 2/ at V/sub ce/=1.5 V. The device employs a 30 nm carbon-doped InGaAs base with graded base doping, and an InGaAs-InAlAs superlattice grade in the base-collector junction that contributes to a total depleted collector thickness of 150 nm.  相似文献   

20.
A scalable small-signal and noise model of InP-InGaAs single heterojunction bipolar transistors was developed. Effects which become important at higher frequencies such as the correlation between base and collector current noise and frequency-dependent base current noise are taken into account. We will show that these effects are significant at frequencies higher than 40 GHz and can no longer be neglected. Our model also includes the effects of the different emission coefficients of the base and collector currents. Using this improved model, a direct-coupled, lumped broad-band amplifier was designed. We completely characterized the fabricated circuit with respect to small-signal, noise, and linearity behavior. A -3-dB bandwidth of 50 GHz with a dc gain of 9.8 dB and a gain-peaking of only 1.2 dB were achieved. All these values agree very well with the simulation results. The noise figure is 7.5 dB over a large frequency range. In the frequency range from 2 to 50 GHz, the third-order intercept point IP3 and 1-dB compression point at the output have values from 17 to 10 dBm and 3 to 0 dBm, respectively  相似文献   

设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号