Vector rational interpolation schemes for erroneous motion field estimation applied to MPEG-2 error concealment

A study on the use of vector rational interpolation for the estimation of erroneously received motion fields of MPEG-2 predictively coded frames is undertaken in this paper, aiming further at error concealment (EC). Various rational interpolation schemes have been investigated, some of which are applied to different interpolation directions. One scheme additionally uses the boundary matching error and another one attempts to locate the direction of minimal/maximal change in the local motion field neighborhood. Another one further adopts bilinear interpolation principles, whereas a last one additionally exploits available coding mode information. The methods present temporal EC methods for predictively coded frames or frames for which motion information pre-exists in the video bitstream. Their main advantages are their capability to adapt their behavior with respect to neighboring motion information, by switching from linear to nonlinear behavior, and their real-time implementation capabilities, enabling them for real-time decoding applications. They are easily embedded in the decoder model to achieve concealment along with decoding and avoid post-processing delays. Their performance proves to be satisfactory for packet error rates up to 2% and for video sequences with different content and motion characteristics and surpass that of other state-of-the-art temporal concealment methods that also attempt to estimate unavailable motion information and perform concealment afterwards.     

Optimal checkpointing interval for two-level recovery schemes

It is important to design computer systems to tolerate some failures. This paper proposes two-level recovery schemes, soft checkpoint (SC) and hard checkpoint (HC), which are useful to recover from failures. Soft checkpoint is less reliable and less overhead than those of HC, and is set up between HCs to reduce the overhead of the process. The total expected overhead of one cycle from HC to HC is obtained, using Markov renewal processes, and an optimal interval which minimizes it is computed. It is shown in a numerical example that a two-level recovery scheme can achieve a good performance.     

VoWLAN系统的MAC层改进机制

IEEE 802.11b的DCF接入方式是为无线数据业务提供接入而设计的,不能有效地支持诸如语音之类的实时业务。提出了两种改进的MAC层机制来提高无线局域网上传输语音（VoWLAN）的系统容量和有效性。分析和仿真结果表明,改进机制显著提高了系统容量,并保证了传输延迟、抖动和平均丢包率等服务质量（QoS）要求。     

Coding-based replication schemes for distributed systems

Data is often replicated in distributed systems to improve availability and performance. This replication is expensive in terms of disk storage since the existing schemes generally require full files to be stored at each site. In this paper, we present schemes which significantly reduce the storage requirements in replication based systems. These schemes use the coding method suggested by Rabin to store replicated data. The first scheme that we present is a modification of the simple voting algorithm and its quorum requirements. We then show how some of the extensions of the voting algorithm can also be modified to get storage efficient schemes for managing such replication. We evaluate the availability offered by these schemes and show that the storage space required to achieve certain availability are significantly lower than the conventional schemes with full file replication. Since coding is used, these schemes also provide a high degree of data security     

A tracking clock recovery receiver for 4-Gbps signaling

We previously described a design for a 4-Gbps signaling system that uses transmitter equalization to overcome the frequency-dependent attenuation in transmission lines due mainly to skin effect and dielectric absorption. Since then, at least one other group has built an experimental system that uses a similar approach. We present here experimental results from an implementation of this idea in 0.5-micron CMOS, showing the effectiveness of a simple transition-filter equalization technique. Our experimental chip uses a tracking clock recovery receiver, in which a 21-phase clock is servoed to center every other clock on the center of the data “eye”. Although oversampling clock recovery can reject jitter up to the lesser of the minimum transition frequency or the data clock frequency, it introduces quantization jitter of ∓/2k of the bit cell, where k is the number of samples per cell. Tracking recovery gives better performance when there is little jitter above the cut-off frequency of the tracking control loop, avoids quantization jitter entirely, and allows transmitter encoding with much longer run lengths. Electrical measurements in very high speed signaling systems are quite difficult to perform with conventional instrumentation, particularly for on-chip signals. To solve this problem, our design contains simple CMOS analog samplers that enable observation of on-chip signals     

The effect of knowledge representation schemes on maintainabilityof knowledge-based systems

Uses an experimental approach to investigate the representational effects of knowledge on maintainability, and compares this with the structural effects of rule sets investigated by Davis (1990). Results show that an object-based system, compared to a structured rule-based system, was easier to maintain in terms of the time to do the maintenance tasks, but not necessarily in terms of accuracy of the alterations. However, in some instances, subsumption and redundancies were introduced into the rule-based system, which can cause problems for subsequent maintenance. Subjects perceived the structured rule-base system as more complex than the object-oriented system, and perceived the object structure as more useful than the rule modularization and documentation     

Analysis of error recovery schemes for networks on chips

In this article, we discuss design constraints to characterize efficient error recovery mechanisms for the NoC design environment. We explore error control mechanisms at the data link and network layers and present the schemes' architectural details. We investigate the energy efficiency, error protection efficiency, and performance impact of various error recovery mechanisms.     

Exponential-time differencing schemes for low-mass DPD systems

Several exponential-time differencing (ETD) schemes are introduced into the method of dissipative particle dynamics (DPD) to solve the resulting stiff stochastic differential equations in the limit of small mass, where emphasis is placed on the handling of the fluctuating terms (i.e., those involving random forces). Their performances are investigated numerically in some test viscometric flows. Results obtained show that the present schemes outperform the velocity-Verlet algorithm regarding both the satisfaction of equipartition and the maximum allowable time step.     

Dejittering in the transport of MPEG-2 and MPEG-4 video

When multimedia information is transported over a packet-switched network, the quality of presentation can be degraded due to network delay variation or jitter. This paper presents a dejittering scheme that can be used in the transport of MPEG-4 and MPEG-2 video to absorb any introduced network jitter, thus preserving the presentation quality of transported media streams. The dejittering scheme is based on the statistical approximation of delay variation in the arrival times of video packets carrying encoded clock reference values and a filtering and re-stamping mechanism. In addition, a brief overview of the MPEG-4 system is presented.     

Combining synchronous and asynchronous timing schemes for high-performance systems

Globally asynchronous, locally synchronous (GALS) design is emerging as the architecture of choice for certain applications. In a GALS system, the circuitry in each timing domain is locally synchronized, and different clock domains are glued together according to asynchronous communication schemes. This issue of IEEE Design & Test introduces some basic design and validation issues of the GALS architecture. The editorial from the guest editors outlines the scope of this special theme. In addition to the special theme, this issue also includes a special section highlighting the International Test Conference (ITC). Finally, there is a short report of highlights from the 2007 Design Automation Conference held earlier this year.     

Synchronization and handoff management schemes for wireless multimedia systems

This paper presents handoff management schemes for synchronization algorithms for wireless multimedia systems. The synchronization and handoff management schemes allow mobile hosts to receive time-dependant multimedia streams without delivery interruption while moving from one cell to another. They also maintain the correct ordering of the media components, through the execution of the wireless multimedia application by a means of timestamped messages passed among mobile hosts, base stations and servers. The timestamp values are used to compute the delay for each multimedia unit for each server. Furthermore, the proposed schemes always search for a quasi-receiver among the base stations with which the mobile hosts can communicate to synchronize multimedia units. We discuss the algorithms and present a set of simulation experiments that evaluate the performance of our schemes, using message complexity and buffer usage at each frame arrival time. Our results indicate that our schemes exhibit no underflow or overflow within the bounded delivery time.     

Architectural layer recovery for software system understanding and evolution

This paper presents an approach to identify software layers for the understanding and evolution of software systems implemented with any object‐oriented programming language. The approach first identifies relations between the classes of a software system and then uses a link analysis algorithm (i.e. the Kleinberg algorithm) to group them into layers. Additionally to assess the approach and the underlying techniques, the paper also presents a prototype of a supporting tool and the results from a case study. Copyright © 2010 John Wiley & Sons, Ltd.     

RVLC decoding scheme for improved data recovery in MPEG-4 video coding standard

In this paper, we present a low-complexity ‘reversible variable length code’ (RVLC) decoding scheme for MPEG-4 video that recovers more blocks and sometimes more macroblocks (MBs) from error propagation region of corrupted video packets, as compared to the MPEG-4 scheme. The remaining blocks and MBs are concealed. Simulation studies have been carried out to show that the proposed scheme achieves better data recovery, both in terms of peak-signal-to-noise ratio (PSNR) and perceptual quality. In addition, we present more conditions for error detection than those suggested in MPEG-4, discuss properties of error propagation in corrupted video packets, and provide the RVLC codeword structure. The use of RVLC code structure will enable the decoding in both directions by using only one code table, instead of separate tables used for forward and backward decoding. Since the scheme is purely decoder based, the compliance with the standard is fully maintained. It is very simple for the decoder to keep track of the additional blocks/MBs recovered by the proposed scheme. Therefore, the data recovery scheme suggested in MPEG-4 can still be used as default scheme.     

Asymptotic recovery for discrete-time systems

An asymptotic recovery design procedure is proposed for square, discrete-time, linear, time-invariant multivariable systems, which allows a state-feedback design to be approximately recovered by a dynamic output feedback scheme. Both the case of negligible processing time (compared to the sampling interval) and of significant processing time are discussed. In the former case, it is possible to obtain perfect recovery if the plant is minimum-phase and has the smallest possible number of zeros at infinity. In other cases good recovery is frequently possible. New conditions are found which ensure that the return-ratio being recovered exhibits good robustness properties.     

Enabling MPEG-2 video playback in embedded systems through improved data cache efficiency

Digital video decoding, enabled by the MPEG-2 video standard, is an important future application for embedded systems, particularly personal digital assistants and other information appliances. Many such systems require portability and wireless communication capabilities, and thus face severe limitations in size and power consumption. This places a premium on integration and efficiency, and favors software solutions for video functionality over specialized hardware. Apart from computation, an equally important problem in video decoding is the data bandwidth and the need to insure adequate data supply. MPEG data sets are very large, and generate significant amounts of excess memory traffic for standard data caches, up to 100 times the amount required for decoding. Yet MPEG data has locality which caches can exploit if properly optimized, providing fast, flexible, and automatic data supply. We propose a set of enhancements which target the specific needs of the heterogeneous types within the MPEG decoder working set. These optimizations significantly improve the efficiency of small caches, reducing cache-memory traffic by almost 70%, and can make an enhanced 4-kB cache perform better than a standard 1 MB cache. This performance improvement can enable high-resolution, full frame rate video playback in cheaper, smaller systems than would otherwise be possible.     

Design recovery for distributed systems

Two factors limit the utility of reverse engineering technology for many distributed software systems. First, with the exception of tools that support Ada and its explicit tasking constructs, reverse engineering tools fail to capture information concerning the flow of information between tasks. Second, relatively few reverse engineering tools are available for programming languages in which many older legacy applications were written (e.g., Jovial, CMS-2, and various assembly languages). We describe approaches that were developed for overcoming these limitations. In particular, we have implemented an approach for automatically extracting task flow information from a command and control system written in CMS-2. Our approach takes advantage of a small amount of externally provided design knowledge in order to recover design information relevant to the distributed nature of the target system     

Designing lag synchronization schemes for unified chaotic systems

Lag synchronization of chaotic unified systems is investigated theoretically and numerically. Three kinds of single-controller schemes are designed to achieve lag synchronization of the so-called chaotic unified systems and some results are proved theoretically using Lyapunov’s stability theory. Computer simulations are then provided to show the effectiveness and feasibility of the proposed methods.