基本RS触发器工作状态的Multisim仿真

给出了具有置0、置1功能及不确定输出状态的基本RS触发器的Multisim仿真方法,即用字组产生器产生所需的各类输入信号,用四踪示波器同步显示输入信号及状态输出信号的波形,可直观描述触发器的置O、置1过程及不确定状态的产生过程。分析了基本RS触发器不确定状态的输出逻辑表达式及Muhisim仿真方案。所述方法的创新点是解...     

RS触发器不确定输出状态的分析

依据与非门的逻辑关系并考虑门的延迟时间,分析了基本RS触发器"不确定输出状态"产生的原因及条件,并在Multisim10仿真软件中用字组产生器产生所需的各类输入信号、用四踪示波器同步显示输入信号及状态输出信号的波形,验证了不确定状态的产生过程。从而全面、定量地描述了基本RS触发器的工作过程,有利于正确使用触发器。     

同步RS触发器工作特性的Multisim仿真

给出了具有置0、置1功能及不确定输出状态的同步RS触发器的Multisim仿真方法,即用字组产生器产生所需的各类输入信号,用四踪示波器同步显示输入信号及状态输出信号的波形,可直观描述触发器的置0、置1过程及不确定状态的产生过程。分析了同步RS触发器不确定输出状态的Multisim仿真方案。所述方法的创新点是解决了同步RS触发器的工作波形无法用电子实验仪器进行分析验证的问题。     

CMOS数字集成电路原理与应用（五）

(五)触发器触发器有两个稳定的工作状态,有一个或两个输入端和两个互补输出端。当在输入端加入不同的触发信号时,就使输出状态发生翻转,所以称为触发器。当取消触发信号时,触发器保持其输出状态不变,直到接入另一种输入时输出时才发生改变,触发器可用来组成计数器、寄存器和存储器。按其功能,触发器可分为R—S触发器、D触发器、J—K触发器、单稳态     

手把手教你学CPLD、FPGA设计(十三) 触发器的设计实验

<正> 前面介绍的组合逻辑电路,其任意时刻产生的输出仅与当时的输入有关,它没有记忆功能。而触发器是一种具有记忆功能的电路,在任意时刻产生的输出不仅与当时的输入有关,而且还与过去的输入有关。1.RS触发器1).RS触发器简介图1为RS触发器电路框图,输入端为R、S、CLK,输出端为Q、QB,其中时钟CLK为输入门控信号,只有CLK信号到来时,输入信号R、S才能进入触发器。依CLK信号的触发方式不同,RS触发器可分为上升沿触发和下降沿触发两种。图1为上升沿触发的RS触发器。RS触发器真值表如表1所示。     

在给定频率的两个信号下用于产生二进位信号的数字电路

为了在给定频率比率的二个信号下产生二进制信号，将第一个高频信号用于第一个上升计数器的记数输入，计数器的最大记数大于频率比率，通过一只解码器－－它具有一个表示全程计数的输出，一个表示频率比率计数前计数的计数输出和一个表示频率比率计数的输出，可监视在连续计数高量程中，第一个上升计数器记数所达到的值，其中连续计数包括频率比率记数和最大记数，第一个输出与电子闭合开关控制输入端相连；第二个输出与单稳态多谐振荡器的触发脉冲输入相连，第三个输出与电子开关的二个信号输入之一相连，而电子开关的另一个信号输入与闭合开关的输出相连，多谐振荡器的输出与升降计数器的升降控制输入连接，升降计数器的低计数输出和高计数输出分别与RS触发器的R输入和S输入耦合。振荡器的Q输出与开关的控制输入相接。当开关输出与第一个上升计数器的复位输入耦合时，最大计数锁定的第二上升计数器起始－复位输入与触发器的Q输出相连，第二个信号分别加到闭路接点的信号输入端及第二上升计数器的Q输出相连，第二个信号分别加到闭路接点的信号输入端及第二上升计数器和升降计数器的记数输入端，二进位信号出现在第二上升记数器的最大计数输出端。     

一种简单的分离行,场同步信号的电路

本文介绍一种采用一片74LS74A双D触发器及几个外接元件构成的简单电路,从复合同步信号中精确地分离出行、场同步信号。 D触发器的输出状态必须借助于CP脉冲,把D端输入信号存储到Q输出端,即Q端输出状态比D端输入状态延迟一个时钟脉冲周期,因而又称为延迟型触发器。74LS74A是带预     

基于CPLD/FPGA的多触发器逻辑功能模拟研究

利用FPGA／CPLD芯片高集成度、多I／O口特点，提供两种方法，通过设计输入、编译、仿真与硬件下载验证等过程，实现将基本RS、同步RS、D、JK触发器同时集成在一块FPGA／CPLD芯片中并模拟其逻辑功能。     

JC型转矩转速传感器输出信号的处理方法

为从JC型传感器获得较准确的转矩转速信号,根据其工作原理寻找合理的信号处理方法,获得电信号和转矩转速信号的转换。采用PIC18F458单片机,通过对传感器输出两路正弦电信号进行放大、滤波及整形处理后并获得两个同频信号的方波,应用RS触发电路将两路正弦信号的相位差变为触发器输出脉冲的宽度。通过脉冲计数法测量方波信号的频率获得转速,利用等精度法检测RS触发器的输出脉冲宽度求取转矩,同时运用滑动平均提高信号的准确性和稳定性。实验结果表明,该方法可有效地测量转矩转速信号,且在电动汽车和机械动力装置仪器中具有实用价值。     

数字集成电路用于线性相位检测

使用双稳态触发器的简易鉴相器,其输出往往是模糊的,亦即触发器的初始状态、输入信号相对于基准信号的相位通常是不确定的。本文介绍一种使用两个JK触发器和三个双输入端“或非”门电路构成的鉴相器,可在0°～360°范围内提供不模糊的线性输出。该电路一个输入端的相位(可超前或滞后于另一个输入端)保持与双稳态触发器的状态无关,无论信号是否连续加到鉴相器。在多卜勒测距实验中,曾要求设计一个具有这种特性的鉴相     

A systematic realization of third-order quadrature oscillator with controllable amplitude

A systematic realization of third-order quadrature oscillator using a voltage-mode non-inverting lowpass filter and a voltage-mode inverting lossless feedback integrator is presented in this paper. The proposed circuit consists of two multiple-output differential voltage current conveyor transconductance amplifiers (MO-DVCCTAs), two grounded resistors and three grounded capacitors. The new circuit provides three quadrature voltage outputs, two high-impedance quadrature current outputs, and one high-impedance current output with controllable amplitude, simultaneously. When the input bias current of the first MO-DVCCTA is a modulating signal, the circuit can generate amplitude modulation or amplitude shift keying signals. The condition of oscillation and the frequency of oscillation can be controlled independently through grounded resistors. The proposed circuit only uses grounded capacitors and grounded resistors, which can be easily implemented as an integrated circuit. The experimental results and H-Spice simulation results are given to confirm the theoretical analysis.     

基于OTRA的通用双二阶滤波器设计

提出了把通用双二阶滤波器视为负反馈放大器的观点,根据反馈电路的基本方程,利用3个MOS电阻、2个电容、2个运算跨阻放大器(OTRA)构成了通用双二阶滤波器,该滤波器不仅可从同一端口输出信号,从不同端口输入信号,而且可获得低通、高通、带通、带阻和全通输出.该电路结构简单,便于电控调谐.     

Analytical and experimental study of LINC amplifier using unmatched Wilkinson combiners

This work presents an analytical and experimental study of LINC power amplifier where an unmatched Wilkinson combiner is used at the output of two class-B amplifiers. This combiner is called unmatched because of the elimination of the one hundred ohms resistor from its input. This resistor is used to guaranty a good impedance matching between the combiner and the amplifier outputs. An amount of reflection coefficient can be presented at the input of the combiner depending on the signals phase different of the two LINC branches which that may damage the linearity of the amplified signals. Our Analytical study in this paper presents equations for the power efficiency and the signal linearity showing that despite of reflection between the combiner and the amplifiers, very good efficiency and linearity will be obtained. An ADS simulation and experimental work of the LINC system is performed shows an excellent agreement with the analytical study.     

A Peak Amplitude Selector for Electrophysiological Data Analysis

This paper describes a peak amplitude selector designed to analyze electrophysiological phenomena ranging from slow (0.1 to 1 Hz) EEG to fast (up to 200 kHz) multiple neuronal units. The selector's minimum window height of 10 mV, when used on input signals of 0.5 to 1 volt allows the selection of interesting impulses out of a group of impulses with nearly the same amplitude. To increase the selector's usefulness, four data outputs are provided: for use with a paper recorder, two low speed outputs are available? one giving a pulse out for every impulse in the window, and one giving a pulse out for every 10 pulses in the window (to overcome the problem of losing counts when a fast pulse train is processed by a slow system); a high speed output giving one pulse for every impulse in the window is available; finally, an analog output proportional to rate of arrival of impulses in the window is provided. In addition, reference outputs are supplied to display the upper and lower thresholds relative to the signal, so that the window is clearly defined. The circuit is designed to use low cost components.     

借助普通运放组成电路实现对交流信号的采集

用两片集成电路LF347组成带参考端的交流信号采集电路,具有整流、滤波和比例放大的功能,实现了对中低频信号的采集。理论分析和实验测试均得出一致结论:当交流输入端信号和参考端信号同相则输出正值,二者反相则输出负值。该电路输出为标准的CMOS电平,便于A/D采集,算法简单。在应用中该电路调节方便,具有和相同功能的集成电路LZX1一致的线性度和精度,性能价格比高。     

A Unitary Analysis of some Voltage and Current Mode Linear Circuits

This paper presents a systematic and unitary analysis of a large class of current and voltage mode circuits based on a series-shunt-like configuration. Four possible OA types are considered for the basic amplifier. The amplifiers have voltage and current input signals and voltage and current outputs. The analysis method is based on the separation of the circuit signal graph in two different paths, one that controls the gain and the other that controls the bandwidth.     

如何利用集成功放构成BTL电路

分析了分立元件BTL电路及输入信号和输出信号的特点，归纳出构成BTL电路的一般原则，同时介绍了集成功效电路在不同用法下如何构成BTL．在实际工作中使用起来更加方便容易．     

A new low-power current-mode MOS only versatile precision rectifier

In this paper, a new low-power versatile current-mode rectifier is proposed. As a salient feature, the proposed rectifier provides two positive half-wave, two inverting negative half-wave or two full-wave outputs from the same configuration. The proposed circuit employs only a dual-output second-generation current conveyor (DO-CCII) and a core rectifying circuit consisting of twelve MOS transistors. The input and output signals are current. Favorably, by adding two additional transistors, the proposed rectifier can also rectify voltage signals with electronic tuning capability. The simple and MOS only structure of the proposed circuit is highly attractive from integration point of view. In spite of providing multiple outputs at the same time, the proposed rectifier enjoys low power consumption. PSPICE simulations using 0.18 μm CMOS parameters and supply voltage of ±0.9 V demonstrate a precise operation and good temperature stability.     

A versatile CMOS linear transconductor/square-law function

A simple CMOS circuit technique for realizing both linear transconductance and a precision square-law function is described. The circuit provides two separate outputs in the linear as well as square-law modes. The linear outputs both have a range of 100% or more of the total quiescent current value. The theory of operation is presented and effects of transistor nonidealities on the performance are investigated. Design optimization techniques are developed. Experimental results measured on nonoptimized prototypes are: distortion of 0.2% for input signals up to 2.4 V/SUB p-p/ in the case of linear transfer function and 1.3% in the case of the square-law transfer function, with a DC to -3-dB bandwidth of up to 20 MHz. Improved performance is expected when the optimization techniques developed are applied. The circuit is versatile in application: diverse applications are demonstrated in the fields of linear amplifiers, continuous-time filters, and nonlinear function implementation.