Low‐voltage low‐power CMOS receiver front‐end for gigabit short‐reach optical communications

This article presents a new CMOS receiver analog front‐end for short‐reach high‐speed optical communications, which compensates the limited product bandwidth length of 1‐mm step‐index plastic optical fiber (SI‐POF) channels (45 MHz · 100 m) and the required large‐diameter high‐capacitance Si PIN photodetector (0.8 mm–3 pF). The proposed architecture, formed by a transimpedance amplifier and a continuous‐time equalizer, has been designed in a standard 0.18‐µm CMOS process with a single supply voltage of only 1 V, targeting gigabit transmission for simple no‐return‐to‐zero modulation consuming less than 23 mW. Experimental results validate the approach for cost‐effective gigabit SI‐POF transmission. Comparative analysis with previously reported POF receivers has been carried out by introducing a useful figure of merit. Copyright © 2012 John Wiley & Sons, Ltd.     

Fully integrated 2.45‐GHz OOK receiver for wireless sensor networks

This paper introduces an optimized receiver architecture using the current‐reuse technique to improve receiver sensitivity while minimizing power consumption. An ISM band wireless receiver with OOK modulation was implemented in the TSMC 0.18‐µm CMOS process. The receiver contains an RF front end, an LC‐tank based LO VCO, an IF amplifier and an OOK demodulator. In addition, the IF amplifier features a self‐mixing elimination mechanism which allows the BER to upgrade more than one order of magnitude. Measurement results show a sensitivity of ?63 dBm given a BER of 10^?3. Using the gain‐improving method, the sensitivity is improved by 4 dB (100‐kbps data rate). Including the bias circuit, overall power consumption is less than 383 μW under a 1.2‐V supply, providing an alternate solution for wireless radio applications. Copyright © 2016 John Wiley & Sons, Ltd.     

A front‐end receiver with a dual cross‐coupling technique for MICS applications

This paper presents a front‐end receiver with a dual cross‐couple technique for Medical Implant Communication Services M applications, using a standard complementary metal‐oxide semiconductor process. A lower‐power design is achieved using a resistive feedback, g_m‐boosting technique along with a current reuse topology in the receiver's transconductance stage. In addition, a dual cross‐coupling configuration applied at the input stage increases overall gain performance and reduces power consumption. The measured power dissipation of the low‐noise amplifier is only 0.51 mW. The conversion gain of the receiver is 19.74 dB, while the radio frequency and local oscillator frequencies are respectively 403.5 and 393.5 MHz, and the LO power is 0 dBm. The chip exhibits excellent isolation below −70 dB from LO to intermediate frequency and LO to radio frequency. Copyright © 2016 John Wiley & Sons, Ltd.     

Low‐frequency noise analysis and minimization in Gilbert‐cell‐based mixers for direct‐conversion (zero‐IF) low‐power front‐ends

Low‐frequency (flicker) noise is one of the most important issues in the design of direct‐conversion zero‐IF front‐ends. Within the front‐end building blocks, the direct‐conversion mixer is critical in terms of flicker noise, since it performs the signal down‐conversion to baseband. This paper analyzes the main sources of low‐frequency noise in Gilbert‐cell‐based direct‐conversion mixers, and several issues for minimizing the flicker noise while keeping a good mixer performance in terms of gain, noise figure and power consumption are introduced in a quantitative manner. In order to verify these issues, a CMOS Gilbert‐cell‐based zero‐IF mixer has been fabricated and measured. A flicker noise as low as 10.4 dB is achieved (NF at 10 kHz) with a power consumption of only 2 mA from a 2.7 V power supply. More than 14.6 dB conversion gain and noise figure lower than 9 dB (DSB) are obtained from DC to 2.5 GHz with an LO power of ?10 dBm, which makes this mixer suitable for a multi‐standard low‐power zero‐IF front‐end. Copyright © 2008 John Wiley & Sons, Ltd.     

67‐90 GHz broadband power detector with 3 GHz output bandwidth for on‐chip test of millimeter‐wave circuits

This paper presents the design of a compact and wide bandwidth millimeter‐wave power detector, integrated at the output of an E‐band power amplifier and implemented in a 55‐nm SiGe BiCMOS process. It is based on a nonlinear PMOS detector core, and its measured output voltage tracks the output power of the PA from 67 to 90 GHz. It provides an insertion loss lower than 0.2 dB, and its responsivity can be tuned between 8 and 17 V/W. The output bandwidth is bigger than 3 GHz, which allows built‐in self‐test when transmitting multigigabit millimeter‐wave signals.     

A reconfigurable high ultimate rejection inductorless band‐pass filter by the use of N‐path passive mixers

In this paper, a band‐pass filter with a tunable bandwidth and the center frequency is introduced, which employs N‐path and N × M‐path passive mixer structures, for multiband multistandard wireless receivers. The center frequency of the proposed filter is tunable from 0.1 to 1 GHz, while its bandwidth is also adjustable from 6% to 34% of the center frequency at 100 MHz. The passband ripple is reduced by applying a Miller compensation technique, resulting in a worst‐case ripple of only 1.6 dB over the entire tuning range. An additional eight‐path filter is also utilized at the input of the circuit, which highly improves the out‐of‐band rejection of the filter as well as its out‐of‐band linearity. The noise figure and the input return loss are, respectively, better than 5 and 10 dB, and depending on the desired center frequency, the total power consumption of the proposed filter varies from 41 to 70 mW.     

Design of a low‐power high open‐loop gain operational amplifier for capacitively‐coupled instrumentation amplifiers

We present the design of a low‐power high open‐loop gain opamp for use in chopper‐stabilized capacitively coupled instrumentation amplifiers (CCIAs). The opamp utilizes the current‐reuse folded‐cascode topology and a low‐power gain‐boosting technique to maximize its power efficiency and open‐loop gain. The proposed technique is applied to the designs of two CCIAs: the conservative CCIA with a moderate current scaling ratio and the stringent CCIA with a very high current scaling ratio. Utilizing the current scaling ratio of 4:1, the conservative CCIA, designed and fabricated in a 0.18 μ m CMOS process, consumes a total current of 1.69 μ A from a 0.8‐V supply voltage and achieves a thermal noise floor of 56.5 nV/ . Utilizing the current scaling ratio of 38:1, the stringent CCIA, designed and simulated in a 0.13 μ m CMOS process, consumes a total current of 1.4 μ A and achieves a thermal noise floor of 48 nV/ . The proposed design technique should benefit the designs of low‐power instrumentation amplifiers in advanced processes in which channel‐length modulation and the limited current consumption and supply voltage make the designs of high open‐loop gain opamps difficult. Copyright © 2017 John Wiley & Sons, Ltd.     

A 5‐GHz energy‐efficient tunable pulse generator for ultra‐wideband applications using a variable attenuator for pulse shaping

A new energy‐efficient tunable pulse generator is presented in this paper using 0.13‐µm CMOS technology for short‐range high‐data‐rate 3.1–10.6 GHz ultra‐wideband applications. A ring oscillator consisting of current‐starved CMOS inverters is quickly switched on and off for the duration of the pulse, and the amplitude envelope is shaped with a variable passive CMOS attenuator. The variable passive attenuator is controlled using an impulse that is created by a low‐power glitch generator (CMOS NOR gate). The glitch generator combines the falling edge of the clock and its delayed inverse, allowing the duration of the impulse to be changed over a wide range (500–900 ps) by varying the delay between the edges. The pulses generated with this technique can provide a sharp frequency roll off with high out‐of‐band rejection to help meet the Federal Communications Commission mask. The entire circuit operates in switched mode with a low average power consumption of less than 3.8 mW at 910 MHz pulse repetition frequency or below 4.2 pJ of energy per pulse. It occupies a total area of 725 × 600 µm² including bonding pads and decoupling capacitors, and the active circuit area is only 360 × 200 µm². Copyright © 2011 John Wiley & Sons, Ltd.     

Design and implementation of switched coil LC‐VCOs in the GHz range using the self‐inductance technique

This paper presents the design and implementation of dual‐band LC‐VCOs in the GHz‐range featuring a switched coil LC‐tank. The proposed design exploits the self‐inductance technique. The design of the coil starts from simple considerations and back‐of‐the‐envelope calculations, then electromagnetic simulations are used to optimize the coil layout. The sizing of the switch and its impact on the VCO performance are addressed as well. The VCOs have been implemented in 65 nm CMOS technology. Good correlation between simulated and measured tuning range and phase noise is obtained for all designs, thus confirming the validity and robustness of the design methodology and coil models. Copyright © 2013 John Wiley & Sons, Ltd.     

Design of 3.1 to 10.6 GHz ultra‐wideband flat gain LNA

In this paper, a new ultra‐wideband low‐noise amplifier (LNA) is proposed. The proposed LNA has flat gain and low noise figure (NF) in the frequency range of 3.1 to 10.6 GHz. To obtain higher gain, cascode architecture is used. In this design, to have a lower NF, the noise cancellation technique applies to the cascode architecture. In addition, to have better matching at the input and output, active feedback and matching transistors are used, which also leads to better NF. To have flat gain, RLC load is used. In the proposed LNA, only one inductor is used, which leads to the smaller chip area. The proposed circuit is designed in 90 nm CMOS technology. The simulation shows NF of between 1.62 and 2.1 dB, flat gain between 11.9 and 12 dB and power consumption of 11.72 mW in the frequency range of 3.1 to 10.6 GHz. The simulation results support the theoretical predictions. Copyright © 2017 John Wiley & Sons, Ltd.     

On frequency response and stability of an optical front–end with variable‐gain current amplifier using a bipolar junction transistor translinear loop

A comparative analysis of implementations of an optical front–end with variable transimpedance intended for optical storage systems in two different BiCMOS technologies is given in this article. The variable‐gain current amplifier within the optical front–end is designed by using a modified balanced type of the bipolar junction transistors translinear loop. The predictions of the optical front–end mathematical models are confirmed by the measured results. They show that a 0.6‐µm BiCMOS silicon technology implementation with worse bipolar junction transistor parameters (unity‐gain frequency, current gain β, and the Early voltage) gives much better stability than a 0.35‐µm BiCMOS silicon‐germanium technology implementation. As a consequence, the useful measured transimpedance dynamic range of the proposed optical front–end is 17.5 times larger in the 0.6‐µm BiCMOS silicon technology than that in the 0.35‐µm BiCMOS silicon‐germanium technology. Copyright © 2012 John Wiley & Sons, Ltd.     

Design of experiments (DOE) technique for microwave/millimeter wave flip‐chip optimization

We present a design of experiments (DOE) technique for microwave/millimeter wave flip‐chip characterization and optimization. Two optimization approaches, signal bump misalignment and transmission line compensation, are combined together for optimal performance for high frequency operation. First, the design of experiments method is presented and its advantages are emphasized. Then, the two techniques are combined together in a factorial experiment with the purpose of optimizing the return loss to any desired frequency. The experiment is based on test structure fabrication and measurements. The one‐factor‐at‐a‐time strategy shows that return loss performance is increased with the misalignment values and decreased with compensation for the frequency range of interest. However, the statistical analysis revealed that the optimal performance is achieved for maximum compensation, and minimum misalignment. The optimal structure is measured from 1 to 75 GHz and shows return loss better than 17 dB. The method can be extended to include more optimization factors in different analysis intervals. Copyright © 2003 John Wiley & Sons, Ltd.     

Development and evaluation of a long‐range 300‐m leaky coaxial cable in the 2.4‐GHz band for IEEE 802.11 b/g wireless network access

In installing wireless access systems for indoor use using IEEE 802.11b/g‐complied 2.4‐GHz band wireless local area network (LAN) units, problems that arise include blind zones and interferences caused by radio waves transmitted by neighboring access point units. To solve these problems, the use of leaky coaxial cables (LCXs) is a promising method. However, commercially available flexible LCXs with small diameters for 2.4‐GHz wireless LAN were not long enough for use in tunnels, underground facilities, and so on, and the communication characteristics of LCXs long enough for these places using wireless LAN units have not been reported. We have developed a flexible 300‐m long LCX for the 2.4‐GHz band and IEEE 802.11b/g‐complied wireless LAN units with high sensitivity. We evaluated its performance with four cable configurations and confirmed that this LCX provides wireless connections over 300 m along the cable and over 20 m lateral to the cable in an open‐air environment. We also found the coverage could be extended by a method of cable‐to‐cable links. IEEJ Trans 2010 DOI: 10.1002/tee.20604     

An extension of the FFT‐based algorithm for the match‐count problem to weighted scores

The match‐count problem on strings is the basic problem of counting the matches of characters between two strings for every possible alignment. The problem is classically computed in O (σ n log m ) time using a fast Fourier transform (FFT) for two strings of lengths m and n (m ≤ n ) over an alphabet of size σ . This paper extends the target of this FFT‐based algorithm to a weighted version of the problem, which computes the sum of similarities between characters instead of the number of matches. The algorithm extended in this paper can solve the weighted match‐count problem in O (dn log m ) time by mapping characters to numerical vectors of dimensionality d . This paper also evaluates the usefulness of the extended algorithm by applying it to plagiarism detection in documents. The experimental results show that the proposed algorithm is applicable to general vector representation of words and that the obtained plagiarism detection method can extremely reduce the processing time with a slight decrease of accuracy from the method based on the normal match‐count problem.     

Evaluation of Automatic Train Operation Design for Energy Saving Based on the Measured Efficiency of a Linear‐Motor Train

Recently, interest in energy savings in railway systems has been increasing because of its environment‐friendly aspects, for example, CO₂ emissions. In this paper, the authors propose a scheduling and control system for automatic train operation (ATO) that saves energy. This research in ATO concentrates on the optimization of speed profiles to save energy. The differences in this system from previous work are substantiative experiments on the track and a design that explicitly considers the following energy‐saving operations. First, coasting is installed in speed profiles and maximum speed is decreased by jerk regulation. Second, power‐limiting braking is used in the braking section and regenerative energy is increased. To achieve this braking efficiency, notch operations are updated. Finally, second‐order scheduling is achieved by high speed control using ATO. For the experiments on the track, the efficiency of a linear‐motor train was measured in a pre‐experiment and used to perform accurate numerical calculations. In conclusion, the numerical study shows an energy efficiency increase by 7.3% and the plan for further experiments is determined.