一种新型低功耗UHF RFID标签数字基带

设计了一款符合EPC C1 G2/ISO 18000-6C协议的超高频射频识别标签数字基带处理器。采用新型数字基带结构,并运用门控时钟、异步计数器和多种低频时钟协同工作等多种低功耗设计方法,降低了标签芯片的功耗和面积。在TSMC 0.18 μm标准CMOS工艺下流片,数字基带处理器版图面积为0.14 mm²,数字部分平均功耗为14 μW。     

无源UHFRFID标签芯片基带处理器的低功耗设计

在分析ISO18000-6C标准内容的基础上,提出了一种基带处理器的结构,设计了一款符合ISO18000-6C标准的UHF RFID标签芯片的基带处理器。该基带处理器可支持协议规定的所有强制命令。设计通过降低工作电压、降低工作频率、使用门控时钟、增加功耗管理模块等一系列低功耗设计以降低处理器的功率消耗。在Xillinx的Virtex-4FPGA上验证满足协议功能要求,并在工作电压为1V,时钟为1.92MHz时,功耗仿真结果为9.9μW,很好的完成了低功耗电子标签的基带处理器设计。     

UHF RFID标签基带处理器的ASIC设计

提出了一款基于EPC Class1 Generation2协议的UHF RFID标签基带处理器。考虑到工作距离是无源标签的一个重要指标,要提高工作距离,就要降低标签功耗,采取了一系列低功耗措施,如2.56MHz和1.28MHz的双时钟策略、增加单元开关功能以及使用异步计数器等。设计采用TSMC 0.18μm工艺,工作电压为1.8V,功耗为6.4μW,版图尺寸为415μm×398μm。采用Xilinx的FPGA开发平台进行验证,测试结果满足C1G2协议要求。     

一种基于射频电子标签的超低电压低功耗基带处理器

设计了一款应用于超高频段射频识别系统中电子标签的超低电压低功耗基带处理器.该基带处理器兼容协议,并满足无源标签的超低功耗要求.在设计上有针对性地提出了一种适合于门控时钟电源管理机制的体系结构,以及简单有效的随机数发生机制和分布式译码电路;并灵活运用了流水线结构、降低逻辑深度等低功耗技术.实现了解码/编码、CRC校验、指令解析、防碰撞机制和权限认证,以及对EEPROM的读写操作等功能.芯片采用Chartered 0.35μm 1P3M CMOS标准工艺实现,正常工作的最低电压仅为1.5V,平均电流2.1μA,功耗3.15μW,面积1.1mm×0.8mm.     

一种基于射频电子标签的超低电压低功耗基带处理器

设计了一款应用于超高频段射频识别系统中电子标签的超低电压低功耗基带处理器.该基带处理器兼容协议,并满足无源标签的超低功耗要求.在设计上有针对性地提出了一种适合于门控时钟电源管理机制的体系结构,以及简单有效的随机数发生机制和分布式译码电路;并灵活运用了流水线结构、降低逻辑深度等低功耗技术.实现了解码/编码、CRC校验、指令解析、防碰撞机制和权限认证,以及对EEPROM的读写操作等功能.芯片采用Chartered 0.35μm 1P3M CMOS标准工艺实现,正常工作的最低电压仅为1.5V,平均电流2.1μA,功耗3.15μW,面积1.1mm×0.8mm.     

超低功耗RFID标签基带处理器

针对集成片上天线(OCA)的超高频射频识别(RFID)标签设计了一款RFID专用协议的基带处理器,以满足RFID标签嵌入纸张及微小物体的防伪功能.由于OCA与读写器天线近场耦合获取能量有限,集成OCA的无源标签对功耗要求更加苛刻.针对微小OCA标签的应用需求,采用异步电路、门控时钟、低压库、多时钟域等低功耗设计方法,设计了专用协议标签基带处理器,其CMOS低压库的设计可以使基带处理器在0.5V的电源电压下工作,综合布局布线后,其电路仿真结果表明,峰值功耗仅为0.32 μW.标签芯片在UMC 0.18 μm标准工艺下流片,测试结果显示,在读写器输出20 dBm能量的情况下,带OCA标签的读距离可达2 mm.     

射频识别芯片设计中时钟树功耗的优化与实现

UHF RFID是一款超高频射频识别标签芯片,该芯片采用无源供电方式,对于无源标签而言,工作距离是一个非常重要的指标,这个工作距离与芯片灵敏度有关,而灵敏度又要求功耗要低,因此低功耗设计成为RFID芯片研发过程中的主要突破点。在RFID芯片中的功耗主要有模拟射频前端电路,存储器,数字逻辑三部分,而在数字逻辑电路中时钟树上的功耗会占逻辑功耗不小的部分。本文着重从降低数字逻辑时钟树功耗方面阐述了一款基于ISO18000-6Type C协议的UHF RFID标签基带处理器的的优化和实现。     

一种低功耗UHF RFID标签数字基带处理器

超高频射频识别(UHF RFID)电子标签的低功耗设计是当前的研究热点与难点。数字基带部分的功耗占芯片总功耗的40%以上,而时钟模块的功耗约为基带部分的50%。针对此问题,设计了一种兼容EPCTM C1 G2/ISO 18000-6C协议的新型UHF RFID标签数字基带处理器。围绕时钟信号设计了新型数字基带架构,引入局部低功耗异步电路结构,并采用模块时钟的门控动态管理技术,尽可能降低功耗。该数字基带电路在FPGA上完成了功能实测,采用SMIC 0.18 μm CMOS完成了芯片级的逻辑综合及物理实现。结果表明,版图面积为0.12 mm²,平均功耗为 8.8 μW。     

基于BLF时钟的RFID低功耗数字基带设计

提出了一种符合ISO/IEC 18000-6C协议中关于时序规定的射频识别(RFID)无源标签芯片低功耗数字基带处理器的设计.基于采用模拟前端反向散射链路频率(BLF)时钟的方案,将BLF的二倍频设置为基带中的全局时钟,构建BLF和基带数据处理速率之间的联系;同时在设计中采用门控时钟和行波计数器代替传统计数器等低功耗策略.芯片经TSMC 0.18 μmCMOS混合信号工艺流片,实测结果表明,采用该设计的标签最远识别距离为7 m,数字基带动态功耗明显降低,且更加符合RFID协议的要求.     

一种UHF RFID标签低功耗物理设计与实现

针对超高频射频识别(UHF RFID)标签低功耗、低成本的要求,本文基于EPC Class-1 Generation-2/ISO18000-6C协议,提出一种采用多电源电压域、新型时钟树综合与局部时钟树构建的物理设计方法。该方法结合广泛应用的门控时钟技术,对芯片时钟网络进行优化设计。与传统方法相比,该方法大幅度减少时钟缓冲器插入数量,有效降低时钟网络功耗,减小芯片面积。最终验证结果表明,所设计的标签符合协议,芯片总面积为0.72mm2,其中数字逻辑面积0.15mm2,平均功耗为9.76μW,在TSMC 0.18μm的标准CMOS工艺下实现流片。     

Resolution Enhancement Technology:Integrated Process Solutions using OPC

DUV lithography, using the 248 nm wavelength, is a viable manufacturing option for devices with features at 130 nm and less. Given the low kl value of the lithography, integrated process development is a necessary method for achieving acceptable process latitude. The application of assist features for rule based OPC requires the simultaneous optimization of the mask, illumination optics and the resist.Described in this paper are the details involved in optimizing each of these aspects for line and space imaging.A reference pitch is first chosen to determine how the optics will be set. The ideal sigma setting is determined by a simple geometrically derived expression. The inner and outer machine settings are determined, in turn,with the simulation of a figure of merit. The maximum value of the response surface of this FOM occurs at the optimal sigma settings. Experimental confirmation of this is shown in the paper.Assist features are used to modify the aerial image of the more isolated images on the mask. The effect that the diffraction of the scattering bars (SBs) has on the image intensity distribution is explained. Rules for determining the size and placement of SBs are also given.Resist is optimized for use with off-axis illumination and assist features. A general explanation of the material' s effect is discussed along with the affect on the through-pitch bias. The paper culminates with the showing of the lithographic results from the fully optimized system.     

Cost-effective test solutions for smart card and other integrated flash applications

From its emergence in the late 1980s as a lower cost alternative to early EEPROM technologies, flash memory has evolved to higher densities and speedsand rapidly growing acceptance in mobile applications.In the process, flash memory devices have placed increased test requirements on manufacturers. Today, as flash device test grows in importance in China, manufacturers face growing pressure for reduced cost-oftest, increased throughput and greater return on investment for test equipment. At the same time, the move to integrated flash packages for contactless smart card applications adds a significant further challenge to manufacturers seeking rapid, low-cost test.     

Theoretical analysis of the relationship between the Brillouin gain coefficient and the strain in the optical-fiber sensors

The relation between the power of the Brillouin signal and the strain is one of the bases of the distributed fiber sensors of temperature and strain. The coefficient of the Bfillouin gain can be changed by the temperature and the strain that will affect the power of the Brillouin scattering. The relation between the change of the Brillouin gain coefficient and the strain is thought to be linear by many researchers. However, it is not always linear based on the theoretical analysis and numerical simulation. Therefore, errors will be caused if the relation between the change of the Brillouin gain coefficient and the strain is regarded as to be linear approximately for measuring the temperature and the strain. For this reason, the influence of the parameters on the Brillouin gain coefficient is proposed through theoretical analysis and numerical simulation.     

An improved parallel thinning algorithm with two subiterations

The parallel thinning algorithm with two subiterations is improved in this paper. By analyzing the notions of connected components and passes, a conclusion is drawn that the number of passes and the number of eight-connected components are equal. Then the expression of the number of eight-connected components is obtained which replaces the old one in the algorithm. And a reserving condition is proposed by experiments, which alleviates the excess deletion where a diagonal line and a beeline intersect. The experimental results demonstrate that the thinned curve is almost located in the middle of the original curve connectivelv with single pixel width and the processing speed is high.     

Novel fiber-optical interferometer with miniaturized probe for in-hole measurements

Today, micro-system technology and the development of new MEMS （Micro-Electro-Mechanical Systems） are emerging rapidly. In order for this development to become a success in the long run, measurement systems have to ensure product quality. Most often, MEMS have to be tested by means of functionality or destructive tests. One reason for this is that there are no suitable systems or sensing probes available which can be used for the measurement of quasi inaccessible features like small holes or cavities. We present a measurement system that could be used for these kinds of measurements. The system combines a fiber optical, miniaturized sensing probe with low-coherence interferometry, so that absolute distance measurements with nanometer accuracy are possible.     

Development of the readout system for waveguide multilayer optical card

Waveguide multilayer optical card （WMOC） is a novel storage device of three-dimensional optical information. An advanced readout system fitting for the WMOC is introduced in this paper. The hardware mainly consists of the light source for reading, WMOC, motorized stages addressing unit, microscope imaging unit, CCD detecting unit and PC controlling ＆ processing unit. The movement of the precision motorized stage is controlled by the computer through Visual Basic （VB） language in software. A control panel is also designed to get the layer address and the page address through which the position of the motorized stages can be changed. The WMOC readout system is easy to manage and the readout result is directly displayed on computer monitor.     

Study of waveguide coupling efficiency in hybrid silicon lasers

This paper presents a new method to increase the waveguide coupling efficiency in hybrid silicon lasers. We find that the propagation constant of the InGaAsP emitting layer can be equal to that of the Si resonant layer through improving the design size of the InP waveguide. The coupling power achieves 42% of the total power in the hybrid lasers when the thickness of the bonding layer is 100 nm. Our result is very close to 50% of the total power reported by Intel when the thickness of the thin bonding layer is less than 5 nm. Therefore, our invariable coupling power technique is simpler than Intel＇s.     

Collinear phase-matching study of terahertz-wave generation via difference frequency mixed in GaAs and Inp

The collinearly phase-matching condition of terahertz-wave generation via difference frequency mixed in GaAs and InP is theoretically studied. In collinear phase-matching, the optimum phase-matching wave hands of these two crystals are calculated. The optimum phase-matching wave bands in GaAs and lnP are 0.95-1.38μm and 0.7-0.96μm respectively. The influence of the wavelength choice of the pump wave on the coherent length in THz-wave tuning is also discussed. The influence of the temperature alteration on the phase-matching and the temperature tuning properties in GaAs crystal are calculated and analyzed. It can serve for the following experiments as a theoretical evidence and a reference as well.     

Effects of the alloy compositions on the phonon-polaritons in ternary mixed crystals

Composition dependence of bulk and surface phonon-polaritons in ternary mixed crystals are studied in the framework of the modified random-element-isodisplacement model and the Bom-Huang approximation. The numerical results for Several Ⅱ - Ⅵ and Ⅲ- Ⅴ compound systems are performed, and the polariton frequencies as functions of the compositions for ternary mixed crystals AlxGa1-xAs, GaPxAS1-x, ZnSxSe1-x, GaAsxSb1-x, GaxIn1-xP, and ZnxCd1-xS as examples are given and discussed. The results show that the dependence of the energies of two branches of bulk phonon-polaritons which have phonon-like characteristics, and surface phonon-polaritons on the compositions of ternary mixed crystals are nonlinear and different from those of the corresponding binary systems.     

New insert layer structure OLEDs

An insert layer structure organic electroluminescent device（OLED） based on a new luminescent material （Zn（salen）） is fabricated. The configuration of the device is ITO/CuPc/NPD/Zn（salen）/Liq/LiF/A1/CuPc/NPD/Zn（salen）/Liq/LiF/A1. Effective insert electrode layers comprising LiF（1nm）/Al（5 nm） are used as a single semitransparent mirror, and bilayer cathode LiF（1 nm）/A1（100 nm） is used as a reflecting mirror. The two mirrors form a Fabry-Perot microcavity and two emissive units. The maximum brightness and luminous efficiency reach 674 cd/m^2 and 2.652 cd/A, respectively, which are 2.1 and 3.7 times higher than the conventional device, respectively. The superior brightness and luminous efficiency over conventional single-unit devices are attributed to microcavity effect.