SODEL FET: novel channel and source/drain profile engineering schemes by selective Si epitaxial growth technology

In this paper, novel channel and source/drain profile engineering schemes are proposed for sub-50-nm bulk CMOS applications. This device, referred to as the silicon-on-depletion layer FET (SODEL FET), has the depletion layer beneath the channel region, which works as an insulator like a buried oxide in a silicon-on-insulator MOSFET. Thanks to this channel structure, junction capacitance (C/sub j/) has been reduced in SODEL FET, i.e., C/sub j/ (area) was /spl sim/0.73 fF//spl mu/m/sup 2/ both in SODEL nFET and pFET at Vbias =0.0 V. The body effect coefficient /spl gamma/ is also reduced to less than 0.02 V/sup 1/2/. Nevertheless, current drives of 886 /spl mu/A//spl mu/m (I/sub off/=15 nA//spl mu/m) in nFET and -320 /spl mu/A//spl mu/m (I/sub off/=10 nA//spl mu/m) in pFET have been achieved in 70-nm gate length SODEL CMOS with |V/sub dd/|=1.2 V. New circuit design schemes are also proposed for high-performance and low-power CMOS applications using the combination of SODEL FETs and bulk FETs on the same chip for 90-nm-node generation and beyond.     

Investigation of breakdown and DC behavior in HBTs with (Al,Ga)As collector layer

We report on the realization of an InGaP-GaAs-based double heterojunction bipolar transistor with high breakdown voltages of up to 85 V using an Al/sub 0.2/Ga/sub 0.8/As collector. These results were achieved with devices with a 2.8 /spl mu/m collector doped to 6/spl times/10/sup 15/ cm/sup -3/ (with an emitter area of 60/spl times/60 /spl mu/m/sup 2/). They agree well with calculated data from a semi-analytical breakdown model. A /spl beta//R/sub SBI/ (intrinsic base sheet resistance) ratio of more than 0.5 by introducing a 150-nm-thick graded Al-content region at the base-collector heterojunction was achieved. This layer is needed to efficiently suppress current blocking, which is otherwise caused by the conduction band offset from GaAs to Al/sub 0.2/Ga/sub 0.8/As. The thickness of this region was determined by two-dimensional numerical device simulations that are in good agreement with the measured device properties.     

Electrical characteristics and lifetimes of microdischarge devices having thin dielectric films of aluminum oxide,boron nitride, or barium titanate

The electrical (V-I) characteristics, radiative efficiencies, and lifetimes of Ni screen/dielectric/Ni microdischarge devices, having overall thicknesses as small as <100 /spl mu/m and cylindrical microchannels 50-150 /spl mu/m in diameter, are investigated for Al/sub 2/O/sub 3/, BN, and BaTiO/sub 3/ dielectric films that are 120 or 200 /spl mu/m, 30 /spl mu/m, and 5 /spl mu/m in thickness, respectively. Having dielectrics fabricated by sol-gel processes or colloidal deposition and operated with Ne gas pressures between 300 and 1200 Torr (300K), these devices operate at voltages as low as /spl sim/93 V (100 /spl mu/m dia. BaTiO/sub 3/ device), and exhibit exceptional stability and lifetimes. After 100 h of continuous operation, a Ni screen/30 /spl mu/m BN/Ni device operating in 700 Torr Ne (static gas fill) at 100 V produces /spl sim/98% of its initial radiant output.     

50-nm gate Schottky source/drain p-MOSFETs with a SiGe channel

We propose new SiGe channel p-MOSFETs with germano-silicide Schottky source/drains (S/Ds). The Schottky barrier-height (SBH) for SiGe is expected to be low enough to improve the injection of carriers into the SiGe channel and, as a result, current drivability is also expected to improve. In this work, we demonstrate the proposed Schottky S/D p-MOSFETs down to a 50-nm gate-length. The drain current and transconductance are -339 /spl mu/A//spl mu/m and 285 /spl mu/S//spl mu/m at V/sub GS/=V/sub DS/=-1.5 V, respectively. By increasing the Ge content in the SiGe channel from 30% to 35%, the drive current. and transconductance can be improved up to 23% and 18%, respectively. This is partly due to the lower barrier-height for strained Si/sub 0.65/Ge/sub 0.35/ channel than those for strained Si/sub 0.7/Ge/sub 0.3/ channel device and partly due to the lower effective mass of the holes.     

Electrical characteristics of 8-/spl Aring/ EOT HfO/sub 2//TaN low thermal-budget n-channel FETs with solid-phase epitaxially regrown junctions

The authors demonstrate high-performing n-channel transistors with a HfO/sub 2//TaN gate stack and a low thermal-budget process using solid-phase epitaxial regrowth of the source and drain junctions. The thinnest devices have an equivalent oxide thickness (EOT) of 8 /spl Aring/, a leakage current of 1.5 A/cm/sup 2/ at V/sub G/=1 V, a peak mobility of 190 cm/sup 2//V/spl middot/s, and a drive-current of 815 /spl mu/A//spl mu/m at an off-state current of 0.1 /spl mu/A//spl mu/m for V/sub DD/=1.2 V. Identical gate stacks processed with a 1000-/spl deg/C spike anneal have a higher peak mobility at 275 cm/sup 2//V/spl middot/s, but a 5-/spl Aring/ higher EOT and a reduced drive current at 610 /spl mu/A//spl mu/m. The observed performance improvement for the low thermal-budget devices is shown to be mostly related to the lower EOT. The time-to-breakdown measurements indicate a maximum operating voltage of 1.6 V (1.2 V at 125 /spl deg/C) for a ten-year lifetime, whereas positive-bias temperature-instability measurements indicate a sufficient lifetime for operating voltages below 0.75 V.     

The effect of fabrication parameters on a ridge Mach-Zehnder interferometric (MZI) modulator

A study of Mach-Zehnder interferometer (MZI) modulators using unetched and etched Ti:LiNbO/sub 3/ waveguides has been made. A full vectorial finite-element-based mode solver was used, followed by a finite element-based solution of the Laplace equation to calculate the electrooptic effect and, subsequently, the half-wave voltage, V/sub /spl pi// The optical loss due to the metal electrodes was also found using the H-field finite-element method (FEM) incorporating the perturbation method. The microwave effective index, n/sub m/, and the characteristic impedance of the metal electrodes, Z/sub c/, were also found for a number of electrode thicknesses and ridge heights. A semivectorial finite-element beam propagation method (SVFEBPM) was used to estimate the radiation loss for the curved input and output (I/O) waveguides of the MZI. The device characteristics were then studied by making changes to a number of fabrication parameters, of which the two most important were found to be the etch depth of the ridge and the thickness of the SiO/sub 2/ buffer layer.     

AlGaN/GaN/InGaN/GaN DH-HEMTs with an InGaN notch for enhanced carrier confinement

We report an AlGaN/GaN/InGaN/GaN double heterojunction high electron mobility transistors (DH-HEMTs) with high-mobility two-dimensional electron gas (2-DEG) and reduced buffer leakage. The device features a 3-nm thin In/sub x/Ga/sub 1-x/N(x=0.1) layer inserted into the conventional AlGaN/GaN HEMT structure. Assisted by the InGaN layers polarization field that is opposite to that in the AlGaN layer, an additional potential barrier is introduced between the 2-DEG channel and buffer, leading to enhanced carrier confinement and improved buffer isolation. For a sample grown on sapphire substrate with MOCVD-grown GaN buffer, a 2-DEG mobility of around 1300 cm/sup 2//V/spl middot/s and a sheet resistance of 420 /spl Omega//sq were obtained on this new DH-HEMT structure at room temperature. A peak transconductance of 230 mS/mm, a peak current gain cutoff frequency (f/sub T/) of 14.5 GHz, and a peak power gain cutoff frequency (f/sub max/) of 45.4 GHz were achieved on a 1/spl times/100 /spl mu/m device. The off-state source-drain leakage current is as low as /spl sim/5 /spl mu/ A/mm at V/sub DS/=10 V. For the devices on sapphire substrate, maximum power density of 3.4 W/mm and PAE of 41% were obtained at 2 GHz.     

Graded base type-II InP/GaAsSb DHBT with f/sub T/=475 GHz

The first demonstration of a type-II InP/GaAsSb double heterojunction bipolar transistor (DHBT) with a compositionally graded InGaAsSb to GaAsSb base layer is presented. A device with a 0.4/spl times/6 /spl mu/m/sup 2/ emitter dimensions achieves peak f/sub T/ of 475 GHz (f/sub MAX/=265 GHz) with current density at peak f/sub T/ exceeding 12 mA//spl mu/m/sup 2/. The structure consists of a 25-nm InGaAsSb/GaAsSb graded base layer and 65-nm InP collector grown by MBE with breakdown voltage /spl sim/4 V which demonstrates the vertical scaling versus breakdown advantage over type-I DHBTs.     

2 V-operated InGaP-AlGaAs-InGaAs enhancement-mode pseudomorphic HEMT

A low-voltage single power supply enhancement-mode InGaP-AlGaAs-InGaAs pseudomorphic high-electron mobility transistor (PHEMT) is reported for the first time. The fabricated 0.5/spl times/160 /spl mu/m/sup 2/ device shows low knee voltage of 0.3 V, drain-source current (I/sub DS/) of 375 mA/mm and maximum transconductance of 550 mS/mm when drain-source voltage (V/sub DS/) was 2.5 V. High-frequency performance was also achieved; the cut-off frequency(F/sub t/) is 60 GHz and maximum oscillation frequency(F/sub max/) is 128 GHz. The noise figure of the 160-/spl mu/m gate width device at 17 GHz was measured to be 1.02 dB with 10.12 dB associated gain. The E-mode InGaP-AlGaAs-InGaAs PHEMT exhibits a high output power density of 453 mW/mm with a high linear gain of 30.5 dB at 2.4 GHz. The E-mode PHEMT can also achieve a high maximum power added efficiency (PAE) of 70%, when tuned for maximum PAE.     

A 160-GHz f/sub T/ and 140-GHz f/sub MAX/ submicrometer InP DHBT in MBE regrown-emitter technology

We report a 0.7/spl times/8 /spl mu/m/sup 2/ InAlAs-InGaAs-InP double heterojunction bipolar transistor, fabricated in a molecular-beam epitaxy (MBE) regrown-emitter technology, exhibiting 160 GHz f/sub T/ and 140 GHz f/sub MAX/. These initial results are the first known RF results for a nonselective regrown-emitter heterojunction bipolar transistor, and the fastest ever reported using a regrown base-emitter heterojunction. The maximum current density is J/sub E/=8/spl times/10/sup 5/ A/cm/sup 2/ and the collector breakdown voltage V/sub CEO/ is 6 V for a 1500-/spl Aring/ collector. In this technology, the dimension of base-emitter junction has been scaled to an area as low as 0.3/spl times/4 /spl mu/m/sup 2/ while a larger-area extrinsic emitter maintains lower emitter access resistance. Furthermore, the application of a refractory metal (Ti-W) base contact beneath the extrinsic emitter regrowth achieves a fully self-aligned device topology.     

Performance of the AlGaN HEMT structure with a gate extension

The microwave performance of AlGaN/GaN HEMTs at large drain bias is reported. The device structures were grown by organometallic vapor phase epitaxy on SiC substrates with a channel sheet resistance less than 280 ohms/square. The breakdown voltage of the HEMT was improved by the composite gate structure consisting of a 0.35 /spl mu/m long silicon nitride window with a 0.18 /spl mu/m long metal overhang on either side. This produced an metal-insulator-semiconductor (MIS) gate extension toward the drain with the insulator, silicon nitride, approximately 40-nm-thick. Transistors with a 150 /spl mu/m total gate width have demonstrated a continuous wave (CW) 10 GHz output power density and power added efficiency of 16.5 W/mm and 47%, respectively when operated at 60 V drain bias. Small-signal measurements yielded an f/sub T/ and f/sub max/ of 25.7 GHz and 48.8 GHz respectively. Maximum drain current was 1.3 A/mm at +4 V on the gate, with a knee voltage of /spl sim/5 V. This brief demonstrates that AlGaN/GaN HEMTs with an optimized gate structure can extend the device operation to higher drain biases yielding higher power levels and efficiencies than have previously been observed.     

Cat-CVD SiN-passivated AlGaN-GaN HFETs with thin and high Al composition barrier Layers

The effect of SiN surface passivation by catalytic chemical vapor deposition (Cat-CVD) on Al/sub 0.4/Ga/sub 0.6/N-GaN heterostructure field-effect transistors (HFETs) was investigated. The channel sheet resistance was reduced by the passivation due to an increase in electron density, and the device characteristics of the thin-barrier HFETs were significantly improved by the reduction of source and drain resistances. The AlGaN(8 nm)-AlN(1.3 nm)-GaN HFET device with a source/drain distance of 3 /spl mu/m and a gate length of 1 /spl mu/m had a maximum drain current density of 0.83 A/mm at a gate bias of +1.5 V and an extrinsic maximum transconductance of 403 mS/mm. These results indicate the substantial potential of Cat-CVD SiN-passivated AlGaN-GaN HFETs with thin and high Al composition barrier layers.     

High performance 35 nm gate length CMOS with NO oxynitride gate dielectric and Ni salicide

The 35 nm gate length CMOS devices with oxynitride gate dielectric and Ni salicide have been fabricated to study the feasibility of higher performance operation. Nitrogen concentration in gate oxynitride was optimized to reduce gate current I/sub g/ and to prevent boron penetration in the pFET. The thermal budget in the middle of the line (MOL) process was reduced enough to realize shallower junction depth in the S/D extension regions and to suppress gate poly-Si depletion. Finally, the current drives of 676 /spl mu/A//spl mu/m in nFET and 272 /spl mu/A//spl mu/m in pFET at V/sub dd/=0.85 V (at I/sub off/=100 nA//spl mu/m) were achieved and they are the best values for 35 nm gate length CMOS reported to date.     

High breakdown voltage (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P/InGaAs quasi-enhancement-mode pHEMT with field-plate technology

A high breakdown voltage and a high turn-on voltage (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P/InGaAs quasi-enhancement-mode (E-mode) pseudomorphic HEMT (pHEMTs) with field-plate (FP) process is reported for the first time. Between gate and drain terminal, the transistor has a FP metal of 1 /spl mu/m, which is connected to a source terminal. The fabricated 0.5/spl times/150 /spl mu/m/sup 2/ device can be operated with gate voltage up to 1.6 V owing to its high Schottky turn-on voltage (V/sub ON/=0.85 V), which corresponds to a high drain-to-source current (I/sub ds/) of 420 mA/mm when drain-to-source voltage (V/sub ds/) is 3.5 V. By adopting the FP technology and large barrier height (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P layer design, the device achieved a high breakdown voltage of -47 V. The measured maximum transconductance, current gain cutoff frequency and maximum oscillation frequency are 370 mS/mm, 22 GHz , and 85 GHz, respectively. Under 5.2-GHz operation, a 15.2 dBm (220 mW/mm) and a 17.8 dBm (405 mW/mm) saturated output power can be achieved when drain voltage are 3.5 and 20 V. These characteristics demonstrate that the field-plated (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P E-mode pHEMTs have great potential for microwave power device applications.     

A technique to improve the drive current of high-voltage I/O transistors in digital CMOS technologies

By combining a 0.12-/spl mu/m-long 1.2-V thin-oxide transistor with a 0.22-/spl mu/m-long 3.3-V thick-oxide transistor in a 0.13-/spl mu/m CMOS process, a composite MOS transistor structure with a drawn gate length of 0.34 /spl mu/m is realized. Measurements show that at V/sub GS/=1.2 V and V/sub DS/=3.3 V, the composite transistor has more than two times the drain current of the minimum channel length (0.34 /spl mu/m) 3.3-V thick-oxide transistor, while having the same breakdown voltage (V/sub BK/) as the thick-oxide transistor. Exploiting these, it should be possible to implement 3.3-V I/O transistors with better combination of drive current, threshold voltage (V/sub T/) and breakdown voltage in conventional CMOS technologies without adding any process modifications.     

InGaAs-InP mesa DHBTs with simultaneously high f/sub /spl tau// and f/sub max/ and low C/sub cb//I/sub c/ ratio

We report an InP-InGaAs-InP double heterojunction bipolar transistor (DHBT), fabricated using a conventional triple mesa structure, exhibiting a 370-GHz f/sub /spl tau// and 459-GHz f/sub max/, which is to our knowledge the highest f/sub /spl tau// reported for a mesa InP DHBT-as well as the highest simultaneous f/sub /spl tau// and f/sub max/ for any mesa HBT. The collector semiconductor was undercut to reduce the base-collector capacitance, producing a C/sub cb//I/sub c/ ratio of 0.28 ps/V at V/sub cb/=0.5 V. The V/sub BR,CEO/ is 5.6 V and the devices fail thermally only at >18 mW//spl mu/m/sup 2/, allowing dc bias from J/sub e/=4.8 mA//spl mu/m/sup 2/ at V/sub ce/=3.9 V to J/sub e/=12.5 mA//spl mu/m/sup 2/ at V/sub ce/=1.5 V. The device employs a 30 nm carbon-doped InGaAs base with graded base doping, and an InGaAs-InAlAs superlattice grade in the base-collector junction that contributes to a total depleted collector thickness of 150 nm.     

AlGaN-GaN HEMTs on Si with power density performance of 1.9 W/mm at 10 GHz

AlGaN-GaN high electron mobility transistors (HEMTs) on silicon substrate are fabricated. The device with a gate length of 0.3-/spl mu/m and a total gate periphery of 300 /spl mu/m, exhibits a maximum drain current density of 925 mA/mm at V/sub GS/=0 V and V/sub DS/=5 V with an extrinsic transconductance (g/sub m/) of about 250 mS/mm. At 10 GHz, an output power density of 1.9 W/mm associated to a power-added efficiency of 18% and a linear gain of 16 dB are achieved at a drain bias of 30 V. To our knowledge, these power results represent the highest output power density ever reported at this frequency on GaN HEMT grown on silicon substrates.     

High microwave and noise performance of 0.17-/spl mu/m AlGaN-GaN HEMTs on high-resistivity silicon substrates

AlGaN-GaN high-electron mobility transistors (HEMTs) based on high-resistivity silicon substrate with a 0.17-/spl mu/m T-shape gate length are fabricated. The device exhibits a high drain current density of 550 mA/mm at V/sub GS/=1 V and V/sub DS/=10 V with an intrinsic transconductance (g/sub m/) of 215 mS/mm. A unity current gain cutoff frequency (f/sub t/) of 46 GHz and a maximum oscillation frequency (f/sub max/) of 92 GHz are measured at V/sub DS/=10 V and I/sub DS/=171 mA/mm. The radio-frequency microwave noise performance of the device is obtained at 10 GHz for different drain currents. At V/sub DS/=10 V and I/sub DS/=92 mA/mm, the device exhibits a minimum-noise figure (NF/sub min/) of 1.1 dB and an associated gain (G/sub ass/) of 12 dB. To our knowledge, these results are the best f/sub t/, f/sub max/ and microwave noise performance ever reported on GaN HEMT grown on Silicon substrate.     

Improved temperature-dependent performances of a novel InGaP-InGaAs-GaAs double channel pseudomorphic high electron mobility transistor (DC-PHEMT)

A new InGaP-InGaAs-GaAs double channel pseudomorphic high-electron mobility transistor (DC-PHEMT) has been fabricated successfully. The detailed temperature-dependent performance is investigated. The key features of the studied device are the use of an InGaAs DC structure, triple /spl delta/-doped carrier supplier layers and good Schottky behavior of the InGaP "insulator". For a 1-/spl mu/m gate length device, the turn-on voltage of 1.46 (1.16) V, gate leakage current of 60 [600] /spl mu/A/mm at V/sub GD/ = 15 V, maximum extrinsic transconductance of 162 [145] mS/mm with 310 [260] mA/mm broad operation regime (> 0.9g/sub m,max/), output conductance of 0.41 (0.43) mS/mm, and voltage gain of 390 [335] are obtained at T = 300 [480] K, respectively. In addition, good microwave performance with a flat and wide operation regime is obtained.     

DC and RF characteristics of E-mode Ga/sub 0.51/In/sub 0.49/P-In/sub 0.15/Ga/sub 0.85/As pseudomorphic HEMTs

The DC and RF characteristics of Ga/sub 0.49/In/sub 0.51/P-In/sub 0.15/Ga/sub 0.85/As enhancement- mode pseudomorphic HEMTs (pHEMTs) are reported for the first time. The transistor has a gate length of 0.8 /spl mu/m and a gate width of 200 /spl mu/m. It is found that the device can be operated with gate voltage up to 1.6 V, which corresponds to a high drain-source current (I/sub DS/) of 340 mA/mm when the drain-source voltage (V/sub DS/) is 4.0 V. The measured maximum transconductance, current gain cut-off frequency, and maximum oscillation frequency are 255.2 mS/mm, 20.6 GHz, and 40 GHz, respectively. When this device is operated at 1.9 GHz under class-AB bias condition, a 14.7-dBm (148.6 mW/mm) saturated power with a power-added efficiency of 50% is achieved when the drain voltage is 3.5 V. The measured F/sub min/ is 0.74 dB under I/sub DS/=15 mA and V/sub DS/=2 V.