Crystalline orientation dependence of electrical properties of Mn Germanide/Ge(1 1 1) and (0 0 1) Schottky contacts

We have investigated the crystalline orientation dependence of the electrical properties of Mn germanide/Ge(1 1 1) and (0 0 1) Schottky contacts. We prepared epitaxial and polycrystalline Mn₅Ge₃ layers on Ge(1 1 1) and (0 0 1) substrates, respectively. The Schottky barrier height (SBH) estimated from the current density-voltage characteristics for epitaxial Mn₅Ge₃/Ge(1 1 1) is as low as 0.30 eV, while the SBH of polycrystalline Mn₅Ge₃/Ge(0 0 1) is higher than 0.56 eV. On the other hand, the SBH estimated from capacitance-voltage characteristics are higher than 0.6 eV for both samples. The difference of these SBHs can be explained by the local carrier conduction through the small area with the low SBH regions in the epitaxial Mn₅Ge₃/Ge(1 1 1) contact. This result suggests the possibility that the lowering SBH takes place due to Fermi level depinning in epitaxial germanide/Ge(1 1 1) contacts.     

High quality relaxed Ge layers grown directly on a Si(0 0 1) substrate

After a long period of developing integrated circuit technology through simple scaling of silicon devices, the semiconductor industry is now embracing technology boosters such as strain for higher mobility channel material. Germanium is the logical supplement to enhance existing technologies, as its material behaviour is very close to silicon, and to create new functional devices that cannot be fabricated from silicon alone (Hartmann et al. (2004) [1]). Germanium wafers are, however, both expensive and less durable than their silicon counterparts. Hence it is highly desirable to create a relaxed high quality Ge layer on a Si substrate, with the provision that this does not unduly compromise the planarity of the system. The two temperature method, proposed by Colace et al. (1997) [2], can give smooth (RMS surface roughness below 1 nm) and low threading dislocation density (TDD <10⁸ cm⁻²) Ge layers directly on a Si(0 0 1) wafer (Halbwax et al. (2005) [3]), but these are currently of the order of 1-2 μm thick (Hartmann et al. (2009) [4]).We present an in depth study of two temperature Ge layers, grown by reduced pressure chemical vapour deposition (RP-CVD), in an effort to reduce the thickness. We report the effect of changing the thickness, of both the low temperature (LT) and the high temperature (HT) layers, emphasising the variation of TDD, surface morphology and relaxation.Within this study, the LT Ge layer is deposited directly on a Si(0 0 1) substrate at a low temperature of 400 °C. This low temperature is known to generate monolayer islands (Park et al. (2006) [5]), but is sufficiently high to maintain crystallinity whilst keeping the epitaxial surface as smooth as possible by suppressing further island growth and proceeding in a Frank-van der Merwe growth mode. This LT growth also generates a vast number of dislocations, of the order of 10⁸-10⁹ cm⁻², that enable the next HT step to relax the maximum amount of strain possible. The effect of varying the HT layer thickness is studied by depositing on a LT layer of fixed thickness (100 nm) at a higher growth temperature of 670 °C. We find that the HT layer allows Ge-on-Ge adatom transport to minimise the surface energy and smooth the layer. The final step to the technique is annealing at a high temperature that allows the dislocations generated to glide, increasing the degree of relaxation, and annihilate. We find that annealing can reduce the TDD to the order of 10⁷ cm⁻², but at a cost of a significantly roughened surface.     

Influence of the oxidation temperature on the non-trigonal Ge dangling bonds at the (1 0 0)Ge/GeO2 interface

GeO₂ was proposed as valuable passivation layer at the surface with Ge to integrate oxide with high dielectric constant in Ge-based logic devices. Hence, the identification of the defects present at different Ge/GeO₂ interfaces becomes a mandatory issue to predict the electrical features of devices based on such materials. High sensitive electrically detected magnetic resonance measurements were performed to study the microstructure of defects occurring at such an interface. The influence of the oxidation temperature on the electrically active paramagnetic traps was investigated.     

Epitaxial growth of Fe/MgO/Ge(0 0 1) heterostructures

We report on the growth of epitaxial Fe/MgO heterostructures on Ge(0 0 1) by Molecular Beam Epitaxy. The better crystal quality and interfacial chemical sharpness at the oxide-semiconductor interface have been obtained by growing MgO at room temperature, followed by a post-annealing at 773 K, on top of a p(2 × 1)-Ge(0 0 1) clean surface. The growth of Fe at room temperature followed by annealing at 473 K gives the best epitaxial structure with optimized crystallinity of each layer compatible with limited chemical interdiffusion. Tunneling devices based on the epitaxial Fe/MgO/Ge heterostructure have been micro-fabricated and tested in order to probe the electrical properties of the MgO barrier. The current-voltage characteristics clearly show that tunneling is the dominant phenomenon, thus indicating that this system is very promising for practical applications in electronics and spintronics.     

Performance of (1 1 0) p-channel SOI-MOSFETs fabricated by deep-amorphization and solid-phase epitaxial regrowth processes

The impact of local deep-amorphization (DA) and subsequent solid-phase epitaxial regrowth (SPER) are studied for the co-integration of devices with hybrid surface orientation. Thin-body p-channel transistors with 20 nm thick film and HfO₂ gate insulator/metal gate along several directions on a (1 1 0) substrate were fabricated and characterized. No deterioration of transconductance or threshold voltage was induced by DA/SPER process. Device co-integration using DA/SPER process is therefore a realistic option. 〈1 1 0〉 channel on (1 1 0) SOI film yields a 200% gain on the current for the (1 0 0) surface orientation. However, the benefit of it decreases with the channel length.     

Density functional theory study of first-layer adsorption of ZrO2 and HfO2 on Ge(1 0 0)

Density functional theory was used to performed a survey of transition metal oxide (MO₂ = ZrO₂, HfO₂) ordered molecular adsorbate bonding configurations on the Ge(1 0 0)-4 × 2 surface. Surface binding geometries of metal-down (O-M-Ge) and oxygen-down (M-O-Ge) were considered, including both adsorbate and displacement geometries of M-O-Ge. Calculated enthalpies of adsorption show that bonding geometries with metal-Ge bonds (O-M-Ge) are essentially degenerate with oxygen-Ge bonding (M-O-Ge). Calculated electronic structures indicate that adsorbate surface bonding geometries of the form O-M-Ge tend to create a metallic interfaces, while M-O-Ge geometries produce, in general, much more favorable electronic structures. Hydrogen passivation of both oxygen and metal dangling bonds was found to improve the electronic structure of both types of MO₂ adsorbate systems, and induced the opening of true semiconducting band gaps for the adsorbate-type M-O-Ge geometries. Shifts observed in the DOS minima for both O-M-Ge and M-O-Ge adsorbate geometries are consistent with surface band bending induced by the adsorbate films, where such band bending extends much further into the Ge substrate than can be modeled by the Ge slabs used in this work.     

Solid phase epitaxial growth of Dy-germanide films on Ge(0 0 1) substrates

Dy thin films are grown on Ge(0 0 1) substrates by molecular beam deposition at room temperature. Subsequently, the Dy film is annealed at different temperatures for the growth of a Dy-germanide film. Structural, morphological and electrical properties of the Dy-germanide film are investigated by in situ reflection high-energy electron diffraction, and ex situ X-ray diffraction, atomic force microscopy and resistivity measurements. Reflection high-energy electron diffraction patterns and X-ray diffraction spectra show that the room temperature growth of the Dy film is disordered and there is a transition at a temperature of 300-330 °C from a disordered to an epitaxial growth of a Dy-germanide film by solid phase epitaxy. The high quality Dy₃Ge₅ film crystalline structure is formed and identified as an orthorhombic phase with smooth surface in the annealing temperature range of 330-550 °C. But at a temperature of 600 °C, the smooth surface of the Dy₃Ge₅ film changes to a rough surface with a lot of pits due to the reactions further.     

Origin of electron mobility enhancement in (1 1 1)-oriented InGaAs channel metal-insulator-semiconductor field-effect-transistors

Electrical and physical characteristics of the Al₂O₃/InGaAs interfaces with (1 1 1)A and (1 0 0) orientations were investigated in an attempt to understand the origin of electron mobility enhancement in the (1 1 1)A-channel metal-insulator-semiconductor field-effect-transistor. The (1 1 1)A interface has less As atoms of high oxidation states as probed by X-ray photoelectron spectroscopy. The electrical measurements showed that energy distribution of the interface traps for the (1 1 1)A interface is shifted toward the conduction band as compared to that for the (1 0 0) interface. Laterally-compressed cross-section transmission electron microscopy images showed that the characteristic lengths of the interface roughness are different between the (1 1 1)A and (1 0 0) interfaces. The contributions of the Coulomb and roughness scattering mechanisms are discussed based on the experimental results.     

Epitaxial growth of Dy2O3 thin films on epitaxial Dy-germanide films on Ge(0 0 1) substrates

Ultra-thin films of Dy are grown on Ge(0 0 1) substrates by molecular beam deposition near room temperature and immediately annealed for solid phase epitaxy at higher temperatures, leading to the formation of DyGe_x films. Thin films of Dy₂O₃ are grown on the DyGe_x film on Ge(0 0 1) substrates by molecular beam epitaxy. Streaky reflection high energy electron diffraction (RHEED) patterns reveal that epitaxial DyGe_x films grow on Ge(0 0 1) substrates with flat surfaces. X-ray diffraction (XRD) spectrum suggests the growth of an orthorhombic phase of DyGe_x films with (0 0 1) orientations. After the growth of Dy₂O₃ films, there is a change in RHEED patterns to spotty features, revealing the growth of 3D crystalline islands. XRD spectrum shows the presence of a cubic phase with (1 0 0) and (1 1 1) orientations. Atomic force microscopy image shows that the surface morphology of Dy₂O₃ films is smooth with a root mean square roughness of 10 Å.     

Growth and fabrication of AlGaN/GaN HEMT based on Si(1 1 1) substrates by MOCVD

AlGaN/GaN high electron mobility transistor (HEMT) hetero-structures were grown on the 2-in Si (1 1 1) substrate using metal-organic chemical vapor deposition (MOCVD). Low-temperature (LT) AlN layers were inserted to relieve the tension stress during the growth of GaN epilayers. The grown AlGaN/GaN HEMT samples exhibited a maximum crack-free area of 8 mm×5 mm, XRD GaN (0 0 0 2) full-width at half-maximum (FWHM) of 661 arcsec and surface roughness of 0.377 nm. The device with a gate length of 1.4 μm and a gate width of 60 μm demonstrated maximum drain current density of 304 mA/mm, transconductance of 124 mS/mm and reverse gate leakage current of 0.76 μA/mm at the gate voltage of −10 V.     

Electron tunneling in MIS capacitors with the MBE-grown fluoride layers on Si(1 1 1) and Ge(1 1 1): Role of transverse momentum conservation

The current-voltage characteristics of the metal-insulator-semiconductor tunneling structures with calcium fluoride are simulated using different theoretical models. The results are compared to the data of current measurements on the fabricated capacitors with 1-3 nm epitaxial fluorides. Best agreement is achieved imposing a condition of transverse momentum k_⊥ conservation for a tunneling electron. This fact may be treated as an experimental proof for the k_⊥ conservation in the examined high-quality structures which was not directly confirmed on more traditional structures with oxide dielectrics.     

X-ray microdiffraction investigation of crystallinity and strain relaxation in Ge thin lines selectively grown on Si(0 0 1) substrates

We used X-ray microdiffraction (XRMD) to investigate the crystallinity and strain relaxation of Ge thin lines with widths of 100, 200, 500 and 1000 nm selectively grown on Si(0 0 1) substrates using a patterned SiO₂ mask by chemical vapor deposition. The variations of the strain relaxation in the line and width directions were also investigated in Ge thin lines with a width of 100 nm. After growth, crystal domains with very small tilt angles were detected in Ge lines with all four line widths. The tilt angle range was larger in thinner Ge lines. After annealing at 700 °C, the formation of a single, large domain with a specific tilt angle was detected by XRMD for Ge thin lines with widths of 100 and 200 nm. These experimental results reflect the effects of SiO₂ side walls around the Ge thin lines on crystallinity and strain relaxation of Ge.     

Structural and electrical properties of Er-doped HfO2 and of its interface with Ge (0 0 1)

Er-doped HfO₂ thin films with Er content ranging from 0% to 15% are deposited by atomic layer deposition on native oxide free Ge(001). The crystallographic phase is investigated by X-ray diffraction and is found to depend on the Er%. The cubic fluorite structure develops on Ge for Er% as low as 4% and is stable after annealing at 400 °C in N₂. Microstrain increases with increasing the Er content within the fluorite structure. Time of flight secondary ion mass and electron energy loss spectroscopy evidence a Ge diffusion from the substrate that results in the formation of a Ge-rich interfacial region which does not present a structural discontinuity with the oxide. The diffusion of Ge is enhanced by the annealing and causes a reordering of the crystal lattice. In annealed films the interface defect density measured by low temperature conductance measurements is found to decrease with decreasing the Er content.     

Stability of Frenkel pairs in Si(1 0 0) surface in the presence of germanium and oxygen atoms

A first-principles pseudo-potential study of Frenkel pair generation close to the Si(1 0 0) surface in the presence of germanium and oxygen atoms is reported. The energies and structures of the defect structures (i.e. vacancy and relaxed tetrahedral Si interstitial) are calculated using supercell with up to 88 atoms. We present results obtained using the generalized gradient approximation (GGA) for the exchange-correlation energy. We examine the effect of the presence of germanium and oxygen atoms on the stability of Frenkel pairs generated near the Si(1 0 0) surface by comparing a number of individual cases, starting from vacancy interstitial pairs situated at various positions. The general tendency of the created interstitials is to climb towards the surface, but they generally remain in subsurface layers, ready to migrate into the layer. This tendency is enhanced by the presence of the Ge and/or O atoms. We show that the formation energy is lower and Si interstitials can be created with energies as low as 1.5 eV.     

Convex corners undercutting and rhombus compensation in KOH with and without IPA solution on (1 1 0) silicon

The present investigation introduces convex corners undercutting and results of rhombus compensation patterns in 40% aqueous KOH solution and in KOH saturated with isopropanol (IPA) solution. All experiments are carried out on (1 1 0) silicon at 70 °C. Undercuts take place on convex corners in both solutions. Moreover, the front etch planes governing undercut vary with solutions. Rhombus compensations are used to correct the undercut. Perfect acute corner without residue is obtained, and there are only some residue structures on both sides of obtuse convex corners in KOH with IPA solution, which are better results than those in pure aqueous KOH solution.     

Antimonide Type-II “W” Photodiodes with Long-Wave Infrared <Emphasis Type="Italic">R</Emphasis><Subscript>0</Subscript><Emphasis Type="Italic">A</Emphasis> Comparable to HgCdTe

The recent development of graded-gap W-structured superlattices (GG-Ws) has led to a substantial improvement in the dark current performance of infrared photodiodes implemented with type-II superlattices (T2SLs). A study of ten GG-W photodiode wafers with 50% power responsivity cutoffs from 9 μm to 13.4 μm is presented. Dark current performance has increased by a factor of 10 over that of previous type-II structures, without degrading quantum efficiency. In relation to HgCdTe (MCT) based photodiodes, several samples in the study show effective dynamic-resistance-area products close to the MCT trend line for diffusion-limited R ₀ A.     

Size dependence of hall mobility and dislocation density in Ge heteroepitaxial layers grown by MBE on a SiO2 patterned Si template

We have investigated the size dependent properties of the Hall mobility and etch pit dislocations (EPDs) in germanium (Ge) heteroepitaxial layers. Pure Ge thin films were grown by molecular beam epitaxy (MBE) using pattern guided growth at 650 °C and compared with homoepitaxially grown films. The results show enhanced Hall mobility and lower dislocation density as the pattern size decreases. The number of EPDs was decreased by one order of magnitude and the Hall mobility measured with different sizes of van der Pauw patterns was enhanced by two times as the pattern size was decreased from 200×200 μm² to 3×3 μm². Raman spectroscopy was also employed to characterize residual strain and crystalline quality of the epitaxial films with respect to the pattern size. We conclude that nano-scale pattern guided heteroepitaxial growth of Ge may be a plausible method for monolithic integration of Ge optoelectronic or electronic devices onto a Si substrate.     

An efficient wet-cleaning of SiGe virtual substrates and of thick, pure Ge layers on Si(0 0 1) after a chemical mechanical planarization step

The aim of this study is to propose an efficient wet cleaning of the surfaces of the SiGe virtual substrates just after a chemical mechanical polishing step. We have first of all studied the chemical compatibility of miscellaneous solutions, such as the standard cleaning 1 (SC1), the Standard Cleaning 2 (SC2), the CARO one etc with SiGe. A definite, logarithmic-like increase of the etch rate with the Ge content has been obtained for the SC1, the SC2 and the CARO solutions (with values 1000-10,000 those of Si evidenced for pure Ge), making them unsuitable for Ge contents above 30%. We have thus investigated the efficiency of new cleaning sequences (named “DDC-SiGe” for SiGe and “HF/O₃” for pure Ge) that call upon diluted HF and ozone solutions spiked with HCl, on SiGe and pure Ge. The overall material consumption of those cleaning sequences, which increases from 10 Å for pure Si up to 130 Å for pure Ge, is quite low. The particle removal efficiency of such cleanings is around 99% for Si_0.8Ge_0.2 and Si_0.7Ge_0.3. It drops down to 83% for Si_0.5Ge_0.5 and to 65% for pure Ge. This is most probably due to pre-existing epitaxy defects which are revealed during the wet cleaning then wrongly assimilated to particles by our surface inspection tool. The metallic contaminants present on the surface after the use of our wet cleaning sequences have a surface density lower than 10¹⁰ atoms cm⁻², this whatever the Ge content of the underlying layer.     

105 nm Gate length pMOSFETs with high-K and metal gate fabricated in a Si process line on 200 mm GeOI wafers

We report on the fabrication and electrical characterization of deep sub-micron (gate length down to 105 nm) GeOI pMOSFETs. The Ge layer obtained by hetero-epitaxy on Si wafers has been transferred using the Smart Cut^TM process to fabricate 200 mm GeOI wafers with Ge thickness down to 60–80 nm. A full Si MOS compatible pMOSFET process was implemented with HfO₂/TiN gate stack. The electrical characterization of the fabricated devices and the systematic analysis of the measured performances (I_ON, I_OFF, transconductance, low field mobility, S, DIBL) demonstrate the potential of pMOSFET on GeOI for advanced technological nodes. The dependence of these parameters have been analyzed with respect to the gate length, showing very good transport properties (μ_h ～ 250 cm²/V/s, I_ON = 436 μA/μm for L_G = 105 nm), and OFF current densities comparable or better than those reported in the literature.     

High Performance Nonconductive Film with <Emphasis Type="Italic">π</Emphasis>-Conjugated Self-Assembled Molecular Wires for Fine Pitch Interconnect Applications

In this paper, we introduce a novel approach of using π-conjugated molecular wires to improve the electrical properties of nonconductive films (NCFs) for the electronic interconnects. Two thiol (-SH) terminated conjugated molecular wires, 1,4-benezenedithiol (BDT) and biphenyldithiol (BPD), are incorporated into an NCF formulation and investigated. The molecular wires can be well assembled on the gold (Au) electrodes and improve the interfacial properties of the NCF joints. The BPD exhibits higher thermal stability after curing at 150°C than BDT due to the higher aromaticity (more aromatic rings) and thus more rigid structure. Formation of a self-assembled monolayer on Au electrodes can tune the effective work function (Φ) of Au electrodes and reduce the tunnel resistivity. Therefore, the joint resistance of NCF joints, which is the sum of tunnel resistance and constriction resistance, can be significantly reduced from 0.15 × 10⁻³ Ω to 0.1 × 10⁻³ Ω and 0.05 × 10⁻³ Ω with BDT and BPD, respectively. The improved electrical conduction and current carrying capability enables the application of the NCF in fine pitch and high performance electronic interconnects in microelectronics.