纳米压印技术的最新进展

总结了纳米压印技术的最新进展,其中包括压印工艺、图形赋形方法以及纳米压印技术应用三方面最新的研究成果。在压印工艺的发展方面,大面积滚轴压印的发明最具有产业化意义,它不仅解决了常规平板压印很难大面积压印成型的困难,而且整个过程是一种柔性压印过程,降低了成本,提高了压印效率,但是最小特征尺寸还有待提高;在图形赋形方法的改进中,聚合物探针阵列技术集微米和纳米成型技术于一身,压印效率高,应用前景广阔;在压印技术应用的发展中,光伏电池、电子存储设备以及传感器等为纳米压印技术的应用提供了新的领域。     

Printing of Highly Integrated Crossbar Junctions

A new process is presented that combines nanoimprint lithography and soft lithography to assemble metal–bridge–metal crossbar junctions at ambient conditions. High density top and bottom metal electrodes with half‐pitches down to 50 nm are fabricated in a parallel process by means of ultraviolet nanoimprint lithography. The top electrodes are realized on top of a sacrificial layer and are embedded in a polymer matrix. The lifting of the top electrodes by dissolving the sacrificial layer in an aqueous solution results in printable electrode stamps. Crossbar arrays are noninvasively assembled with high yield by printing the top electrode stamps onto bare or modified bottom electrodes. A semiconducting and a quasi metal like conducting type of polymer are incorporated in the cross points to form metal‐polymer‐metal junctions. The electrical characterization of the printed junctions revealed that the functional integrity of the electrically addressed conductive polymers is conserved during the assembling process. These findings suggest that printing of electrodes represents an easy and cost effective route to highly integrated nanoscale metal‐bridge‐metal junctions if imprint lithography is used for electrode fabrication.     

从特征尺寸的缩小看光刻技术的发展

从特征尺寸不断缩小变化的角度阐述了近代光刻技术发展的历程。指出90nm节点的主流光刻技术是193nmArF光刻;193nm浸入式光刻技术作为65nm和45nm节点的首选光刻技术,如果配合二次曝光技术,还可以扩展到32nm节点的应用,但成本会增加;如果特征尺寸缩小到22nm和16nm节点,EUV光刻、无掩模光刻以及纳米压印光刻等将成为未来发展的重要研究方向。在对各种光刻技术的原理、特点以及优缺点等分析对比的基础上,对未来主流光刻技术的发展做了一定的展望。     

Imprint lithography enabling ultra-low loss coaxial interconnects

Processing techniques have been demonstrated to fabricate a novel structure with smooth transitions, metallic shielding, and encapsulated air dielectric layers using sacrificial polymers and the three-dimensional patterning capabilities of imprint lithography. This innovative structure incorporates encapsulated air dielectrics with copper shielding. A semicircular stamp was fabricated to create the circular base of the coaxial transmission line using the reflow properties of solder, and imprinting the stamp produced smooth rounded terminations. Copper shielding was electroplated and a sacrificial photosensitive polycarbonate was patterned using a unique interaction with the copper. The polycarbonate was over-coated with a epoxycyclohexyl polyhedral oligomeric silsesquioxane (POSS) layer and then thermally decomposed to form an air cavity. A center conductor was patterned using photolithography and electro-deposition. The half-coaxial line was aligned with a sample with the top portion of the copper shielding and bonded in the imprinter to complete the structure. Imprint lithography also demonstrated the capability to planarize surfaces which simplified the buildup process, and complex structures were fabricated with a comparable number of registration steps to traditional transmission lines. The mechanical integrity of the air-clad transmission lines was also evaluated using nano-indentation.     

Microfabrication of a nickel mold insert by a modified deep X-ray lithography process and its application to hot embossing

In the present study, a modified deep X-ray lithography process is utilized for an efficient fabrication of precise metallic mold insert. A bare bulk polymethylmethacrylate (PMMA) sheet is used without any substrate as an X-ray photoresist in order to achieve a stable fabrication by avoiding a generation of a secondary radiation during a deep X-ray lithography process. The patterned PMMA sheet after development is then bonded on a metallic substrate using adhesive layers. The adhesive layers on the opened region of the patterned PMMA sheet are subsequently removed by X-ray exposure of short duration time. The next procedure is an electroplating process onto the opened area in the PMMA sheet, consequently resulting in the final mold insert. In this manner, a robust metallic mold insert for a mass replication of microstructures could be realized quite efficiently. The present fabrication method is confirmed by an example with a replication of microchannels via hot embossing process.     

Negative UV–NIL (NUV–NIL) – A mix-and-match NIL and UV strategy for realisation of nano- and micrometre structures

This paper presents a novel strategy for aligning patterns created with nano-imprint lithography (NIL) and UV lithography, similar to a mix-and-match process, which allows for the fabrication of large and small features in a single layer of resist. The resin used to demonstrate this new imprinting scheme is SU-8, a very widely used negative photoresist. Rapid stamp manufacturing using ma-N 2405 photoresist is also demonstrated. The processing scheme is a promising candidate for patterning of sensors featuring nanometre sized electrodes.     

Sacrificial film-assisted nanoimprint lithography

We have demonstrated a nanopattterning technique that combines the use of sacrificial film and nanoimprint lithography. The sacrificial film serves as a ‘transient substrate’ during the nanoimprinting steps. The use of a sacrificial film improves the patterning yield significantly because the de-molding is achieved by etching off the sacrificial film, instead of a mechanical de-molding as in conventional nanoimprint lithography. This patterning technique is an easy method to build up multilayer structure from a single type of polymer. The method is also highly versatile; both substrate supported and freestanding nanostructures can be easily achieved by this technique.     

纳米间隙电极的加工研究进展

分类介绍了国内外加工纳米间隙电极的主要研究进展，并特别介绍了近期发展起来的一般光刻技术结合选择性化学沉积方法制备纳米间隙电极的研究结果，对今后的相关研究问题进行了讨论。采用选择性化学沉积技术制备镍双电极的间隙已可小于100nm。该技术对于制备纳米间隙电极具有一定的优势。     

大面积规则排布的AlN纳米柱阵列制备

采用金属有机化合物化学气相沉积(MOCVD)方法在2英寸(1英寸=2.54 cm)c面蓝宝石衬底上异质外延厚度1μm、具有原子级平整表面的高质量氮化铝(AlN)外延层.并在此高质量AlN薄膜的基础上开发了基于纳米压印光刻技术、干法刻蚀和湿法腐蚀相结合的工艺,通过自上而下的方法制备得到了大面积范围内规则排列的AlN纳米柱阵列,纳米柱的高度和直径分别为1μm和535 nm.研究结果表明,高晶体质量的AlN材料以及基于AZ400K溶液的湿法腐蚀工艺是制备无腐蚀坑且侧壁光滑的垂直AlN纳米柱阵列的关键.AlN纳米柱阵列的制备为深紫外纳米柱发光器件的研究奠定了基础.     

硅集成电路光刻技术的发展与挑战

从微电子集成电路技术发展的趋势,介绍了集成电路技术发展对光刻曝光技术的需求,综述了当前主流的DUV光学曝光技术和新一代曝光技术中的157nm光学曝光、13nm EUV曝光、电子束曝光、X射线曝光、离子束曝光和纳米印制光刻技术的发展状况及所面临的技术挑战.同时,对光学曝光技术中采用的各种分辨率增强技术如偏轴照明(OAI)、光学邻近效应校正(OPC)、移相掩膜(PSM)、硅片表面的平整化、光刻胶修剪(resist trimming)、抗反射功能和表面感光后的多层光刻胶等技术的原理进行了介绍,并对不同技术时代可能采用的曝光技术作了展望性的评述.     

Limits of nano-gate fabrication

The authors review the limits of nanometer-scale gate electrode (nano-gate) fabrication. The technology to fabricate nano-gates has become increasingly important in recent years as the scaling limits of conventional electronic devices and the quantum effects of novel devices are investigated. Consistent with the technology used to fabricate virtually all of the smallest devices to date, the emphasis is on the resolution limits of electron beam lithography and associated ultrahigh resolution resists. Recent results of directly patterning SiO₂ with nanometer-scale resolution by e-beam exposure through a sacrificial layer are also presented. Because the high resistance normally associated with nanometer-scale electrodes seriously limits the performance of high-frequency devices, various techniques to reduce the gate resistance are compared     

应用于PHEMT器件的深亚微米T形栅光刻技术

PHEMT器件和基于它的高频单片集成电路广泛应用于现代微波/毫米波系统。当PHEMT器件的栅长缩短到足够短的时候,沿着栅宽方向的寄生电阻会影响PHEMT器件的性能。为了解决这个问题,一种具有大截面面积而底部长度却很小的T形栅结构通常被用于制作PHEMT器件,因为这种结构可以有效地减少由于栅寄生电阻而引起的晶体管噪声。对几种常用的制作深亚微米T形栅的三种光刻技术即光学光刻、电子束光刻、X射线光刻技术进行了比较分析。对于光学光刻技术,通常需要采用移相和光学邻近效应校正技术,它的制作成本低,但是很难用于制作深亚微米T形栅;对于电子束光刻技术,通常需要采用高灵敏度和低灵敏度的多层胶技术,虽然它的栅长可以制作到非常小,但是它的生产成本非常高,而且它的生产效率非常低;对于X射线光刻技术,它不仅可以用于制作深亚微米T形栅,而且它的生产效率非常高,T形栅的形状可以非常容易控制。     

Conformal Printing of Graphene for Single‐ and Multilayered Devices onto Arbitrarily Shaped 3D Surfaces

Printing has drawn a lot of attention as a means of low per‐unit cost and high throughput patterning of graphene inks for scaled‐up thin‐form factor device manufacturing. However, traditional printing processes require a flat surface and are incapable of achieving patterning onto 3D objects. Here, a conformal printing method is presented to achieve functional graphene‐based patterns onto arbitrarily shaped surfaces. Using experimental design, a water‐insoluble graphene ink with optimum conductivity is formulated. Then single‐ and multilayered electrically functional structures are printed onto a sacrificial layer using conventional screen printing. The print is then floated on water, allowing the dissolution of the sacrificial layer, while retaining the functional patterns. The single‐ and multilayer patterns can then be directly transferred onto arbitrarily shaped 3D objects without requiring any postdeposition processing. Using this technique, conformal printing of single‐ and multilayer functional devices that include joule heaters, resistive deformation sensors, and proximity sensors on hard, flexible, and soft substrates, such as glass, latex, thermoplastics, textiles, and even candies and marshmallows, is demonstrated. This simple strategy promises to add new device and sensing functionalities to previously inert 3D surfaces.     

Free-standing thick-film piezoelectric device

A free-standing thick-film cantilever sensor structure is presented. Such devices find use in applications such as vibration detection or energy harvesting. The structure was fabricated by screen printing layers of lead zirconate titanate between silver/palladium electrodes and co-firing the layers together with a carbon sacrificial layer (deposited underneath) in an air environment at a temperature of 850degC. The free-standing structure, of dimensions 18 mm long by 9 mm wide and thickness of 50 mum, was found to produce electrical powers of up to 95 nW at an acceleration level of 9.81 m/s² (1 g), when driving a 60 kcopy load resistance.     

Nanoscale CMOS spacer FinFET for the terabit era

A spacer lithography process technology, which uses a sacrificial layer and spacer layer formed by chemical vapor deposition (CVD), has been developed. It has been applied to make a sub-40-nm Si-fin structure for a double-gate FinFET with conventional dry etching for the first time. The minimum-sized features are defined not by the photolithography but by the CVD film thickness. Therefore, this spacer lithography technology yields better critical dimension uniformity than conventional optical or e-beam lithography and defines smaller features beyond the limit of current lithography technology. It also provides a doubling of feature density for a given lithography pitch, which increases current by a factor of two. To demonstrate this spacer lithography technology, Si-fin structures have been patterned for planar double-gate CMOS FinFET devices     

NIL—a low-cost and high-throughput MEMS fabrication method compatible with IC manufacturing technology

Current MEMS fabrication technology cannot satisfy the simultaneous needs of 3D structure fabrication and compatibility with IC manufacturing technology, which have impeded the development of MEMS industrialization to a certain extent. Nanoimprint lithography (NIL) provides a new MEMS fabrication method that is compatible with IC manufacturing technology and bears high throughput and low cost. This paper presents an in-house prototype NIL tool with a high precision automatic alignment system based on moiré fringe signals. Some printing results of nanostructures or micro-devices using the prototype are presented, and hot embossing lithography, one typical NIL technology is depicted in detail by taking microlens array fabrication as an example. High fidelity and fine uniformity demonstrate NIL will be a new method to fabricate 3D structures of MEMS.     

Double-dipole mask-synthesis using inverse lithography technology

Double-dipole lithography (DDL) uses two orthogonal dipole illuminations and one or two masks to print the desired wafer pattern. The main challenge of using such IC-manufacturing technique remains how to properly synthesize the proper mask patterns for the arbitrarily given target pattern. This paper presents a gradient-based inverse lithography technology (ILT) addressing the problem above. This approach properly models the partially coherent imaging system by employing the double-dipole lithography, and then uses the steepest descent method to automatically synthesize the masks required to print the desired wafer pattern. We also present results for various kinds of masks for printing 45-nm critical dimension (CD) features. The results show that our algorithm automatically generates the synthesized masks and that the synthesized masks reduce the pattern distortion error (PDE) by 85-90%. The comparison with a single-exposure case indicates a superior improvement.     

热压印中聚合物的研究

在纳米压印技术中,热压印是普遍采用的压印方法。聚合物是压印的媒介,通过对聚合物加热、加压、冷却使聚合物成型,达到转印图形的目的。为了提高热压印技术和压印图形的精度,对聚合物受热后的特性以及聚合物的填充机理进行分析。通过实验得出,聚合物中的气体可以导致聚合物填充不完全,图形产生气泡,严重影响了图形的精度。聚合物的填充速度与模板的图案有关,平坦的模板比带有深孔的模板填充速度快。最后通过参数优化,得出高分辨率的压印图形。     

下一代光刻技术的设备

下一代光刻技术是指≤32nm工艺节点的光刻技术。介绍了下一代光刻技术与设备,包括X射线光刻技术、极紫外线光刻技术和纳米压印光刻技术等。     

Generation of Monodisperse,Shape‐Controlled Single and Hybrid Core–Shell Nanoparticles via a Simple One‐Step Process

In nano‐biotechnology, optoelectronics, and energy research areas, various fabrication methods have been developed for hybrid nanoparticles. A method is developed here for fabricating highly monodisperse three‐dimensional hybrid nanoparticles using a unique top‐down method based on secondary sputtering lithography. Nanostructures that have been formed on a PEDOT sacrificial layer are transferred from the substrate to an aqueous solution in a process that could be used to successfully disperse a variety of nanoparticle shapes and hybrid nanoparticles. By this method, a fluorescent dye could be encapsulated within the fabricated hybrid nanoparticles for use in bio‐sensing and drug‐delivery applications