Tuning the dielectric properties of hafnium silicate films

The influence of Si concentration in hafnium silicate dielectrics on thermal stability and dielectric permittivity was analyzed. A phase diagram was developed using GIXRD and FTIR measurement. The stabilization of the “higher-k” cubic/tetragonal phase for annealing temperatures up to 1000 °C with a steady increase in capacitance was demonstrated for Hf_0.94Si_0.06O₂ films. It was also shown that the stabilization of nano-crystalline Hf_0.80Si_0.20O₂ films can be realized for annealing temperatures up to 900 °C. The influence of TiN electrodes on the dielectric constant and the leakage current characteristic was also investigated. A permittivity increase for annealing temperatures up to 1000 °C without degradation of leakage current was shown.     

Anomalous thermal oxidation of gadolinium thin films deposited on silicon by high pressure sputtering

Thin gadolinium metallic layers were deposited by high-pressure sputtering in pure Ar atmosphere. Subsequently, in situ thermal oxidation was performed at temperatures ranging from 150 to 750 °C. At an oxidation temperature of 500 °C the films show a transition from monoclinic structure to a mixture of monoclinic and cubic. Regrowth of interfacial SiO_x is observed as temperature is increased, up to 1.6 nm for 750 °C. This temperature yields the lowest interface trap density, 4 × 10¹⁰ eV⁻¹ cm⁻², but the effective permittivity of the resulting dielectric is only 7.4. The reason of this low value is found on the oxidation mechanism, which yields a surface with located bumps. These bumps increase the average thickness, thus reducing the capacitance and therefore the calculated permittivity.     

Fabrication and characterisation of high quality ZnO thin films by reactive electron beam evaporation technique

High quality zinc oxide thin films have been deposited on silicon substrates by reactive e-beam evaporation in an oxygen environment. The effect of the growth temperature and air annealing on the structural, optical and electrical properties has been investigated. X-ray diffraction measurements have shown that ZnO films are highly c-axis-oriented and that the linewidth of the (002) peak is sensitive to the variation of substrate temperature. The optimum growth temperature has been observed at 300 °C. Raman spectroscopy has been found to be an efficient tool to evaluate the residual stress in the as-grown ZnO films from the position of the E₂ (high) mode. On the other hand, the vanishing of the 574 cm⁻¹. Raman feature after annealing has been explained as due to an increase of grain size and the reduction of O-vacancy and Zn interstitial. The SEM images have shown that the surfaces of the electron beam evaporated ZnO became smoother for the growth temperatures higher than 300 °C. The optical transmittance is the highest at 300 °C and has been increased after annealing in air showing an improvement of the optical quality. Finally, the maximum electrical resistivity has been found at 300 °C, which explains its relation with the crystal quality and increased from 5.8×10⁻² Ω cm to reach an approximate value of 10⁹ Ω cm after annealing at 750 °C.     

Influence of rapid thermal annealing temperature on structure and electrical properties of high permittivity HfTiO thin film used in MOSFET

HfTiO thin films were prepared by r.f. magnetron co-sputtering on Si substrate. To improve the electrical properties, HfTiO thin films were post heated by rapid thermal annealing (RTA) at 400 °C, 500 °C, 600 °C and 700 °C in nitrogen. It was found that the film is amorphous below 700 °C and at 700 °C monoclinic phase HfO₂ has occurred. With the increase of the annealing temperature, the film becomes denser and the refractive index increases. By electrical measurements, we found at 500 °C annealed condition, the film has the best electrical property with the largest dielectric constant of 44.0 and the lowest leakage current of 1.81 × 10⁻⁷ A/cm², which mainly corresponds to the improved microstructure of HfTiO thin film. Using the film annealed at 500 °C as the replacement of SiO₂ dielectric layer in MOSFET, combining with TiAlN metal electrode, a 10 μm gate-length MOSFET fabricated by three-step photolithography processes. From the transfer (I_DS–V_G) and output (I_DS–V_DS) characteristics, it shows a good transistor performance with a threshold voltage (V_th) of 1.6 V, a maximum drain current (I_ds) of 9 × 10⁻⁴ A, and a maximum transconductance (G_m) of 2.2 × 10⁻⁵ S.     

Composition and electrical characteristics of Al2O3-HfO2-HfTiO nanolaminates on Si

A dielectric constant of 27 was demonstrated in the as deposited state of a 5 nm thick, seven layer nanolaminate stack comprising Al₂O₃, HfO₂ and HfTiO. It reduces to an effective dielectric constant (k_eff) of ∼14 due to a ∼0.8 nm interfacial layer. This results in a quantum mechanical effective oxide thickness (EOT) of ∼1.15 nm. After annealing at 950 °C in an oxygen atmosphere k_eff reduces to ∼10 and EOT increases to 1.91 nm. A small leakage current density of about 8 × 10⁻⁷ and 1 × 10⁻⁴ A/cm², respectively at electric field 2 and 5 MV/cm and a breakdown electric field of about 11.5 MV/cm was achieved after annealing at 950 °C.     

A low gate leakage current and small equivalent oxide thickness MOSFET with Ti/HfO2 high-k gate dielectric

Annealing effects on electrical characteristics and reliability of MOS device with HfO₂ or Ti/HfO₂ high-k dielectric are studied in this work. For the sample with Ti/HfO₂ higher-k dielectric after a post-metallization annealing (PMA) at 600 °C, its equivalent oxide thickness value is 7.6 Å and the leakage density is about 4.5 × 10⁻² A/cm². As the PMA is above 700 °C, the electrical characteristics of MOS device would be severely degraded.     

The microwave properties of Li doped 0.7(Ba,Sr)TiO3-0.3MgO thick film interdigital capacitors on the alumina substrates

The crystalline and electrical properties of Li doped 0.7(Ba,Sr)TiO₃-0.3MgO thick film interdigital capacitors have been investigated. Screen printing method was employed to fabricate Li doped 0.7(Ba,Sr)TiO₃-0.3MgO thick films on the alumina substrates. (Ba,Sr)TiO₃ materials have high dielectric permittivity (>500 @ 1 MHz) and low loss tangent (0.01 @ 1 MHz) in the epitaxial thin film form. To improve dielectric properties and reduce sintering temperature, MgO and Li were added, respectively. 10 μm thick films were screen printed on the alumina substrates and then interdigital capacitors with seven fingers of 200 μm finger gap were patterned with Ag electrode. Current-voltage characteristics were analyzed with elevated temperature range. Up to 50 °C, the thick films showed positive temperature coefficient of resistivity (dρ/dT) of 6.11 × 10⁸ Ω cm/°C, then film showed negative temperature coefficient of resistivity (dρ/dT) of −1.74 × 10⁸ Ω cm/°C. From the microwave measurement, the relative dielectric permittivity of Li doped 0.7(Ba,Sr)TiO₃-0.3MgO thick films interdigital capacitors were between 313 at 1 GHz and 265 at 7 GHz.     

Low gate interface traps AlGaN/GaN HEMTs using a lattice matched ZrZnO transparent gate design

AlGaN/GaN metal–insulator–semiconductor high electron mobility transistors (MIS-HEMTs) using a radio-frequency magnetron sputtered ZrZnO transparent oxide layer as a gate insulator are investigated and compared with traditional GaN HEMTs. A negligible hysteresis voltage shift in the C–V curves is seen, from 0.09 V to 0.36 V, as the thickness of ZrZnO films increases. The composition of ZrZnO at different annealing temperatures is observed using X-ray photoelectron spectroscopy (XPS). The ZrZnO thin film achieves good thermal stability after 600 °C, 700 °C and 800 °C post-deposition annealing (PDA) because of its high binding energy. Based on the interface trap density analysis, D_it has a value of 2.663 × 10¹² cm⁻²/eV for 10-nm-thick ZrZnO-gate HEMTs and demonstrates better interlayer characteristics, which results in a better slopes for the I_ds degradation (5.75 × 10⁻¹ mA/mm K⁻¹) for operation from 77 K to 300 K. The 10-nm-thick ZrZnO-gate device also exhibits a flat and a stable 1/f noise, as V_GS–V_th, and at various operating temperatures. Therefore, ZrZnO has good potential for use as the transparent film for a gate insulator that improves the GaN-based FET threshold voltage and improves the number of surface defects at various operating temperatures.     

Dielectric spectroscopy studies on (PVP + PVA) polyblend film

The thermal behavior of (PVP + PVA) polyblend film have been examined using differential scanning calorimetry and scanning electron microscopy. Capacitance and loss tangent values of polyvinyl pyrrolidone (PVP) + polyvinyl alcohol (PVA) polyblend film were measured in the frequency range 1-100 kHz and temperature range 298-423 K. Dielectric permittivity of real part (ε′) was obtained from capacitance data and dielectric permittivity of imaginary part (ε″) was obtained from real part of dielectric permittivity and loss tangent values. The decrease in dielectric permittivity was observed with increasing frequency and also observed increase in dielectric permittivity with increasing temperature. The complex dielectric constant (ε*) has been described by the electric modulus M* = (1/ε*) = M′ + iM″. The data of M* has been analysed by the stretched exponential decay of the electric field, Φ(t) = exp−(t/τ₀)^β.     

Atomic-layer-deposited tantalum silicate as a gate dielectric for III-V MOS devices

TaSiO_x thin films with Si/(Ta + Si) mole fractions between 0 and 0.6 have been deposited using atomic-layer deposition on Si and InGaAs at 250 °C. Interface defects on InGaAs were on the order of 10¹² cm⁻² eV⁻¹, which is comparable to state-of-the-art Al₂O₃ deposited by atomic-layer deposition using Al(CH₃)₃ and H₂O while the dielectric permittivity of TaSiO_x is considerably higher.     

Charge trapping and interface characteristics in normally-off Al2O3/GaN-MOSFETs

Normally-off GaN-MOSFETs with Al₂O₃ gate dielectric have been fabricated and characterized. The Al₂O₃ layer is deposited by ALD and annealed under various temperatures. The saturation drain current of 330 mA/mm and the maximum transconductance of 32 mS/mm in the saturation region are not significantly modified after annealing. The subthreshold slope and the low-field mobility value are improved from 642 to 347 mV/dec and from 50 to 55 cm² V⁻¹ s⁻¹, respectively. The I_D-V_G curve shows hysteresis due to oxide trapped charge in the Al₂O₃ before annealing. The amount of hysteresis reduces with the increase of annealing temperature up to 750 °C. The Al₂O₃ layer starts to crystallize at a temperature of 850 °C and its insulating property deteriorates.     

Investigations of thermal annealing effects on electrical and structural properties of SrTaO based MIM capacitor

The annealing effects on dielectric and electrode materials in Ti/SrTaO/TaN/TiN/Ti/Si metal-insulator-metal (MIM) capacitors were studied. The electrical and structural properties were investigated after subjecting the samples to annealing temperatures of 500 °C, 700 °C and 900 °C. The electrical results revealed that the dielectric constant (k value) of Sr-Ta-O increased from 18 to 50 with increasing annealing temperature. This improvement in k value can be associated to the crystallization of dielectric layer. However, the leakage current density increased several orders of magnitudes with increase of the annealing temperatures. This observation was attributed to crystallization of dielectric, degradation of TaN electrode and out-diffusion of Si from the substrate.     

Thin titanium oxide films deposited by e-beam evaporation with additional rapid thermal oxidation and annealing for ISFET applications

Titanium oxide (TiO₂) has been extensively applied in the medical area due to its proved biocompatibility with human cells [1]. This work presents the characterization of titanium oxide thin films as a potential dielectric to be applied in ion sensitive field-effect transistors. The films were obtained by rapid thermal oxidation and annealing (at 300, 600, 960 and 1200 °C) of thin titanium films of different thicknesses (5 nm, 10 nm and 20 nm) deposited by e-beam evaporation on silicon wafers. These films were analyzed as-deposited and after annealing in forming gas for 25 min by Ellipsometry, Fourier Transform Infrared Spectroscopy (FTIR), Raman Spectroscopy (RAMAN), Atomic Force Microscopy (AFM), Rutherford Backscattering Spectroscopy (RBS) and Ti-K edge X-ray Absorption Near Edge Structure (XANES). Thin film thickness, roughness, surface grain sizes, refractive indexes and oxygen concentration depend on the oxidation and annealing temperature. Structural characterization showed mainly presence of the crystalline rutile phase, however, other oxides such Ti₂O₃, an interfacial SiO₂ layer between the dielectric and the substrate and the anatase crystalline phase of TiO₂ films were also identified. Electrical characteristics were obtained by means of I-V and C-V measured curves of Al/Si/TiO_x/Al capacitors. These curves showed that the films had high dielectric constants between 12 and 33, interface charge density of about 10¹⁰/cm² and leakage current density between 1 and 10⁻⁴ A/cm². Field-effect transistors were fabricated in order to analyze I_D x V_DS and log I_D × Bias curves. Early voltage value of −1629 V, R_OUT value of 215 MΩ and slope of 100 mV/dec were determined for the 20 nm TiO_x film thermally treated at 960 °C.     

Effect of rapid thermal annealing on deep level defects in the Si-doped GaN

Rapid thermal annealing effects on deep level defects in the n-type GaN layer grown by metalorganic chemical vapor deposition (MOCVD) have been characterized using deep level transient spectroscopy (DLTS) technique. The samples were first characterized by current-voltage (I-V) and capacitance-voltage (C-V) measurements. The measurements showed that the barrier height of the as-grown sample to be 0.74 eV (I-V) and 0.95 eV (C-V) respectively. However, the Schottky barrier height of the sample annealed at 800 °C increased to 0.84 eV (I-V) and 0.99 eV (C-V) respectively in nitrogen atmosphere for 1 min. Further, it was observed that the Schottky barrier height slightly decreased after annealing at 900 °C. DLTS results showed that the two deep levels are identified in as-grown sample (E1 and E3), which have activation energies of 0.19 ± 0.01 eV and 0.80 ± 0.01 eV with capture cross-sections 2.06 × 10⁻¹⁷ cm² and 7.68 × 10⁻¹⁸ cm², which can be related to point defects. After annealing at 700 °C, the appearance of one new peak (E2) at activation energy of 0.49 ± 0.02 eV with capture-cross section σ_n = 5.43 × 10⁻¹⁷ cm², suggest that E2 level is most probably associated with the nitrogen antisites. Thermal annealing at 800 °C caused the E1 and E3 levels to be annealed out, which suggest that they are most probably associated with the point defects. After annealing at 900 °C the same (E1 and E3) deep levels are identified, which were identified in as-grown n-GaN layer.     

Temperature treatment of nano-scaled barium titanate filler to improve the dielectric properties of high-k polymer based composites

A commercially available nano-scaled barium titanate powder was compounded with a polyester-styrene reactive resin to create a high-k polymer-composite material. The influence of a temperature treatment on the filler was examined for treatment temperatures between 500 and 1200 °C. As a result grain and particle growth as well as lattice relaxation was induced into the powder particles. The resulting composite permittivity rises from 9.2 to 25.0 (at room temperature, 1 kHz, filler load 60 wt%/∼22 vol%) and the dielectric loss factor drops to values below 0.005 as a result of this treatment. The changes in lattice structure, powder morphology and composite viscosity were determined by XRD, SEM, BET, He-pycnometry and rheology measurements. The temperature dependency of the dielectric properties of the pure polymer and the composite were measured between −60 and 70 °C. The temperature dependency of the polymer matrix is superimposed with the temperature characteristic of the BaTiO₃.     

MOS devices with tetragonal ZrO2 as gate dielectric formed by annealing ZrO2/Ge/ZrO2 laminate

A Ge-stabilized tetragonal ZrO₂ (t-ZrO₂) film with permittivity (κ) of 36.2 was formed by depositing a ZrO₂/Ge/ZrO₂ laminate and a subsequent annealing at 600 °C, which is a more reliable approach to control the incorporated amount of Ge in ZrO₂. On Si substrates, with thin SiON as an interfacial layer, the SiON/t-ZrO₂ gate stack with equivalent oxide thickness (EOT) of 1.75 nm shows tiny amount of hysteresis and negligible frequency dispersion in capacitance-voltage (C-V) characteristics. By passivating leaky channels derived from grain boundaries with NH₃ plasma, good leakage current of 4.8 × 10⁻⁸ A/cm² at V_g = V_fb − 1 V is achieved and desirable reliability confirmed by positive bias temperature instability (PBTI) test is also obtained.     

Hf-O-N and HfO2 barrier layers for Hf-Ti-O gate dielectric thin films

Hf-O-N and HfO₂ thin films were evaluated as barrier layers for Hf-Ti-O metal oxide semiconductor capacitor structures. The films were processed by sequential pulsed laser deposition at 300 °C and ultra-violet ozone oxidation process at 500 °C. The as-deposited Hf-Ti-O films were polycrystalline in nature after oxidation at 500 °C and a fully crystallized (o)-HfTiO₄ phase was formed upon high temperature annealing at 900 °C. The Hf-Ti-O films deposited on Hf-O-N barrier layer exhibited a higher dielectric constant than the films deposited on the HfO₂ barrier layer. Leakage current densities lower than 5 × 10 A/cm² were achieved with both barrier layers at a sub 20 Å equivalent oxide thickness.     

High performance n/p and p/n germanium diodes at low-temperature activation annealing

In this work we demonstrate the fabrication and characterization of high performance junction diodes using annealing temperatures within the temperature range of 300-350 °C. The low temperature dopant activation was assisted by a 50 nm platinum layer which transforms into platinum germanide during annealing. The fabricated diodes exhibited high forward currents, in excess of 400 A/cm² at ∼|0.7| V for both p⁺/n and n⁺/p diodes, with forward to reverse ratio I_F/I_R greater than 10⁴. Best results for the n⁺/p junctions were obtained at the lower annealing temperature of 300 °C. These characteristics compare favorably with the results of either conventional or with Ni or Co assisted dopant activation annealing. The low-temperature annealing in combination with the high forward currents at low bias makes this method suitable for high performance/low operating power applications, utilizing thus high mobility germanium substrates.     

Thermally annealed Ni/n-GaAs(Si)/In Schottky barrier diodes

We have identically prepared as many as eight Ni/n-GaAs/In Schottky barrier diodes (SBDs) using an n-type GaAs substrate with a doping density of about 7.3 × 10¹⁵ cm⁻³. The thermal stability of the Ni/n-GaAs/In Schottky diodes has been investigated by means of current-voltage (I-V) techniques after annealed for 1 min in N₂ atmosphere from 200 to 700 °C. For Ni/n-GaAs/In SBDs, the Schottky barrier height Φ_b and ideality factor n values range from 0.853 ± 0.012 eV and 1.061 ± 0.007 (for as-deposited sample) to 0.785 ± 0.002 eV and 1.209 ± 0.005 (for 600 °C annealing). The ideality factor values remained about unchanged up to 400 °C annealing. The I-V characteristics of the devices deteriorated at 700 °C annealing.     

Dielectric function and degradation process of poly(triarylamine) (PTAA)

We investigated the optical properties and the degradation process of the organic p-type semiconductor poly(triarylamine) (PTAA) in the mid infrared region. The dielectric function of PTAA was determined in the spectral region of 700 up to 6000 cm⁻¹ by modeling ellipsometric measurements. Due to degradation at 65 °C, PTAA thin films developed carbonyl and hydroxyl features in the infrared spectra. Degradation under 85% RH additionally led to absorption signals of water. A degradation of the bare gold substrates was also observed. For bare gold films, morphology changed upon degradation and adsorption of hydrocarbons from the ambience took place.