共查询到20条相似文献,搜索用时 15 毫秒
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针对无人机飞行训练的需要,设计了一种基于嵌入式USB主机的飞行数据固态记录器。介绍了飞控数据固态数据器的工作原理、三星NAND FLASH芯片(K91G08U0M)的嵌入式文件系统和嵌入式USB主机的软件设计。实验证明,该数据记录器设计方案可行,且与传统的数据记录器相比:一方面,具有NAND FLASH存储块管理的FAT文件系统,实现对NAND FLASH数据存储的保护;另一方面,实现了USB主机接口直接与大容量设备进行文件和数据交换,极大地方便数据卸载。 相似文献
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Flash memory is used for storage in mobile multimedia and embedded systems such as mobile phones, digital cameras, and MP3
players because of its small size, light weight, nonvolatile operation, vibration resistance, high capacity, and low power
consumption. Data compression is one effective method for increasing capacity and reducing data transfer, however real-time
performance is necessary for mobile multimedia device applications. We propose a mechanism that uses contiguous packing and
a read/write ping-pong buffer along with the X-match and run-length compression/decompression algorithm to create a real-time
compression layer. Compared to the internal packing scheme and best-fit method of Yim et al., our mechanism increases the
compression ratio, improves the write response time by 60%, and stabilizes the read response time to make it suitable for
real-time applications. 相似文献
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Se Jin Kwon Arun Ranjitkar Young-Bae Ko Tae-Sun Chung 《Design Automation for Embedded Systems》2011,15(3-4):191-224
Flash memory is being rapidly deployed as data storage for embedded devices such as PDAs, MP3 players, mobile phones and digital cameras due to its low electronic power, non-volatile storage, high performance, physical stability and portability. The most prominent characteristic of flash memory is that prewritten data can only be dynamically updated via the time consuming erase operation. Furthermore, every block in flash memory has a limited program/erase cycle. In order to manage these issues, the flash memory controller can be integrated with a software module called the flash translation layer (FTL). This paper surveys the state-of-art FTL algorithms. The FTL algorithms can be classified by the complexity of the algorithms: basic and advance. Furthermore, they can be classified by their corresponding tasks: performance enhancement and durability enhancement. The FTL algorithms corresponding to each classification are further broken down into various schemes depending on the methods they adopt. This paper also provides the information of hardware features of flash memory for FTL programmers. 相似文献
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针对破片测速系统对数据存储速率快、可靠性高的要求,提出了基于流水线设计的数据快速存储方案和基于FPGA片内建立虚拟存储器来管理FLASH坏块列表的方法。
该方法有效降低存储系统的平均响应时间,将数据流的存储速率提高了近2倍;并且有效地屏蔽FLASH的坏块,保证了破片数据存储的可靠性。
试验表明:该方法使数据存储速率提高到2.4Mbytes/S,为原始速率的3倍。数据存储的可靠性为100%。 相似文献
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存储系统在现代数字系统尤其是在便携设备中具有重要地位,它的容量、体积等指标也有严格要求,对此文中提出了一种新的解决方案。介绍Samsung公司的128Gbit位闪速存储器K9MDG08U5M的特性和主要功能,详细讨论其在高分辨率航拍相机系统中的硬件设计和相关的软件编程。该系统经过实验验证:错、漏数据现象极少,并可以方便地应用于各种图象、语音等数据存储系统。 相似文献
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凭借着存储密度大和存储速率高的特点,基于NANDFlash的大容量存储器在星载存储领域得到了广泛的应用,由于NAND Flash本身存在缺陷,基于NAND Flash的大容量存储器在恶劣环境下的可靠性难以保证.提出了通过FPGA设计SRAM对关键数据三模冗余读取和缓冲、NAND Flash阵列热备份和数据的回放校验以及合理的坏块管理等措施,实现了高可靠性的大容量存储器.实验说明该系统不会因为外在偶然因素而造成数据的不完整,而且整个存储系统的成本开销相对于目前的星载存储器也非常低. 相似文献
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Performance study of iSCSI-based storage subsystems 总被引:9,自引:0,他引:9
iISCSI is emerging as an end-to-end protocol for transporting storage I/O block data over IP networks. By exploiting the ubiquitous Internet infrastructure, iSCSI greatly facilitates remote storage, remote backup, and data mirroring. This article evaluates the performance of two typical iSCSI storage subsystems by measuring and analyzing block-level I/O access performance and file-level access performance. In the file-level performance study, we compare file access performance in an NAS scheme with that in an iSCSI-based SAN scheme. Our test results show that Gigabit Ethernet-based iSCSI can reach very high bandwidth, close to that of a direct FC disk access in block I/O access. However, when the iSCSI traverses through longer distance, throughput relies heavily on the available bandwidth between the initiator and the target. On the other hand, the file-level performance shows that iSCSI-based file access (SAN scheme) provides higher performance than using NFS protocol in Linux and SMB protocol in Windows (NAS scheme). However, the advantage of using iSCSI-based file accesses decreases as the file size increases. The obtained experimental results shed some light on the performance of applications based on iSCSI storage. 相似文献
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NAND Flash具有高存储密度和高存储速率的特点,在嵌入式系统领域得到了广泛应用.但其固有的擦除机制和存在有坏块这一致命弱点,成为其在应用中的主要障碍.本文提出了一种应用于FAT文件系统上的坏块处理方法,使用Flash上其他的空闲块或者空闲空间来代替坏块,并将坏块在FAT表中作出标记以后不作使用.这种方法彻底屏蔽了坏块对上层应用的影响,并对存储介质没有造成任何不良影响,从而很好地克服了上述障碍.工程项目中的应用证明了其较高的可靠性. 相似文献
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针对某些嵌入式系统中数据存储量大且改写频繁,以及Flash存储器寿命有限的问题,结合氨氮检测仪的实际应用,提出了一种基于铁电存储器和Flash的混合数据存储方案。给出了基于主控制器STM32F407的氨氮检测仪的整体设计,着重分析了混合数据存储系统的软硬件设计,并在此基础上制订了数据存储协议,提高存储效率。同传统的存储方案相比,基于FRAM和Flash的混合数据存储系统提高了仪器的数据存储速度和效率,延长了使用寿命,提高了仪器整体的稳定性和可靠性。 相似文献
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针对低成本、小型化的数据记录系统的应用,提出了一种数据缓存技术解决方案。存储模块是由闪速存储器芯片(NAND Flash)组成的存储阵列,以FPGA为载体的SOPC系统作为存储模块的控制核心。分析存储系统的结构及控制平台的实现过程,并对系统工作原理及并行分路技术进行讨论。深入研究Flash阵列的存储过程,提出最小FIF... 相似文献
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基于ARM的SD卡文件系统设计 总被引:4,自引:2,他引:2
ARM以其高性能、低功耗、易扩展的特点成为了嵌入式系统全球领先的16/32位RISC微处理器内核。但由于嵌入式系统中数据量的增加,对存储设备的要求也越来越高。在众多存储卡中,SD卡占有越来越多的市场份额。丈中介绍了基于ARM7平台设计的SD卡读写系统,包括SD卡与LPC2292的硬件接口电路设计及相应的软件程序设计。 相似文献
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Improving the Reliability of MLC NAND Flash Memories Through Adaptive Data Refresh and Error Control Coding 总被引:1,自引:0,他引:1
Chengen Yang Hsing-Min Chen Trevor N. Mudge Chaitali Chakrabarti 《Journal of Signal Processing Systems》2014,76(3):225-234
NAND Flash memory has become the most widely used non-volatile memory technology. We focus on multi-level cell (MLC) NAND Flash memories because they have high storage density. Unfortunately MLC NAND Flash memory also has reliability problems due to narrower threshold voltage gap between logical states. Errors in these memories can be classified into data retention (DR) errors and program interference (PI) errors. DR errors are dominant if the data storage time is longer than 1 day and these errors can be reduced by refreshing the data. PI errors are dominant if the data storage time is less than 1 day and these errors can be handled by error control coding (ECC). In this paper we propose a combination of data refresh policies and low cost ECC schemes that are cognizant of application characteristics to address the errors in MLC NAND Flash memories. First, we use Gray code based encoding to reduce the error rates in the four subpages (MSB-even, LSB-even, MSB-odd, LSB-odd) of a 2-bit MLC NAND Flash memory. Next, we apply data refresh techniques where the refresh interval is a function of the program/erase (P/E) frequency of the application. We show that an appropriate choice of refresh interval and BCH based ECC scheme can minimize memory energy while satisfying the reliability constraint. 相似文献