Automated Mapping of the MapReduce Pattern onto Parallel Computing Platforms

The MapReduce pattern can be found in many important applications, and can be exploited to significantly improve system parallelism. Unlike previous work, in which designers explicitly specify how to exploit the pattern, we develop a compilation approach for mapping applications with the MapReduce pattern automatically onto Field-Programmable Gate Array (FPGA) based parallel computing platforms. We formulate the problem of mapping the MapReduce pattern to hardware as a geometric programming model; this model exploits loop-level parallelism and pipelining to give an optimal implementation on given hardware resources. The approach is capable of handling single and multiple nested MapReduce patterns. Furthermore, we explore important variations of MapReduce, such as using a linear structure rather than a tree structure for merging intermediate results generated in parallel. Results for six benchmarks show that our approach can find performance-optimal designs in the design space, improving system performance by up to 170 times compared to the initial designs on the target platform.     

云计算技术在动漫渲染行业的应用研究

当前动漫制作还主要沿用单机渲染的模式,面临着效率低下、操控复杂、资源浪费等弊端.为解决这些短板与瓶颈,以云计算在动漫渲染行业的应用入手,在阐述渲染、云计算、动漫渲染的基础上,提出了一种云渲染平台设计与实现的方法,并从渲染平台设计架构、云渲染流程及关键技术等角度进行阐述,试图提供高效可靠的渲染管理及资源整合应用模式.     

Methods to explore design space for MPEG RMC codec specifications

The recent MPEG Reconfigurable Media Coding (RMC) standard aims at defining media processing specifications (e.g. video codecs) in a form that abstracts from the implementation platform, but at the same time is an appropriate starting point for implementation on specific targets. To this end, the RMC framework has standardized both an asynchronous dataflow model of computation and an associated specification language. Either are providing the formalism and the theoretical foundation for multimedia specifications. Even though these specifications are abstract and platform-independent the new approach of developing implementations from such initial specifications presents obvious advantages over the approaches based on classical sequential specifications. The advantages appear particularly appealing when targeting the current and emerging homogeneous and heterogeneous manycore or multicore processing platforms. These highly parallel computing machines are gradually replacing single-core processors, particularly when the system design aims at reducing power dissipation or at increasing throughput. However, a straightforward mapping of an abstract dataflow specification onto a concurrent and heterogeneous platform does often not produce an efficient result. Before an abstract specification can be translated into an efficient implementation in software and hardware, the dataflow networks need to be partitioned and then mapped to individual processing elements. Moreover, system performance requirements need to be accounted for in the design optimization process. This paper discusses the state of the art of the combinatorial problems that need to be faced at this design space exploration step. Some recent developments and experimental results for image and video coding applications are illustrated. Both well-known and novel heuristics for problems such as mapping, scheduling and buffer minimization are investigated in the specific context of exploring the design space of dataflow program implementations.     

A multi-layered policy generation and management engine for semantic policy mapping in clouds

The long awaited cloud computing concept is a reality now due to the transformation of computer generations. However, security challenges have become the biggest obstacles for the advancement of this emerging technology. A well-established policy framework is defined in this paper to generate security policies which are compliant to requirements and capabilities. Moreover, a federated policy management schema is introduced based on the policy definition framework and a multi-level policy application to create and manage virtual clusters with identical or common security levels. The proposed model consists in the design of a well-established ontology according to security mechanisms, a procedure which classifies nodes with common policies into virtual clusters, a policy engine to enhance the process of mapping requests to a specific node as well as an associated cluster and matchmaker engine to eliminate inessential mapping processes. The suggested model has been evaluated according to performance and security parameters to prove the efficiency and reliability of this multi-layered engine in cloud computing environments during policy definition, application and mapping procedures.     

Real-time application to multiprocessor-system-on-chip mapping strategy for system-level design tool

A new static mapping technique is presented that can be integrated in a system-level design tool for modelling and simulating real-time applications onto an embedded multiprocessor system. The results of preliminary experiments indicate that the proposed two-phase mapping approach can achieve a good trade-off between the efficiency in resource usage and processor load balancing, as well as the minimisation of the inter-processor communication cost.     

教育信息化云服务平台的设计与实现

随着云计算技术的迅速发展,教育云也越来越成为教育信息化的研究热点.云计算与教育的结合,对于建立开放灵活的教育信息化服务平台,实现资源共享有着重要的意义.本研究分析了教育云的发展现状,设计了教育信息化云服务平台的技术架构并且基于该平台设计搜索、学习、资源、管理等多种云服务.基于该架构开发了面向终身教育的“随身学”云学习系统,并对其进行了易用性测试.     

广播电视新闻融合媒体平台规划设计

青海广播电视台为打造一个支持“全媒体、全业务、全流程、全覆盖、全扩展”适应未来发展需要的一体化平台.拟将新闻中心改造为高清采编基础上基于云计算技术的全媒体融合新闻平台.从系统规划、整体架构、关键技术等方面介绍了系统总体规划,从资源层、业务层、管理层三个方面分析了系统支撑云平台核心点设计.     

基于云计算的工业互联网数据资源管理平台构建

云计算作为一种新兴的商业计算模型,融合了分布式计算、并行计算、效用计算等计算机技术与网络技术的优势,为互联网络提供了一个安全、可靠的运行环境。为推进工业互联网平台的自动化、智能化、数字化、网络化发展,技术人员将云计算技术与工业互联网数据资源管理平台的构建工作融为一体,旨在发挥云计算模式低成本、高效率与高可用性的应用优势,以增强工业互联网平台的安全性、可靠性与稳定性。基于此,文中着重围绕基于云计算的工业互联网数据资源管理平台的构建思路展开了论述,以此来强调云计算技术在平台构建过程中的重要作用。     

Implementation and validation of architectural space exploration techniques for domain-specific reconfigurable computing

Domain specific coarse-grained reconfigurable architectures (CGRAs) have great promise for energy-efficient flexible designs for a suite of applications. Designing such a reconfigurable device for an application domain is very challenging because the needs of different applications must be carefully balanced to achieve the targeted design goals. It requires the evaluation of many potential architectural options to select an optimal solution. Exploring the design space manually would be very time consuming and may not even be feasible for very large designs. Even mapping one algorithm onto a customized architecture can require time ranging from minutes to hours. Running a full power simulation on a complete suite of benchmarks for various architectural options require several days. Finding the optimal point in a design space could require a very long time. We have designed a framework/tool that made such design space exploration (DSE) feasible. The resulting framework allows testing a family of algorithms and architectural options in minutes rather than days and can allow rapid selection of architectural choices. In this paper, we describe our DSE framework for domain specific reconfigurable computing where the needs of the application domain drive the construction of the device architecture. The framework has been developed to automate design space case studies, allowing application developers to explore architectural tradeoffs efficiently and reach solutions quickly. We selected some of the core signal processing benchmarks from the MediaBench benchmark suite and some edge-detection benchmarks from the image processing domain for our case studies. We describe two search algorithms: a stepped search algorithm motivated by our manual design studies and a more traditional gradient based optimization. Approximate energy models are developed in each case to guide the search toward a minimal energy solution. We validate our search results by comparing the architectural solutions selected by our tool to an architecture optimized manually and by performing sensitivity tests to evaluate the ability of our algorithms to find good quality minima in the design space. All selected fabric architectures were synthesized on 130 nm cell-based ASIC fabrication process from IBM. These architectures consume almost same amount of energy on average, but the gradient based approach is more general and promises to extend well to new problem domains. We expect these or similar heuristics and the overall design flow of the system to be useful for a wide range of architectures, including mesh based and other commonly used architectures for CGRAs.     

Algorithm-based low-power and high-performance multimedia signalprocessing

Low power and high performance are the two most important criteria for many signal-processing system designs, particularly in real-time multimedia applications. There have been many approaches to achieve these two design goals at many different implementation levels ranging from very-large-scale-integration fabrication technology to system design. We review the works that have been done at various levels and focus on the algorithm-based approaches for low-power and high-performance design of signal processing systems. We present the concept of multirate computing that originates from filterbank design, then show how to employ it along with the other algorithmic methods to develop low-power and high-performance signal processing systems. The proposed multirate design methodology is systematic and applicable to many problems. We demonstrate that multirate computing is a powerful tool at the algorithmic level that enables designers to achieve either significant power reduction or high throughput depending on their choice. Design examples on basic multimedia processing blocks such as filtering, source coding, and channel coding are given. A digital signal-processing engine that is an adaptive reconfigurable architecture is also derived from the common features of our approach. Such an architecture forms a new generation of high-performance embedded signal processor based on the adaptive computing model. The goal of this paper is to demonstrate the flexibility and effectiveness of algorithm-based approaches and to show that the multirate approach is an effective and systematic design methodology to achieve low-power and high throughput signal processing at the algorithmic and architectural level     

基于分布式战术云的下一代通用信号处理平台架构

通过分析复杂作战环境对军事电子信息系统能力的需求,以航空电子系统集成的发展历程为牵引,从信号处理系统结构、平台硬件架构和软件架构设计出发,提出了基于分布式战术云平台的下一代通用信号处理架构,以实现功能软件与硬件平台的解耦、任务模式和实现方式的解耦为目标,进而从异构处理资源虚拟化、包分组交换网络传输和基于蓝图建模的感知部署等方面探讨了技术实现途径,最后总结了新平台技术特征,并给出了发展建议.     

信号级协同计算平台架构及应用思考

针对智能化作战对军事电子信息系统计算能力提升的迫切需求,结合云计算的资源虚拟化、大数据的分布式计算等技术,提出了基于嵌入式CPU+ALL（DSP、FPGA、PPC、GPU、AI处理器等）的异构处理的信号级协同计算平台架构,包括弹性、轻量级异构资源虚拟化模型、分布式实时计算框架和智能计算框架等,形成了一套架构统一、资源共用、使用简便的协同计算和智能计算环境。通过战术级无线电认知和智能信号与信息处理两个典型应用场景,探讨了该信号级协同计算平台可能带来的颠覆性效用。     

基于应用虚拟化的智能终端关键技术研究

移动互联网风头正盛,智能终端、网络和应用成为移动互联网发展的3个要素,如何将其有力结合成为企业争夺移动互联网市场制高点的关键。智能终端的出现极大地丰富了基于云计算的应用服务的表现形式,为智能终端用户提供了大量网上云服务,因此智能终端与云应用相结合成为移动互联网云服务提供商关注的焦点。本文在分析目前主流的智能终端云计算应用模式的基础上,具体落脚于一种基于SaaS云计算架构的应用虚拟化技术,在智能终端多样化的发展趋势下,分析对应用虚拟化云应用平台的新需求,并结合实践经验总结应用虚拟化适配智能终端的关键技术。     

Electrocardiographic textbooks based on template hearts warped using ultrasonic images

Advances in technology make the application of sophisticated approaches to assessing electrical condition of the heart practical. Estimates of cardiac electrical features inferred from body-surface electrocardiographic (ECG) maps are now routinely found in a clinical setting, but errors in those inverse solutions are especially sensitive to the accuracy of heart model geometry and placement within the torso. The use of a template heart model allows for accurate generation of individualized heart models and also permits effective comparison of inferred electrical features among multiple subjects. A collection of features mapped onto a common template forms a textbook of anatomically specific ECG variability. Our template warping process to individualize heart models based on a template heart uses ultrasonic images of the heart from a conventional, phased-array system. We chose ultrasound because it is nonionizing, less expensive, and more convenient than MR or CT imaging. To find the orientation and position in the torso model of each image, we calibrated the ultrasound probe by imaging a custom phantom consisting of multiple N-fiducials and computing a transformation between ultrasound coordinates and measurements of the torso surface. The template heart was warped using a mapping of corresponding landmarks identified on both the template and the ultrasonic images. Accuracy of the method is limited by patient movement, tracking error, and image analysis. We tested our approach on one normal control and one obese diabetic patient using the mixed-boundary-value inverse method and compared results from both on the template heart. We believe that our novel textbook approach using anatomically specific heart and torso models will facilitate the identification of electrophysiological biomarkers of cardiac dysfunction. Because the necessary data can be acquired and analyzed within about 30?min, this framework has the potential for becoming a routine clinical procedure.     

A novel heuristic simulation‐optimization method for critical infrastructure in smart transportation systems

A simulation‐based optimization is a decision‐making tool that helps in identifying an optimal solution or a design for a system. An optimal solution and design are more meaningful if they enhance a smart system with sensing, computing, and monitoring capabilities with improved efficiency. In situations where testing the physical prototype is difficult, a computer‐based simulation and its optimization processes are helpful in providing low‐cost, speedy and lesser time‐ and resource‐consuming solutions. In this work, a comparative analysis of the proposed heuristic simulation‐optimization method for improving quality‐of‐service (QoS) is performed with generalized integrated optimization (a simulation approach based on genetic algorithms with evolutionary simulated annealing strategies having simplex search). In the proposed approach, feature‐based local (group) and global (network) formation processes are integrated with Internet of Things (IoT) based solutions for finding the optimum performance. Further, the simulated annealing method is applied for finding local and global optimum values supporting minimum traffic conditions. A small‐scale network of 50 to 100 nodes shows that genetic simulation optimization with multicriteria and multidimensional features performs better as compared to other simulation‐optimization approaches. Further, a minimum of 3.4% and a maximum of 16.2% improvement is observed in faster route identification for small‐scale IoT networks with simulation‐optimization constraints integrated model as compared to the traditional method. The proposed approach improves the critical infrastructure monitoring performance as compared to the generalized simulation‐optimization process in complex transportation scenarios with heavy traffic conditions. The communicational and computational‐cost complexities are least for the proposed approach.     

A Single Droplet‐Printed Double‐Side Universal Soft Electronic Platform for Highly Integrated Stretchable Hybrid Electronics

Soft features in electronic devices have provided an opportunity of gleaning a wide spectrum of intimate biosignals. Lack of data processing tools in a soft form, however, proclaims the need of bulky wires or low‐performance near‐field communication externally linked to a “rigid” processor board, thus tarnishing the true meaning of “soft” electronics. Furthermore, although of rising interest in stretchable hybrid electronics, lack of consideration in multilayer, miniaturized design and system‐level data computing limits their practical use. The results presented here form the basis of fully printable, system‐level soft electronics for practical data processing and computing with advanced capabilities of universal circuit design and multilayer device integration into a single platform. Single droplet printing‐based integration of rigid islands and core–shell vertical interconnect access (via) into a common soft matrix with a symmetric arrangement leads to a double‐side universal soft electronic platform that features site‐selective, simultaneous double‐side strain isolation, and vertical interconnection, respectively. Systematic studies of island‐morphology engineering, surface‐strain mapping, and electrical analysis of the platform propose optimized designs. Commensurate with the universal layout, a complete example of double‐side integrated, stretchable 1 MHz binary decoders comprised of 36 logic gates interacting with 9 vias is demonstrated by printing‐based, double‐side electronic functionalization.     

Availability modeling of modular software

Dependability evaluation is a basic component in assessing the quality of repairable systems. A general model (Op) is presented and is specifically designed for software systems; it allows the evaluation of various dependability metrics, in particular, of availability measures. Op is of the structural type, based on Markov process theory. In particular, Op is an attempt to overcome some limitations of the well-known Littlewood reliability model for modular software. This paper gives the: mathematical results necessary to the transient analysis of this general model; and algorithms that can efficiently evaluate it. More specifically, from the parameters describing the: evolution of the execution process when there is no failure; failure processes together with the way they affect the execution; and recovery process, the results are obtained for the: distribution function of the number of failures in a fixed mission; and dependability metrics which are much more informative than the usual ones in a white-box approach. The estimation procedures of the Op parameters are briefly discussed. Some simple examples illustrate the interest in such a structural view and explain how to consider reliability growth of part of the software with the transformation approach developed by Laprie et al. The complete transient analysis of Op allows discussion of the Poisson approximation by Littlewood for his model     

Utilizing the power of high-performance computing

The main focus of this article is the design of embedded signal processing (ESP) application software. We identify the characteristics of such applications in terms of their computational requirements, data layouts, and latency and throughput constraints. We describe an ESP application, an adaptive sonar beamformer. Then, we briefly survey the state-of-the-art in high performance computing (HPC) technology and address the advantages and challenges in using HPC technology for implementing ESP applications. To describe the software design issues in this context, we define a task model to capture the features of ESP applications. This model specifies the independent activities in each processing stage. We also identify various optimization problems in parallelizing ESP applications. We address the key issues in developing scalable and portable algorithms for ESP applications. We focus on the algorithmic issues in exploiting coarse-grain parallelism. These issues include data layout design and task mapping. We show a task mapping methodology for application software development based on our execution model (Lee et al., 1998). This uses a novel stage partitioning technique to exploit the independent activities in a processing stage. We use our methodology to maximize the throughput of an ESP application for a given platform size. The resulting application software using this methodology is called a software task pipeline. An adaptive sonar beamformer has been implemented using this design methodology     

基于包簇概念的云资源分配成本优化模型

针对云数据中心因传统资源管理方式造成云服务成本过高问题,文中提出一种基于包、簇概念的资源集中管理分配优化模型。将用户的具体需求抽象为一个个独立的需求包,将数据中心的各类资源整合成一个个资源簇,并将CPU、RAM、带宽作为指标,建立成本评估模型,利用基于包簇概念下的改进粒子群算法,实现需求包到资源簇的部署映射。仿真实验结果表明,该优化模型可以有效降低资源分配过程中的营运成本,稳定提高资源平均利用率。     

WComp middleware for ubiquitous computing: Aspects and composite event-based Web services

After a survey of the specific features of ubiquitous computing applications and corresponding middleware requirements, we list the various paradigms used in the main middlewares for ubiquitous computing in the literature. We underline the lack of works introducing the use of the concept of Aspects in middleware dedicated to ubiquitous computing, in spite of them being used for middleware improvement in other domains. Then, we introduce our WComp middleware model, which federates three main paradigms: event-based Web services, a lightweight component-based approach to design dynamic composite services, and an adaptation approach using the original concept called Aspect of Assembly. These paradigms lead to two ways to dynamically design ubiquitous computing applications. The first implements a classical component-based compositional approach to design higher-level composite Web Services and then allow to increment the graph of cooperating services for the applications. This approach is well suited to design the applications in a known, common, and usual context. The second way uses a compositional approach for adaptation using Aspect of Assembly, particularly well-suited to tune a set of composite services in reaction to a particular variation of the context or changing preferences of the users. Having detailed Aspect of Assembly concept, we finally comment on results indicating the expressiveness and the performance of such an approach, showing empirically that principles of aspects and program integration can be used to facilitate the design of adaptive applications.