基于STM32的智能垃圾分拣系统

随着全球人口的增长和城市化进程的加快,垃圾处理问题日益严重。传统的垃圾处理方法已经无法满足现代社会的需求,因此智能垃圾分拣系统应运而生。文章设计并实现了一种基于STM32的智能垃圾分拣系统。该系统利用多种传感器对垃圾进行分类,并通过机械手臂和电动阀门等执行器实现垃圾分拣。系统测试与优化验证了该系统的可靠性和性能。相比传统的手动分拣方式,该系统提高了分拣效率和准确性。实验结果表明,该系统能够实现高准确率的垃圾分类,并具有广阔的应用前景。     

基于深度学习的智能垃圾分类系统设计

为了推进我国的环境保护,我国正大力推广垃圾分类。由于垃圾品类复杂繁多,且分类垃圾桶设计简单,大部分仅为贴有分类标签的普通垃圾桶,需要人为识别垃圾种类,因此造成垃圾分类工作效率偏低。本文提出了基于深度学习算法,将图像识别、迁移学习和嵌入式开发应用到垃圾分类当中,设计了一种智能分类垃圾桶,实现了垃圾识别、自动分拣的功能。符合当下社会环境保护和发展的形势,同时为智能制造市场填补上重要的一环,具有较强的创造性意义。     

基于语音识别的交互式智能垃圾桶的实现

针对目前日益增长的城市化进程,随之而来的因为垃圾增多造成的环境问题也日益显著严重。在对国内外垃圾桶使用现状、垃圾分类制度以及相关环境保护领域的深度调研基础上,本文设计出语音识别的交互式智能垃圾桶。此垃圾桶通过语音模块、气味传干器、超声波传感器、太阳能电池板等模块下配合STM32主控芯片能够实现智能识别垃圾、打包、消杀和实时检测运行状况等功能,有效提高了垃圾分类的准确性与效率。     

垃圾短信的智能识别和实时处理

本文提出了短信语义和号码特征相结合的垃圾信息智能识别方法.在分类器的设计上,采用了BP神经网络与支撑矢量机(SVM)的分类集成技术,使得分类识别效果明显.垃圾短信的学习样本识别正确率达99.86%,测试样本识别正确率达到97.4%.由于本文方法提取的特征构成了稀疏矩阵,因此大大缩短了,机器学习时间,使得系统具有实时学习和实时提高分类能力的功能.     

基于GINet的垃圾分类检测网络

为了更好地服务于城市垃圾分类,提高垃圾分类前端收集的工作效率,本文提出了一种基于GINet的智能分类垃圾网络。首先在Kaggle数据集和华为垃圾分类公开数据集的基础上进行了人工标注,并建立了垃圾分类的训练数据集。其次,为了提高模型的泛化能力,扩充训练样本,设计了一种具有针对性的多背景图像增强方法。最后,为了解决垃圾分类数据集中某些同类垃圾之间的尺寸、颜色差异巨大,以VGG-16为主干特征提取网络,构建了一个融合多特征提取与注意力机制的垃圾识别网络(Garbage Identification Net,GINet)。仿真实验表明,该算法在复杂环境下拥有良好的鲁棒性和稳定性,检测准确率可达到94.5%,很好地满足了工业场景下垃圾检测的准确性。     

基于语音识别的智能分类垃圾桶

针对垃圾分类自动化水平低、分类不准确、耗时较长等问题,提出了基于语音识别的智能分类垃圾桶的设计.该设计以STM32为主控芯片,通过语音识别模块LD3320来获取信息,对舵机进行控制实现对应垃圾桶盖的开闭,采用红外测距模块对垃圾桶容量进行实时监测,满载时语音播报模块与指示灯进行提醒.经实验验证表明,该系统提升了垃圾分类的...     

基于深度学习的语音识别垃圾桶的设计

随着“碳达峰、碳中和”目标的提出,为了响应绿色可持续发展的号召,人们逐渐意识到垃圾分类的重要性,但由于大部门城市的居民刚接触垃圾分类,分类知识相对薄弱,且市面上的智能分类垃圾桶仅带有感应式开盖功能,并不能对人类提供相应帮助。为了解决上述问题,本文设计了一款新型的智能垃圾桶,该桶基于深度学习的语音识别技术,以STM32F103R6单片机为核心,搭配红外传感器、语音识别、播报模块、舵机等硬件,协助人们进行垃圾分类的。     

基于太阳能的智能垃圾分类箱设计研究

针对国家出台的一系列垃圾分类政策,文章设计研发了一种基于太阳能的智能垃圾分类箱。垃圾箱包含太阳能供电单元、中央处理单元、识别单元、传送单元及显示报警单元等功能模块。在太阳能供电的基础上,可实现通过各类传感器的组合和中央处理器的分析处理,对日常生活垃圾进行智能分类和投送。最后在Proteus中进行了仿真验证。     

基于双线性注意力网络的垃圾图像识别与分类方法

针对传统图像识别技术应用于垃圾图像的识别及分类中存在的误差较大的问题,文章提出一种基于双线性注意力网络的垃圾图像识别与分类方法。采用二维中值滤波法,对自主拍摄和网络收集而构建的居民生活垃圾图像数据集图像进行去噪处理。应用多尺度融合方法对去噪后的图像质量进行增强处理,以此完成对垃圾图像的预处理。最后,设计一个双线性注意力网络模型,经过模型训练完成垃圾图像的分类识别。实验结果表明,应用该方法识别并分类居民生活垃圾图像的准确率为96.5%,说明该方法具有较好的有效性与较高的准确性。     

基于Arduino的智能垃圾桶设计

随着十八届三中全会对生态环境的要求提出,城市垃圾处理就是一个首要问题。在公共场所或者家庭私人领域,垃圾处理问题都不容小觑,其个中环节表现在垃圾收集,垃圾分类,垃圾运输,垃圾处理等。目前城市垃圾桶都是用脚踩和用手掀开或者是开口露天的,这给垃圾收集环节带来很问题,如垃圾不能够有效分类,垃圾桶满溢出来,垃圾桶发霉发臭滋生各种蚊虫,有人嫌弃垃圾桶脏不敢用手打开盖子垃圾就放垃圾桶旁边,甚至脚踩垃圾桶被多次使用就损坏等等情况发生。在时代科技的发展下面,为了让科技更好的服务人类社会,文章将通过基于Arduino的智能垃圾桶设计,解决目前人类社会环境中存在的垃圾收集问题。     

Active memory processor: a hardware garbage collector for real-time Java embedded devices

Java possesses many advantages for embedded system development, including fast product deployment, portability, security, and a small memory footprint. As Java makes inroads into the market for embedded systems, much effort is being invested in designing real-time garbage collectors. The proposed garbage-collected memory module, a bitmap-based processor with standard DRAM cells is introduced to improve the performance and predictability of dynamic memory management functions that include allocation, reference counting, and garbage collection. As a result, memory allocation can be done in constant time and sweeping can be performed in parallel by multiple modules. Thus, constant time sweeping is also achieved regardless of heap size. This is a major departure from the software counterparts where sweeping time depends largely on the size of the heap. In addition, the proposed design also supports limited-field reference counting, which has the advantage of distributing the processing cost throughout the execution. However, this cost can be quite large and results in higher power consumption due to frequent memory accesses and the complexity of the main processor. By doing reference counting operation in a coprocessor, the processing is done outside of the main processor. Moreover, the hardware cost of the proposed design is very modest (about 8000 gates). Our study has shown that 3-bit reference counting can eliminate the need to invoke the garbage collector in all tested applications. Moreover, it also reduces the amount of memory usage by 77 percent.     

垃圾收集器实时化的研究

用垃圾收集器进行动态内存管理对大规模软件系统的开发具有重要意义,为把垃圾收集器应用到嵌入式实时系统中,对垃圾收集器实时化进行了研究,提出了动态执行垃圾收集器任务以及用最短时限优先(EDF)算法调度垃圾收集器的算法,仿真实验和内存分析表明,与以往的实时垃圾收集器相比,所提出的算法可以进一步降低系统内存需求,提高系统的灵活性,并对分布式垃圾收集器进行了研究,性能分析表明基于关键引用验证的分布式垃圾收集器更适用于大规模分布式系统.     

小型污水厂远程监控系统设计

为了实现对污水厂远程监控系统的需求,文中提出了基于ARM的小型污水厂远程监控系统设计方案,并完成了系统软硬件设计。文中采用ARM微处理器为主控制器,用模数转换采集现场数据,用摄像头采集现场图片,采用GPRS无线通信模块传输采集的信息,实现了小型污水厂图像和数据的采集、存储和无线传输功能。     

基于物联网技术的水文监测系统研究

水文监测技术是实现水利水文信息化的重要基础,为满足水文监测系统实时性、可靠性、实用性的要求,提出了利用Zigbee技术以及通用分组无线服务技术(GPRS,General Packet Radio Service)实现对水文信息实时监测的方案,着重讨论了传感器节点的设计,处理器选择超低功耗的CC2430芯片,设计了数据采集部分的硬件电路,并介绍了系统的软件实现方法。真正实现了水文监测的智能化、高效化和网络化。     

A hierarchical design methodology for full-search block matching motion estimation

Many useful DSP algorithms have high dimensions and complex logic. Consequently, an efficient implementation of these algorithms on parallel processor arrays must involve a structured design methodology. Full-search block-matching motion estimation is one of those algorithms that can be developed using parallel processor arrays. In this paper, we present a hierarchical design methodology for the full-search block matching motion estimation. Our proposed methodology reduces the complexity of the algorithm into simpler steps and then explores the different possible design options at each step. Input data timing restrictions are taken into consideration as well as buffering requirements. A designer is able to modify system performance by selecting some of the algorithm variables for pipelining or broadcasting. Our proposed design strategy also allows the designer to study time and hardware complexities of computations at each level of the hierarchy. The resultant architecture allows easy modifications to the organization of data buffers and processing elements-their number, datapath pipelining, and complexity-to produce a system whose performance matches the video data sample rate requirements.     

基于TC8830AF的智能语音卡结构与设计

本文描述一种基于８０３１单片机和ＴＣ８８３０ＡＦ语音处理器的ＰＣ机智能语音卡，通过软硬件设计解决了ＰＣ－８０３１－ＴＣ８８３０ＡＦ结构中的通讯问题。该语音卡在进行语音的合成、编辑和播放时，仅占用极少的ＰＣ机ＣＰＵ处理时间，能满足计算机系统进行实时语音合成的要求。     

基于FPGA的星载AIS信号处理器的设计

针对星载AIS(船舶自动识别系统)接收系统提出了实现信号有效接收的总体方案。重点提供星载AIS信号处理器的硬件电路设计和基于FPGA信号处理软件设计。以AIS接收机整机为测试平台,通过仿真和试验验证了星载AIS接收机整机设计的有效性和可行性,此信号处理器可以满足星载AIS接收机的需求。     

A new short-time high-overload BLDC driving system based on electronic flywheel and time-division switching control

Most of the existing (BLDCM) brushless dc motor drive systems are designed with the traditional drive scheme for long-time operation. For short-time and heavy-duty applications, there are problems of energy consumption, large volume, heavyweight and high-cost. In this paper, a new short-time high-overload BLDCM drive system based on "electronic flywheel" and time-division switching control is proposed, which includes three core contents: a crushing chamber based on combined cutter head, an energy storage device based on an "electronic flywheel" and high overload factor BLDC using a new calculation method of capacitance and a speed control system based on time-division switching control of the speed loop and the current loop. To prove the effectiveness of the proposed scheme, a kitchen garbage processor is developed and tested. The results show that the "electronic flywheel" energy storage driving device designed in this paper is able to provide most of the energy required in the heavy-duty driving process. The designed time-division switching control scheme can well meet the control requirements for the short-time heavy load drive of the kitchen waste processor. Compared with the traditional long-time rated load drive scheme, the proposed system has the advantages of energy-saving, small volume, lightweight and low-cost.     

81.6 GOPS Object Recognition Processor Based on a Memory-Centric NoC

For mobile intelligent robot applications, an 81.6 GOPS object recognition processor is implemented. Based on an analysis of the target application, the chip architecture and hardware features are decided. The proposed processor aims to support both task-level and data-level parallelism. Ten processing elements are integrated for the task-level parallelism and single instruction multiple data (SIMD) instruction is added to exploit the data-level parallelism. The Memory-Centric network-on-chip7 (NoC) is proposed to support efficient pipelined task execution using the ten processing elements. It also provides coherence and consistency schemes tailored for 1-to-N and M-to-1 data transactions in a task-level pipeline. For further performance gain, the visual image processing memory is also implemented. The chip is fabricated in a 0.18- $mu$m CMOS technology and computes the key-point localization stage of the SIFT object recognition twice faster than the 2.3 GHz Core 2 Duo processor.      

基于FPGA和DSP的音视频采集处理系统设计

为了实时记录飞机飞行及作业过程中的各种信息,提出了一种基于FPGA和DSP的机载音视频采集处理系统。FPGA作为协处理器,完成对高清视频信号和音频信号的采集、解码以及格式的转换。DSP作为主处理器,在Linux系统的开发环境下,以视频H.264编码算法和音频G.711编码算法为核心完成了对音视频信号的压缩和存储。该系统性能稳定,实用性强,能够满足飞机飞行6小时的5路视频和2路音频信号的采集、存储和回放,达到了设计要求,具有一定的参考价值。