Two-step rapid thermal diffusion of boron into silicon using a boron nitride solid diffusion source

A two-step rapid thermal diffusion process of boron into silicon using a boron nitride solid diffusion source is described. During the first step, HBO² glass is transferred onto the silicon wafer from the diffusion source by keeping the temperature of the silicon wafer at 750° C while the diffusion source is at about 900° C. Boron is, then, diffused into the silicon wafer from HBO² glass at 1000° C or 1100° C in N₂ during the second step. Extremely shallow junctions with junction depths of about 20 nanometers and sheet resistances of about 350 ohms/sq can be achieved with this method as well as relatively deep junctions with junction depths of about 175 nanometers and sheet re-sistances of about 55 ohms/sq. When the diffusion is performed at 1100° C, both the junction depth and electrically active boron concentration at the surface increase as the ambient gas is changed from N₂ to O₂ while the sheet resistance decreases. A boron rich layer which has high resistivity is not formed at the surface when the diffusion is performed at 1100° C in O₂ ambient. This work was supported by Ministry of Science and Technology, Korea     

Crystal damage and the properties of implanted p-n junctions in silicon

The influence of crystal damage on the properties of implanted p-n junctions has been studied by variation of the amount of initial damage, variation of the recovery process, and variation of the residual damage. This was done by carrying out implantations at - 196, 25 and 700°C with 10¹⁵ B⁺/cm² at an energy of 50 keV, and at 25°C with 10¹⁵ BF₂⁺ at an energy of 250 keV and 10¹⁵ Ga⁺/cm² at an energy of 70 keV. Substrate orientations of both 〈111〉 and 〈100〉 were used, and annealing was done in a temperature range between 400 and 1100°C. Gettered as well as non-gettered slices were used for 〈111〉 oriented substrates. The diode properties were analyzed with the aid of Shockley-Read-Hall recombination statistics. Depending upon crystal history and processing, different traps are found to dominate the reverse current. Traps caused by the gettering of contamination as well as those caused by the damage itself play a role. The number of traps is found to be smaller than 10¹²/cm³ for well annealed diodes, resulting in a reverse current density of 0.2 nA/cm² at 1 V reverse bias.     

Boron-implanted silicon resistors

The sheet resistance of silicon resistors implanted with boron at room temperature has been experimentally determined for doses from 5 × 10¹² to 2 × 10¹⁶ cm^?2. The results have been compared with the V calculated values. Two methods for minimizing the temperature coefficient, TCR, are described, and their merits and disadvantages are discussed. For a 1-kΩ/□ resistor, TCR can be reduced to 1000 ppm/°C by implanting ¹¹B⁺ at low energy, 5–10 keV, and to less than 100 ppm/°C by implanting a suitable dose of Ar⁺ damage. In a two-terminal resistor, the end effect of the total sheet resistance on TCR and on voltage coefficient VCR was also investigated.     

The effect of argon implantation on the conductivity of boron implanted silicon

Silicon wafers have been implanted with boron (3 × 10¹⁴ or 1 × 10¹⁵ ions cm^?2) and with argon (up to 1 × 10¹⁵ ions cm^?2). The energies were chosen to approximately superimpose the two impurity distributions. After the boron and argon implantations the sheet resistance of each wafer was measured following annealing in nitrogen at temperatures in the range 400–1050°C. The highest dose argon implantation produced an increase in sheet resistance which persisted throughout the entire temperature range. Lower argon doses produced a reduction in sheet resistance for anneal temperatures between 550 and 800°C. The magnitude of the reduction is a function of the boron and argon doses and of the anneal temperatures. The greatest reduction, observed after a 600°C anneal, was by a factor of 5.8. Above 800°C the low dose argon did not affect the sheet resistance.The observed reduction in sheet resistance is expected to lead to an improvement in metal to p-type silicon contacts. A particular application is in the contacts to resistors in fast bipolar logic circuits. As high electrical activity can be obtained at moderate annealing temperatures with combined boron and argon implantations, these implantations can be carried out at a late stage in an integrated circuit process schedule without the danger of additional movement of existing junctions.     

Polycrystalline silicon resistors for integrated circuits

The suitability of thin films of doped polycrystalline silicon on SiO₂ substrates for the production of high value resistors for monolithic integrated circuits is considered. Resistors fabricated from this material posses the advantages of high sheet resistivity and dielectric isolation while still preserving an all silicon technology compatible with conventional production techniques.Relevant structural and electrical properties of doped polycrystalline films produced by both vacuum evaporation onto hot substrates with gas-doping and by diffusion-annealing of amorphous films have been investigated. Sheet resistivities and TCR values measured on 2500 Å polycrystalline films have proved superior to those encountered with conventional diffused resistors. Typically films with sheet resistivities of 1 kΩ/□ had TCR's of ?1000 ppm/°C while conventional diffused resistors are generally made from material of 200 Ω/□ and +2000 ppm/°C TCR. Etched resistor line widths of 0·25 mil. have been obtained in the polycrystalline material employing conventional photolithographic techniques. The temperature stability and linearity of doped polycrystalline resistors have been investigated.     

The effect of Ta to Si ratio on magnetron sputtered Ta-Si-N thin films

The role of composition on the resistivity and thermal stability of reactively sputtered Ta-Si-N films have been studied using x-ray diffraction, Rutherford backscattering spectrometry, and sheet resistance measurement. Films with higher silicon to tantalum ratio were found to be more thermally stable and have higher sheet resistance than films with lower Si to Ta ratio. While Ta_0.28Si_0.07N_0.65 starts to crystallize at about 900°C, for example, Ta_0.24Si_0.10N_0.66, and Ta_0.24Si_0.12N_0.64 remained amorphous and thermally stable for heat treatment up to 1100°C. In-situ sheet resistance measurement showed that the resistivity of the alloys varies with composition and decreases with temperature; films with higher Ta/Si ratio have lower resistivity. The resistivity of the films, at 30°C, was about 675 Θ-cm, 285 Θ-cm, and 135 Θ-cm and decreased to 61.5 Θ-cm, 22.5 Θ-cm, and 19.5 Θ-cm at 480°C for Ta_0.24Si_0.12N_0.64, Ta_0.24Si_0.10N_0.66, and Ta_0.28Si_0.07N_0.651 in that order. Our results indicate that the composition of Ta-Si-N films could be manipulated to obtain low resistivity films that could be used in device applications.     

Electrical characteristics of thin Ni2Si,NiSi, and NiSi2 layers grown on silicon

We have determined the resistivity, carrier concentration, and Hall mobility as a function of thickness (700–3000 Å) of Ni₂Si, NiSi, and NiSi₂ layers formed by vacuum annealing at 270÷v300°C, ≈ 400°C, and ≈ 800°C, respectively, of nickel films vacuum-deposited on a silicon substrate (111 n-type and 100 p-type Si ρ ≈ 1KΩ). The layer thicknesses were measured by 2 MeV⁴He⁺ backscattering spectrometry. The silicide phase was confirmed by x-ray measurements. The electrical measurements were carried out using van der Pauw configuration. We found the electrical transport parameters to be independent of the film thickness within the experimental uncertainty. The Hall factors were assumed to be unity. The majority carriers are electrons in NiSi and holes in Ni₂Si and NiSi₂. The resistivity values are 24±2, 14±1, and 34±2 μΩcm, the electron concentrations are 9±3, 10 and 7±1, and ≈ 2 × 10²² cm^?3, and the Hall mobilities are 3±1, ≈ 4.5 and 6, and ≈ 9 cm²/Vs for Ni₂Si, NiSi (〈100〉 and 〈111〉), and NiSi₂, respectively. The systematic error in the measured values caused by currents in the high resistivity substrate is estimated to be less than 6% for the Hall coefficient. The results show that Ni₂Si, NiSi, and NiSi₂ layers formed by a thin film reaction are electrically metallic conductors, a result which concurs with those reported previously (1) for refractory metal silicides. The Hall mobility increases with the Si content in the silicide. The electron concentration is lowest for NiSi₂ leading to the highest resistivity for the epitaxial phase of NiSi₂.     

Sensitivity analysis of ion implanted silicon wafers after rapid thermal annealing

In this study, we have investigated sensitivities of the ion implanted silicon wafers processed by rapid thermal annealing (RTA), which can reveal the variation of sheet resistance as a function of annealing temperature as well as implantation parameters. All the wafers were sequentially implanted by the arsenic or phosphorous implantations at 40, 80, and 100 keV with the dose level of 10¹⁴ to 2 × 10¹⁶ ions/cm². Rapid thermal annealing was carried out for 10 s by the infrared irradiation at a temperature between 850 and 1150°C in the nitrogen ambient. The activated wafer was characterized by the measurements of the sheet resistance and its uniformity mapping. The values of sensitivities are determined from the curve fitting of the experimental data to the fitting equation of correlation between the sheet resistance and process variables. From the sensitivity values and the deviation of sheet resistance, the optimum process conditions minimizing the effects of straggle in process parameters are obtained. As a result, a strong dependence of the sensitivity on the process variables, especially annealing temperatures and dose levels is also found. From the sensitivity analysis of the 10 s RTA process, the optimum values for the implant dose and annealing temperature are found to be in the range of 10¹⁶ ions/cm² and 1050-1100°C, respectively. The sensitivity analysis of sheet resistance will provide valuable data for accurate activation process, offering a guideline for dose monitoring and calibration of ion implantation process.     

Microwave Annealing of High Dose Al<Superscript>+</Superscript>-implanted 4H-SiC: Towards Device Fabrication

High-purity semi-insulating 8° off-axis 〈0001〉 4H-SiC was implanted with Al⁺ at different doses and energies to obtain a dopant concentration in the range of 5 × 10¹⁹–5 × 10²⁰ cm^?3. A custom-made microwave heating system was employed for post-implantation annealing at 2,000 °C for 30 s. Sheet resistance and Hall-effect measurements were performed in the temperature range of 150–700 K. At room temperature, for the highest Al concentration, a minimum resistivity of 3 × 10^?2 Ω cm was obtained, whereas for the lowest Al concentration, the measured resistivity value was 4 × 10^?1 Ω cm. The onset of impurity band conduction was observed at around room temperature for the samples implanted with Al concentrations ≥3 × 10²⁰ cm^?3. Vertical p ⁺-i-n diodes whose anodes were made by 1.5 × 10²⁰ cm^?3 Al⁺ implantation and 2,000 °C/30 s microwave annealing showed exponential forward current–voltage characteristics with two different ideality factors under low current injection. A crossover point of the temperature coefficient of the diode resistance, from negative to positive values, was observed when the forward current entered the ohmic regime.     

Resistivity changes of heavily-boron-doped CVD-prepared polycrystalline silicon caused by thermal annealing

Heavily-boron-doped polycrystalline Si films were deposited at 600°C on thermally grown SiO₂ by the thermal decomposition of SiH₄-BCl₃-H₂ mixture. Resistivity changes with isochronal or sequential annealing were systematically examined. Temperature dependence of equilibrium saturation carrier concentration was determined at 800 ～ 1100°C. Since as-deposited polycrystalline Si is in the super-saturated state, carrier concentration decreases from the super-saturated to equilibrium saturation value by annealings over 700°C for poly Si doped with over 2 × 10²⁰ cm^?3 resulting in anomalous resistivity change. Carrier concentration changes reversibly between saturation values with sequential annealing and is determined by the last annealing temperature when the annealing time is long enough. Mobility increases with annealing temperature, however, less increase is found for heavily doped poly Si, which is attributed to the suppression of grain growth caused by electrically inactive Si-B compounds.     

Resistors and diodes produced by Al-implantation in silicon

Al⁺-ions are implanted to obtain diodes and resistors with a sheet resistivity higher than 100 kΩ/□. Breakdown voltage of the diodes is between 240 V and 300 V. The conductivity of the resistors shows approximately a square root dependence on the implantation dose after a 500°C anneal. The temperature coefficient is α ≈ 3 × 10^?3 K^?1. The values are compared with results of B⁺-ion implantations.     

An investigation of RF sputter etched silicon surfaces using helium ion backscatter

The effect of RF sputter etching on the (111) surface of silicon was studied by observing backscatter spectra from a 2 MeV, ⁴He⁺ beam oriented along the silicon 〈111〉 channel. Silicon samples were RF sputter etched in a 5 × 10^?3 torr, argon discharge at electrode bias potentials ranging from 0.5 to 2.5 kV. The samples were sputter etched for a time sufficient for the lattice damage to reach saturation. Analysis of these samples revealed that the thickness of this damage layer and the concentration of trapped argon increased with electrode bias potential. An annealing study of these damaged surfaces was carried out to 900°C.     

Intrinsic and Doped Zinc Oxide Nanowires for Transparent Electrode Fabrication via Low-Temperature Solution Synthesis

Undoped and doped zinc oxide (ZnO) nanowires were synthesized by decomposing metal salts in trioctylamine at 300°C. By adding metal salts during the formation of the wires, effective incorporation of Ga and Al up to 5% was achieved, as measured by energy-dispersive x-ray spectroscopy and Auger electron spectroscopy. No secondary phase was detected by high-resolution transmission electron microscopy and x-ray diffraction. The nanowires were single-crystalline with a wurtzite lattice structure. Films made with doped wires show a complex dependence of the sheet resistance on processing conditions and dopant concentration. Thermal annealing treatment reduced the sheet resistance to values of 10³ Ω/square.     

Study of contact resistivity, mechanical integrity, and thermal stability of Ti/Al and Ta/Al ohmic contacts to n-type GaN

The annealing conditions and contact resistivities of Ta/Al ohmic contacts to n-type GaN are reported for the first time. The high temperature stability and mechanical integrity of Ti/Al and Ta/Al contacts have been investigated. Ta/Al (35 nm/115 nm) contacts to n-type GaN became ohmic after annealing for 3 min at 500°C or for 15 s at 600°C. A minimum contact resistivity of 5×10⁻⁶Ω cm² was measured after contacts were repatterned with an Al layer to reduce the effect of a high metal sheet resistance. Ti/Al and Ta/Al contacts encapsulated under vacuum in quartz tubes showed a significant increase in contact resistivity after aging for five days at 600°C. Cross section transmission electron microscopy micrographs and electrical measurements of aged samples indicate that the increased contact resistivity is primarily the result of degradation of the metal layers. Minimal reactions at the metal/GaN interface of aged samples were observed.     

Microstructure and properties of multilayer-derived tungsten silicide

In metallization, peeling and oxidation of tungsten silicide are the most serious problems of tungsten rich silicide. In this study, multilayer-derived silicon rich tungsten silicide with the silicon film on the outermost surface is investigated to avoid these problems. The dependence of sheet resistance on the annealing conditions is studied. X-ray diffraction results indicate that silicide formation is nearly completed after 30 min annealing at 750° C. Microstructures of silicide and polycides are investigated by electron microscopy. Silicide deposited on SiO₂ has smaller grains that deposited on poly-Si. A resistivity of 60 μΩ-cm is obtained for multilayer-derived WSi_2.3.     

Annealing of damage in Se+-implanted indium phosphide

The production and annealing of damage in (100) InP implanted with Se⁺ ions at 77 K, room temperature and 180°C have been studied by channeling and differential Hall measurements. For ion energies from 100 to 400 keV, fluences of 10¹⁴ and 10¹⁵ cm^?2 produce amorphous layers which extend to the surface in samples implanted at 77 K or room temperature, while the samples implanted at 180°C remain crystalline. According to the channeling measurements, amorphous layers less than 2000 Å thick produced by either 77 K or room-temperature implants are completely reordered by annealing at 750°C for 10 min, while the post-anneal residual disorder of thicker layers is linearly dependent on the initial amorphous layer thickness. After annealing, samples implanted at 180°C have higher sheet carrier concentrations and mobilities but considerably broader carrier concentrations than samples similarly implanted at either 77 K or room temperature, even when the amorphous layers in the latter samples are completely reordered. It is considered that for most applications heated implants should be used to avoid the formation of amorphous layers.     

Damaged-induced isolation in n-type InP by light-ion implantation

A detailed study of the insulating properties of ion-implantation induced damage in InP has been carried out for H, He, B and Be implantation. For each ion, there was found to be an optimal implantation fluence for the formation of resistive layers. At this fluence, a maximum resistivity of 10³ to 10⁴Ω·cm was observed. Lower resistivities were observed for higher and lower implantation fluences. The primary anneal stage for the maximum resistivity layers was between 250 and 300°C.Anomalous results were observed for H implantation in that the resistivity observed depends on the test structure geometry. Measurements carried out by contacting the front and back of the damage layer gave resistivity values two orders of magnitude greater than those measured by contacting adjacent points on an epitaxial structure. For all other ions, the results obtained for the two geometries were in good agreement. It has been shown that a conductive layer produced by the proton bombardment of the underlying Fe-doped substrate gives rise to a low resistance shunt in the epitaxial study.     

Finite metal-sheet-resistance in contact resistivity measurements: Application to Si/TiN contacts

The standard transmission line model cannot be applied to evaluate the contact resistivity of thin TiN layers on highly doped p⁺ and n⁺ substrates because the finite sheet resistance of the TiN must be accounted for. We present two ways to include this effect using existing analytical models. The results are shown to agree with measurements where the effect of the finite sheet resistance of TiN is eliminated with a metallic overlayer. With the help of these evaluation techniques, it is shown that the contact resistivity of TiN changes in opposite ways for p⁺ and n⁺Si after vacuum annealing at 600°C for 15 min. This result is consistent with an increase of the barrier height φ_Bn of the contact by ?0.1 V to near midgap value.     

Fabrication of High-Temperature-Stable Thermoelectric Generator Modules Based on Nanocrystalline Silicon

High-temperature-stable thermoelectric generator modules (TGMs) based on nanocrystalline silicon have been fabricated, characterized by the Harman technique, and measured in a generator test facility at the German Aerospace Center. Starting with highly doped p- and n-type silicon nanoparticles from a scalable gas-phase process, nanocrystalline bulk silicon was obtained using a current-activated sintering technique. Electrochemical plating methods were employed to metalize the nanocrystalline silicon. The specific electrical contact resistance ρ _c of the semiconductor–metal interface was characterized by a transfer length method. Values as low as ρ _c < 1 × 10^?6 Ω cm² were measured. The device figure of merit of a TGM with 64 legs was approximately ZT = 0.13 at 600°C as measured by the Harman technique. Using a generator test facility, the maximum electrical power output of a TGM with 100 legs was measured to be roughly 1 W at hot-side temperature of 600°C and cold-side temperature of 300°C.     

Metallurgical and electrical properties of chromium silicon interfaces

The effect of annealing treatment up to 500°C on CrSi contacts was studied from physico-chemical and electrical view points. The solid-solid reactions between a 1000 Å thick Cr layer and a 〈111〉N single crystal of silicon, were studied by the He⁺ ion backscattering method, X-ray diffraction and transmission electron microscopy. We first observed a growth in the Cr grains and then the nucleation and growth of the disilicide CrSi₂. For annealing temperatures greater than 415°C, the growth is linear in time with an activation energy of 1.5±0.1 eV and for lower temperatures it becomes superlinear. The growth mechanism is discussed in terms of growth limiting phenomena. The variations of the electrical parameters (ideality factor n and barrier height 0_Bn) as a function of 15 min anneals between 300 and 500°C were correlated to the physico chemical observations. We establish, firstly, an optimal temperature annealing range in order to obtain good Schottky CrSi diodes and, secondly, a low limit of Cr thickness which must be deposited to obtain acceptable Schottky CrSi₂  Si diodes after annealing.