Beyond contracts for concurrency

SCOOP is a concurrent programming language with a new semantics for contracts that applies equally well in concurrent and sequential contexts. SCOOP eliminates race conditions and atomicity violations by construction. However, it is still vulnerable to deadlocks. In this paper we describe how far contracts can take us in verifying interesting properties of concurrent systems using modular Hoare rules and show how theorem proving methods developed for sequential Eiffel can be extended to the concurrent case. However, some safety and liveness properties depend upon the environment and cannot be proved using the Hoare rules. To deal with such system properties, we outline a SCOOP Virtual Machine (SVM) as a fair transition system. The SVM makes it feasible to use model-checking and theorem proving methods for checking global temporal logic properties of SCOOP programs. The SVM uses the Hoare rules where applicable to reduce the number of steps in a computation. P. J. Brooke, R. F. Paige and Dong Jin Song This work was conducted under an NSERC Discovery grant.     

基于改进Q-学习算法的多阶段群体决策模型

多阶段群体决策问题是一类典型的动态群体决策问题,主要针对离散的确定状态下的最优群体决策问题求解.但由于现实环境面临的大部分是不确定状态空间,甚至是未知环境空间(例如状态转移概率矩阵完全未知),为了寻求具有较高共识度的多阶段群体最优策略,决策者需要通过对环境的动态交互来获得进一步的信息.针对该问题,利用强化学习技术,提出一种求解多阶段群体决策的最优决策算法,以解决在不确定状态空间下的多阶段群体决策问题.结合强化学习中的Q-学习算法,建立多阶段群体决策Q-学习基本算法模型,并改进该算法的迭代过程,从中学习得到群体最优策略.同时证明基于Q-学习得到的多阶段群体最优策略也是群体共识度最高的策略.最后,通过一个计算实例说明算法的合理性及可行性.     

A unified analysis of value-function-based reinforcement- learning algorithms

Reinforcement learning is the problem of generating optimal behavior in a sequential decision-making environment given the opportunity of interacting with it. Many algorithms for solving reinforcement-learning problems work by computing improved estimates of the optimal value function. We extend prior analyses of reinforcement-learning algorithms and present a powerful new theorem that can provide a unified analysis of such value-function-based reinforcement-learning algorithms. The usefulness of the theorem lies in how it allows the convergence of a complex asynchronous reinforcement-learning algorithm to be proved by verifying that a simpler synchronous algorithm converges. We illustrate the application of the theorem by analyzing the convergence of Q-learning, model-based reinforcement learning, Q-learning with multistate updates, Q-learning for Markov games, and risk-sensitive reinforcement learning.     

应用森兰变频器的自来水厂恒压供水系统解决方案

当前变频技术已广泛应用于自来水厂的恒压供水系统中,对于多泵配置,通常有两种不同的控制方案,即”顺序控制”方案和”循环投切”方案。本文着重介绍后者,描述了”循环投切”的工作过程和对变频器和电机的影响,最后给出了应用实例。     

路由器动态性能指标测试方法研究

路由器是整个网络互连环境中的关键设备之一。目前针对路由器性能测试,相关的标准和规范（如Request For Comment,RFC）描述得相当笼统,只有大致的测试框架和过程,没有具体的测试方法。尤其是,标准和规范中给出的是一种静态理想测试环境,不能测试路由器在实际应用中的真实性能。因此,以相关标准和规范为依据,设计了变化动态的测试环境,以尽量仿真实际网络环境中流的真实参数及其变化情况,因而其测试结果更接近真实网络环境下路由器的性能。在此基础上,基于一种多元统计方法--主成分分析法,提出了一种针对路由器必测性能指标的综合评价方案,为路由器设备的选型、性能的评价提供了一种新的参考指标。     

RTL综合中的格式剖别

由于寄存器传输级（RTL）行为描述可以精确地确定数字系统的操作,所以寄存器传输级综合成为当前EDA行业的主流设计方法。实现从寄存器传输级行为描述到门级结构描述转换的RTL综合,是组合逻辑／时序逻辑综合理论在HDL（硬件描述语言）上的具体应用。设计寄存器传输级综合工具的基础是格式判别,即将行为描述中的组合逻辑与时序逻辑区分开来,利用组合逻辑综合与时序逻辑综合分别进行处理从而完成寄存器传输级综合,提出一种易于实现的格式判别方法,该方法利用赋值语句为核心的中间数据格式以及逻辑综合所能接受的条件判断此赋值语句组合是组合逻辑还是时序逻辑,并生成不同层次、功能相对独立的RT单元以便利用对应的组合逻辑综合或时序逻辑综合处理此RT单元,从而在实现RTL综合的过程中使组合逻辑综合和时序逻辑综合得到最大限度的重用。最后文中给出一些测试实例和结果分析,通过测试实例和结果分析表明该文提出手方法不但有效地区分了组合逻辑和时序逻辑,而且由于通过对组合逻辑综合和时序逻辑综合最大限度的重用,使寄存器传输级综合的开发时间大大缩短,此方法已经用于作者的RTL综合系统中。     

Sequential algorithms on concrete data structures

We provide a sequential denotational semantics for sequential programming languages, based on a new notion of sequential algorithm on the Kahn-Plotkin concrete data structures. Intuitively an algorithm may be seen either as a concrete object—a “program” in a simple output-driven language — or as an abstract object — the pair of a sequential function and of a computation strategy for it. The concrete and abstract presentations are equivalent, as shown by a representation theorem. The algorithms form a cartesian closed category with straightforward solutions to recursive domain equations. Hence they may replace functions in the denotational semantics of any sequential language. An applicative programming language based on sequential algorithms is presented in a companion paper.     

基于截断型序贯检测的协作频谱感知算法

本文针对低信噪比情况下认知用户的频谱感知需求,提出了一种基于截断型序贯检测的协作频谱感知算法。协作认知用户对接收到的信号序列进行分段处理,统计各自段内采样点能量值大于预设门限值的个数并将其作为本地检测统计量上传至融合中心,有效的减少了控制信道的开销。棣莫弗—拉普拉斯定理和中心极限定理的引入,又使得段内检测统计量近似为高斯分布,从而大大简化了后续似然比函数的理论推导和计算过程。性能分析及仿真结果表明,在目标检测性能相同的条件下,相比现有的能量检测算法,所提算法大大降低了所需的频谱感知时间。     

基于CSCW的网络化制造协作支持系统研究与开发

研究开发基于Java的网络化制造协作支持系统,对系统的应用环境和运作流程等进行了分析,完成了系统模型的设计,在对相关关键技术进行深入研究的基础上部分实现了该系统。     

Machine independent AND and OR parallel execution of logicprograms. II. Compiled execution

For pt.I. see ibid., p. 170-80. In pt.I, we presented a binding environment for the AND and OR parallel execution of logic programs. This environment was instrumental in rendering a compiler for the AND and OR parallel execution of logic programs machine independent. In this paper, we describe a compiler based on the Reduce-OR process model (ROPM) for the parallel execution of Prolog programs, and provide performance of the compiler on five parallel machines: the Encore Multimax, the Sequent Symmetry, the NCUBE 2, the Intel i860 hypercube and a network of Sun workstations. The compiler is part of a machine independent parallel Prolog development system built on top of a run time environment for parallel programming called the Chare kernel, and runs unchanged on these multiprocessors. In keeping with the objectives behind the ROPM, the compiler supports both on and independent AND parallelism in Prolog programs and is suitable for execution on both shared and nonshared memory machines. We discuss the performance of the Prolog compiler in some detail and describe how grain size can be used to deliver performance that is within 10% of the underlying sequential Prolog compiler on one processor, and scale linearly with increasing number of processors on problems exhibiting sufficient parallelism. The loose coupling between parallel and sequential components makes it possible to use the best available sequential compiler as the sequential component of our compiler     

General decomposition of incompletely specified sequential machines with multi-state behavior realization

This paper is devoted to decomposition of sequential machines, discrete functions and relations. Sequential machine decomposition consists in representation of a given machine as a network of collaborating partial machines that together realize behavior of the given machine. A good understanding of possible decomposition structures and of conditions under which the corresponding structures exist is a prerequisite for any adequate circuit or system synthesis. The paper discusses the theory of general decomposition of incompletely specified sequential machines with multi-state behavior realization. The central point of this theory is a constructive theorem on the existence of the general decomposition structures and conditions under which the corresponding structures exist. The theory of general decomposition presented in this paper is the most general known theory of the binary, multi-valued and symbolic sequential and combinational discrete network structures. The correct circuit generator defined by the general decomposition theorem covers all other known structural models of sequential and combinational circuits as its special cases. Using this theory, in recent years we developed a number of effective and efficient methods and EDA tools for sequential and combinational circuit synthesis that consistently construct much better circuits than other academic and commercial state-of-the-art synthesis tools. This demonstrates the practical soundness of our theory. This theory can be applied to any sort of binary, multi-valued and symbolic systems expressed as networks of relations, functions or sequential machines, and can be very useful in such fields as circuit and architecture synthesis of VLSI systems, knowledge engineering, machine learning, neural network training, pattern analysis, etc.