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1.
In this article, we propose a novel high-performance complementary metal oxide semiconductor (CMOS) current differencing transconductance amplifier (CDTA) with a transconductance gain (GM) that can be linearly tuned by a voltage. By using a high-speed, low-voltage, cascaded current mirror active resistance compensation technique, the proposed CDTA circuit exhibits wide frequency bandwidths, high current tracking precisions as well as large output impedances. The linear-tunable GM of the CDTA is designed with the use of linear composite metal oxide semiconductor field-effect transistor as basic cells in the circuit. Combining these two approaches, several design concerns are studied, including: impedance characteristic, tracking errors, offset and linearity and noise. The prototype chip with a 0.25 mm2 area is fabricated in a GlobalFoundries’0.18 μm CMOS process. The simulated results and measured results with ±0.8 V DC supply voltages are presented, and show extremely wide bandwidths and wide linear tuning range. In addition, a fully differential band-pass filter for a high-speed system is also given as an example to confirm the high performance of the proposed circuit.  相似文献   

2.
This paper presents a new fully differential second generation current controlled conveyor (FDCCCII) based on differential pair topology, which employs floating gate MOS transistors (FG-MOS). It uses floating gate MOSFETs at the input stage and has rail-to-rail structure which performs with both positive and negative signals. This circuit has tunable parasitic resistance at its input port. It operates with low supply voltage (±0.8 V), low power consumption (lower than 3 mW at current bias of 1 mA), and wide range parasitic resistance (R X ). This circuit has less MOSFET than the previous similar circuits and is suitable for integrated circuit design. To demonstrate the application of the proposed circuit, a fully differential current mode LC-ladder filter and a fully differential multifunction biquad filter are designed. Simulation results by HSPICE confirm validity of the proposed circuit and its application.  相似文献   

3.
This paper presents an ultra-low-power, bulk-driven, source-degenerated fully differential transconductor (FD-OTA), operating in subthreshold region. The source-degeneration (SD) and bulk-drive ensure linearity and rail-to-rail input swing. The flipped voltage follower and SD resistor perform V–I conversion in input core with power efficient class AB mode of operation. The reduction in open loop gain and gain bandwidth (GBW) of bulk-drive is compensated by applying partial positive feedback at diode connected MOSFET pair. The current gain from input core to output load side is set (1:1) in OTA1 and (1:4) in OTA2. The OTA2 offers increased transconductance and GBW whereas self-cascode load increases the output impedance and overall gain of the FD-OTAs. Both the input core and common source self-cascode load operate in class AB mode so these FD-OTAs provide enhanced slew rates. These OTAs have been employed to implement Biquadratic low-frequency Gm-C filter suitable for bio-signal applications. The proposed OTA2 has used dual supply voltage of ± 0.3 V and dissipates around 70 nW power and provides 62 dB FD-open loop gain with GBW of 7.73 kHz while driving the FD-load of 2 × 15 pF. The Cadence VIRTUOSO environment using UMC 0.18 µm CMOS process technology has been used to simulate the proposed circuit. The Simulation results verified fully differential total harmonic distortion of ? 72 dB, for 1.2 Vp–p signal at 200 Hz frequency in unity gain configuration with resistive degeneration of 1 MΩ for OTA1.  相似文献   

4.
A current-controlled multivibrator using operational transconductance amplifiers (OTAs) is proposed and the circuit operation is described. The frequency of oscillations ?o is calculated (both bipolar and MOS OTAs are treated). The circuit allows operation with a low voltage power supply. An example describes the experimental results for the multivibrator realized with CA3080 OTA integrated circuits. Linear control of ?o over a two decade range (500 Hz–50 kHz) is obtained with the minimum rated power supply voltage of ±2 V.  相似文献   

5.
A low jitter Spread Spectrum Clock Generator (SSCG) based on a fractional-N Phase Locked Loop (PLL) capable of generating various Electromagnetic Interference (EMI) reduction levels is proposed. A digital compensation filter is fully integrated in the design to prevent various triangular modulation profiles from being distorted by the prohibitively small PLL loop bandwidth. A simple but comprehensive logic design included in the digital filter provides independently controllable modulation frequency, f m, and modulation ratio, δm within all modulation modes (up, down, center). The proposed SSCG is designed in a 0.18 μm CMOS standard cell library and operates at 72 MHz with f m ranging from 58 to 112.5 kHz and δm ranging from 0.75 to 2 %.  相似文献   

6.
High performance electronic systems face several challenges in driving innovative integrated circuits when the internal transistors are scaled down below 45 nm. Carbon nanotube field effect transistors (CNFETs) are considered as excellent candidates for building energy-efficient electronic systems in the near future, due to their unique characteristics such as ballistic transport, scalability, and better channel electrostatics. In this paper, a new high performance operational transconductance amplifier (OTA) based on 32 nm CNFET devices is presented. The proposed OTA maintains a highly linear wide continuous tuning range and a wide frequency response range, enabled by splitting the linear voltage-to-current conversion and tuning two different blocks. As an application, a universal second-order transconductance-capacitor (G m  ? C) filter realized using the OTA is introduced. Simulation results show that the CNFET-based OTA offers very a low current consumption of 2.35 μA from a ± 0.9 V power supply, achieves a bandwidth of 9.5 MHz, and has an input dynamic range of ± 0.2 V.  相似文献   

7.
In this paper, an integrated multiple-output switched-capacitor (SC) converter with time-interleaved control and output current regulation is presented. The SC converter can reduce the number of passive components and die areas by using only one flying capacitor and by sharing active devices. The proposed converter has three outputs for individual brightness control of red–green–blue (RGB) LEDs. Each output directly regulates the current due to the V–I characteristics of LEDs, which are sensitive to PVT variations. In the proposed converter, the current-sensing technique is used to control the output current, instead of current-regulation elements (resistors or linear regulators). Additionally, in order to reduce the active area, three outputs share one current-sensing circuit. In order to improve the sensing accuracy, bias current compensation is applied to a current-sensing circuit. The proposed converter has been fabricated with a CMOS 0.13-μm 1P6M CMOS process. The input voltage range of the converter is 2.5–3.3 V, and the switching frequency is 200 kHz. The peak power efficiency reaches 71.8 % at V IN =2.5 V, I LED1 = 10 mA, I LED2 = 18 mA, and I LED3 = 20 mA. The current variations of individual outputs at different supply voltages are less than 0.89, 0.72, and 0.63 %, respectively.  相似文献   

8.
This article presents a built-in current sensor (BICS), which detects faults using the current testing technique in CMOS integrated circuits. This circuit employs cross-coupled PMOS transistors, which are used as current comparators. The proposed circuit has a negligible impact on the performance of the circuit under test (CUT). In addition, no extra power dissipation and high-speed fault detection are achieved. It can be applied to deep sub-micron processes. The validity and effectiveness are verified through the HSPICE simulation on circuits with faults. The entire area of the test chip is 116×65 μm2. The BICS occupies only 41×17 μm2 of the area of the test chip. The area overhead of a BICS versus the entire chip is about 9.2%. The chip was fabricated with Hynix 0.35 μm 2-poly-4-metal N-well CMOS process.  相似文献   

9.
A 2.4-GHz transconductance (gm)—boosted common gate (CG) low-noise amplifier (LNA) with a high 1-dB compression point (P1dB) is proposed. To overcome the constraint of conventional CG LNA for input-mismatching, RF filters consisting of band-stop and high-pass filter are used as a load and inter-stage matching components, respectively. Therefore, the g m can be freely increased for a high gain and low noise figure (NF) without decreasing input impedance. Moreover, the linearity is also enhanced because band-stop filter load can reduce 2nd harmonics. The fully integrated LNA implemented by 0.18-µm RF CMOS technology delivers an input P1dB of ?1 dBm, a power gain of 14.8 dB and a NF of 3.7 dB. The LNA consumes 8.2 mA at a supply voltage of 1.8 V.  相似文献   

10.
This paper studies the performance of operational transconductance amplifiers (OTAs) fabricated with Graded-Channel (GC) SOI nMOSFETs and designed to provide high open-loop voltage gain or high gain-bandwidth characteristics. Different design targets were taken in account such as similar power dissipation, transconductance over drain current ratio and die area. Comparisons with OTAs made with conventional SOI nMOSFETs, are performed showing that the GC OTAs presents larger open-loop voltage gain without degrading the phase margin, unit gain frequency and slew rate simultaneously with a significant required die area reduction depending on LLD/L ratio used. Circuit simulations and experimental results are used to qualify the analysis.  相似文献   

11.
A continuous time differential voltage mode Gm–C biquad and its adjoint current-mode version are described, employing FCS (floating current source) circuits as building blocks. The biquad operates in the pure mode, i.e. no resistors are used to convert internally voltage into current or vice versa. Both fp and Qp are tunable by current sources applied externally. The current mode version is capable of providing values of Qp 160. Due to the increasing Loop transmission, THD improves significantly towards low frequencies. The input stage of the voltage mode version employs two OTAs, whose outputs are connected in parallel in order to add their differential inputs. This results in the hitherto unnoticed property of subtracting their common mode input, providing an open loop gain which is high for differential, but low for common mode signals.  相似文献   

12.
This paper presents a fully integrated power management and sensing microsystem that harvests solar energy from a micro-power photovoltaic module for autonomous operation of a miniaturized hydrogen sensor. In order to measure H2 concentration, conductance change of a miniaturized palladium nanowire sensor is measured and converted to a 13-bit digital value using a fully integrated sensor interface circuit. As these nanowires have temperature cross-sensitivity, temperature is also measured using an integrated temperature sensor for further calibration of the gas sensor. Measurement results are transmitted to the base station, using an external wireless data transceiver. A fully integrated solar energy harvester stores the harvested energy in a rechargeable NiMH microbattery. As the harvested solar energy varies considerably in different lighting conditions, the power consumption and performance of the sensor is reconfigured according to the harvested solar energy, to guarantee autonomous operation of the sensor. For this purpose, the proposed energy-efficient power management circuit dynamically reconfigures the operating frequency of digital circuits and the bias currents of analog circuits. The fully integrated power management and sensor interface circuits have been implemented in a 0.18 μm CMOS process with a core area of 0.25 mm2. This circuit operates with a low supply voltage in the 0.9–1.5 V range. When operating at its highest performance, the power management circuit features a low power consumption of less than 300 nW and the whole sensor consumes 14.1 μA.  相似文献   

13.
This paper presents a very low-power linearization technique to improve the linearity of frequency-voltage characteristic of LC-VCO (voltage controlled oscillator) using MOS varactor. This reduces the VCO gain (K VCO) variation and its required value over the tuning voltage range. Low K VCO improves noise and reference spur performances at the output of phase lock loop/frequency synthesizer (FS). Low K VCO variation reduces FS loop stability problem. Using this VCO circuit, a fully on-chip integer-N frequency synthesizer has been fabricated in 0.18 μm epi-digital CMOS technology for 2.45 GHz ZigBee application. The measured VCO phase noise is ?115.76 and ?125.23 dBc/Hz at 1 and 3 MHz offset frequencies, respectively from 2.445 GHz carrier and the reference spur of the frequency synthesizer is ?68.62 dBc. The used supply voltage is 1.5 V.  相似文献   

14.
A novel circuit of the low-voltage application-specific amplifier is proposed and analyzed. A wide-band current amplifying cell is developed as a central part of the amplifier structure. The amplifier is designed for a built-in-current-sensor, on-chip circuitry used in high-frequency power supply current monitoring and test applications. It could be implemented with analog, digital, or mixed-signal cores in an integrated system-on-chip environment. The current amplifier has been fabricated in 0.13 and 0.18 μm CMOS technology processes with 1.2 and 1.8 V power supply, respectively. The impacts of technology scaling on amplifier's performances have been investigated as well. With sensitivity better than 500 nA, the 0.13 μm design achieves the gain-bandwidth product of 6.8 GHz, low frequency current gain of 48 dB, high linearity for the input current range of (?15 μA, 15 μA), and power consumption of 5.2 mW.  相似文献   

15.
We introduce two extremely low quiescent current (I Q ) low-dropout (LDO) voltage regulators. The Low I Q -LDO (LI Q -LDO) uses 13 μA of total quiescent current and is designed for a maximum load current of 50 mA. The Micro I Q -LDO (MI Q -LDO) uses only 1.2 μA of total quiescent current and is designed for a maximum load current of 5 mA. Detailed pole/zero analysis is performed to aid in the design of the LDOs. Two LHP zeros cancel the two non-dominant poles which extend the bandwidth and improve transient response. Both designs are fully integrated, stabilized with an on-chip capacitive load of 100 pF. In load transient, the total variation in output voltage for LI Q -LDO and MI Q -LDO is 1 V and 950 mV, respectively, and the total line transient variation is 668 and 599 mV, respectively. Both designs occupy an area of 0.26 mm2 in a 0.5-μm CMOS process. Two process-independent figures of merit are proposed to compare LI Q -LDO and MI Q -LDO with other published work.  相似文献   

16.
Harvesting energy from waste heat is a promising field of research as there are significant energy recovery opportunities from various waste thermal energy sources. The present study reports pyroelectric energy harvesting using thick film prepared from a (x)BaTiO3–(1 ? x)PbZr0.52Ti0.48O3 (BT–PZT) solid solution. The developed BT–PZT system is engineered to tune the ferro to paraelectric phase transition temperature of it in-between the phase transition temperature of BaTiO3 (393 K) and PbZrTiO3 (573 K) with higher pyroelectric figure-of-merit (FOM). The temperature-dependent dielectric behavior of the material has revealed the ferro- to paraelectric phase transition at 427 K with a maximum dielectric constant of 755. The room-temperature (298 K) pyroelectric coefficient (Pi) of the material was obtained as 738.63 μC/m2K which has yielded a significantly high FOM of 1745.8 J m?3 K?2. The enhancement in pyroelectric property is attributed to the morphotopic phase transition between tetragonal and rhombohedral PZT phases in the BT–PZT system. The developed BT–PZT system is capable of generating a power output of 1.3 mW/m2 near the Curie temperature with a constant rate (0.11 K/s) of heating. A signal conditioning circuit has been developed to rectify the time-varying current and voltage signals obtained from the harvester during heating cycles. The output voltage generated by the pyroelectric harvester has been stored in a capacitor for powering wearable electronics.  相似文献   

17.
In this letter we propose a novel low voltage and low power single-CCII bootstrap circuit specifically designed to be implemented as input stage in ElectroCardioGraphy (ECG) or ElectroEncephaloGraphy (EEG) acquisition systems. The proposed circuit implements only a second generation current conveyor that has been designed to obtain, at X and Z nodes, reduced parasitic impedances, so improving CCII performance. Moreover, simulation results are also presented for a two electrodes ECG system. The circuit, designed in a standard 0.35 μm CMOS technology, shows low voltage (1.5 V) low power (28 μW) characteristics, so it is particularly suitable for portable applications.  相似文献   

18.
Topologies for realizing voltage and current mode reconfigurable nth-order filters based on the second-generation current conveyor (CCII) are assessed. The most compatible structure for field-programmable analog array is identified. A CCII adopting active current division networks are utilized for implementing the proposed filter leading to wide control of its coefficients. Programmability characteristics are demonstrated through experimental results obtained from integrated circuit chips fabricated in a 0.18 μm CMOS process.  相似文献   

19.
In this study, we show that floating gate MOS (metal oxide semiconductor) transistors support a low-voltage and low-power variable analogue differential delay line circuit for signals in the audio frequency range. The delay time is dependent and accomplished by a variable bias voltage. Attention is focussed on the fact that the topology will be implemented taking into account low-voltage and low-power. The CMOS (complementary metal oxide semiconductor) circuit design is based on the G m ? C low-pass linear integrator as the main core. This way, a delay line circuit with two taps was implemented in a 1.2-μm CMOS technology. The experimental results show a spurious free dynamic range of 56 dB, a total harmonic distortion of 0.56% and power dissipation of 52 μW with a supply voltage of 1.5 V.  相似文献   

20.
A 60Hz notch filter that can be integrated on a chip is reported. Gm-C filters are used for the necessary time constant multiplication. This filter can easily be tuned and is relatively insensitive to temperature variation. The notch depth can reach 60dB.  相似文献   

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