Dual-loop DLL-based clock synchroniser

A clock synchronisation scheme based on a newly proposed dual-loop delay locked loop (DLL) is presented. The proposed scheme incorporates analogue and digital DLLs to align phases of two different frequency clocks. Simulation results show that the internal clock can be synchronised to the reference clock by tracking the dual feedback loop. The whole circuit design was implemented using 0.35 μm CMOS technology. Power dissipation is ~42 mW with a single 3.3 V supply     

Baud sampling bit synchroniser for channels with data dependentnoise

A bit synchronisation algorithm for channels with data dependent noise which operates with one sample per symbol is presented. The algorithm uses the same information as the Mueller and Muller (M&M) algorithm, and is optimised for operation with data dependent noise. The performance is derived and it is shown that significant improvements over the M&M algorithm can be obtained in practical optical channels     

一种超混沌五阶自治电路的分析

在蔡式电路的L臂上增加一个RLC并联回路构造了一个超混沌五阶自治电路，对其进行数学建模和系统的理论分析，并结合数值仿真详细研究了其混沌动力学性态。通过对其相空间吸引子、庞卡莱映射、Lyapunov指数谱的分析表明，电路在参数值改变时，呈现出超混沌态、混沌态和周期态的振荡形式。最后对该电路从Hopf分叉变化到超混沌吸引子过程中的信号频谱进行了计算机模拟，估计其频谱分布范围并给出了电路的频谱分布特征。     

Performance of a differential coincidence-type self bit synchroniser at low s.n.r.

The behaviour of a differential coincidence-type self bit synchroniser at low s.n.r. has been examined for both uncorrelated and correlated input noise. It has been found that the performance of this synchroniser is comparable with that of a digital-data-transition tracking loop, and is better than that of an early-late-gate bit synchroniser.     

Analysis of a quasi-resonant circuit for soft-switched inverters

This paper presents an analysis of a quasi-resonant circuit for soft-switched inverters. The quasi-resonant circuit provides zero-voltage instants for zero-voltage inverter switching by pulling down the DC link voltage momentarily to zero without increasing the peak value of the nominal DC link voltage. Switches in the quasi-resonant circuit can also be turned off at zero current/voltage conditions. The proposed circuit allows creation of zero voltage conditions for inverter soft-switching under loaded and no-load conditions. The operating principle of this circuit is explained, and the analysis of each operating mode is described. Design criteria for achieving zero voltage switching are derived from the general mathematical analysis. Operation of the circuit has been verified by PSPICE simulation and experiments     

An 8-ns 1-Mbit ECL BiCMOS SRAM with double-latch ECL-to-CMOS-level converters

The design and performance of a high-speed 1 M*1-bit SRAM with ECL I/O are described. The 6.5*16.5-mm/sup 2/ chip was fabricated with a 0.8- mu m BiCMOS process technology. A modified double-word-line (MDWL) structure and a bit-line peripheral circuitry with normally-on bit-line equalization circuit are used to achieve high-speed read operation. The read speed is further enhanced by a novel ECL-to-CMOS-level converter with a double-latch configuration. The converter dissipates no DC current and contributes to low power consumption together with an automatic power-saving function, utilizing the address transition detection (ATD) technique. The access time is typically 8 ns, and the active power is 500 mW at 50 MHz.<>     

Asymptotic expression for the equivocation probability of the NDA FF carrier synchroniser

Equivocation in nonlinear feedforward carrier synchronisers considerably degrades the symbol error rate performance. A simple asymptotic (high E/sub s//N/sub 0/) expression for the equivocation probability is derived for two types of averaging filter and general nonlinearity. The expression is proven accurate in the E/sub s//N/sub 0/ region of practical interest. The results extend previous work.<>     

一个切换混沌系统的分析与电路实现

采用改变系统乘积项的方法,在已提出的混沌系统的基础上,构建了一个切换混沌系统。分析了平衡点的性质,混沌吸引子相图和Lyapunov指数等特性,设计了可实现切换混沌系统的电路并进行了电路实验,实现结果与仿真结果一致：     

静电放电模拟器电路建模分析

从实际的静电放电模拟器结构出发,根据接触放电时静电放电电流的主要特征,考虑到静电模拟器本身、连接线及回路电缆与地平面间产生的分布参数的影响,建立了一个新的静电放电模拟器等效电路模型,并用PSPICE软件对等效电路进行模拟分析,得到了与实测波形基本一致的电流波形.利用该模型讨论了各分布参数对放电电流的影响.结果表明:模拟器体电阻与地间的电感对电流波形影响不大,因此可以忽略,但其与地之间的分布电容对电流波形的低频段有重要影响;连接线分布参数对电流波形的第一峰值及波形光滑度都有影响;回路电缆分布参数主要影响了电流波形中第二个波峰峰值及其位置.     

10 Gbit/s low-power bit synchroniser with automatic retiming phase alignment

A 10 Gbit/s bit-synchroniser circuit has been fabricated using an enhancement/depletion 0.3 mu m recessed-gate AlGaAs/GaAs/AlGaAs quantum well FET process. The differential gain of the exclusive-or phase comparator circuit is measured to be 371 mV/rad. The phase margins for monotonous phase comparison are -54/+21 degrees relative to the 'in bit cell centre' position of the negative going clock edge. The chip has a power dissipation of 160 mW when using a supply voltage of 1.90 V.<>     

Analysis of a serial symbol timing recovery technique employingExclusive-OR circuit

An analysis is presented of the performance of a serial symbol timing recovery (STR) circuit which employs an Exclusive-OR circuit for conventional coherent digital modulated communication systems. The output of the timing circuit is a nearly sinusoidal wave whose zero crossings indicate the appropriate sampling instants for extraction of the data. Assuming that the data pulses entering the timing path are even symmetric, exact analytical expressions for the mean and mean-squared values of the timing wave and for the RMS phase jitter are derived as a function of various system parameters such as channel band limiting, postfiltering, delay element, and power spectral density of noise. Numerical results, also checked by computer simulations, show that considerable improvement can be obtained in jitter performance, in addition to the advantages over other STR techniques of lower cost and simpler hardware implementation     

含两个荷控忆阻器的五阶混沌电路研究

忆阻器作为一种具有记忆功能的新型非线性元件,被广泛应用于非线性电路系统设计中。利用两个基于荷控光滑模型的忆阻器以及采用常见的线性电子元件电感、电容、负电阻等设计了一种新的五阶混沌振荡电路。采用常规的系统动力学分析方法,分析了系统平衡点稳定性、相图、李雅普诺夫指数谱和分叉图,研究了系统随电路参数和荷控忆阻器初始状态变量变化的非线性动力学特性。Matlab数值仿真结果验证了理论分析的正确性。     

浅析电子电路维修

生活中充满了各种各样的电器设备.对电器设备中电路的维修与保养,可以延长设备使用寿命,保证使用者生命财产安全.传统的师徒相传方法已经不适应日益复杂的电路故障维修的需要,总结一套行之有效地方法与步骤是必须的.本文总结的方法适用于分立元件电路及不含可编程器件的集成电路的维修,对大部分电路故障现象能够进行分析与排除.总结的电路维修步骤对维修人员具备指导意义.     

一个具有负电容的三阶自治混沌电路分析

提出了一个具有负电容的三阶自治混沌电路，并进行了深入的理论研究和计算机仿真分析。得出了几点结论：(1)此混沌电路元器件少，具有一个负电容，且与蔡氏混沌电路结构中的元件数完全相等。(2)在确定的元器件参数条件下，电路出现与蔡氏混沌电路完全相同的双涡卷奇怪吸引子和丰富的混沌动力学行为。     

Parametric circuit as generalization of a usual oscillating circuit

Solutions of problems arising during composition of differential equations for a parametric circuit are discussed. A typical Lyapunov stability problem for a parametric circuit is considered.     

Analysis of vertical multijunction solar cells using a distributed circuit model

Vertical multijunction (VMJ) solar cells have generated considerable interest due to their improved performance in terms of conversion efficiency and radiation tolerance compared to the conventional planar solar cells. Fabrication of VMJ cells with junction density of 2000 junctions/cm is now possible using advanced fabrication technologies. This work describes an analysis of some of the VMJ cell structures now being fabricated—especially the ones that combine the enhanced red response and radiation tolerance of the VMJ concept and blue response of conventional planar cells. A distributed equivalent circuit model is used for analysis of complicated junction configurations—which otherwise would be very cumbersome using conventional carrier transport equations.

The VMJ cell structures were analyzed to study their device characteristics and their sensitivity to various material and fabrication parameters such as epitaxial layer resistivity and carrier lifetimes. The results show that the conversion efficiency is higher than conventional devices due to efficient carrier collection with a superior radiation tolerance. The cells, however, degrade more rapidly compared to planar cells at higher radiation levels determined by the structural parameters.     

整流电路换相剖析

为了研究变压器漏抗对整流电路的影响,本文在MATLAB环境下对三相半波可控整流电路进行了仿真结果表明,在换相过程中,整流变压器原副边的电压波形和电流的波形都会发生畸变。通过谐波分析可知,在整流变压器副边电流中出现了较高的2、4、5次谐波和直流分量,前者将会影响交流系统的电能质量,后者将会降低整流变压器的利用率。     

Analysis of a new multiband multiport circuit for phase detection applications

A new multiband multiport circuit is presented in this letter. This circuit, designed for microwave phase detection applications, can be used in multiband direct conversion front-ends, phased-array antenna drivers or other microwaves amplitude or phase measurements. A complex vector, named /spl Gamma/, based on multiport output voltages, is introduced for direct RF phase measurements. An excellent match of simulation and measurement results is obtained in all frequency bands.     

一个新的四维混沌系统性质分析与电路实现

提出了一个新的四维混沌系统,并对该系统的基本动力学特性进行了分析,得到该系统的Lyapunov指数和Lyapunov维数,为验证这个混沌系统还设计了一个模拟电子电路,观察到了混沌吸引子,与仿真结果相符。