Modeling PWM DC/DC converters out of basic converter units

An alternative approach to modeling pulsewidth-modulated (PWM) DC/DC converters out of basic converter units (BCUs) is presented in this paper. Typical PWM DC/DC converters include the well-known buck, boost, buck-boost, Cuk, Zeta, and Sepic. With proper reconfiguration, these converters can be represented in terms of either buck or boost converter and linear devices, thus, the buck and boost converters are named BCUs. The PWM converters are, consequently, categorized into buck and boost families. With this categorization, the small-signal models of these converters are readily derived in terms of h parameter (for buck family) and g parameter (for boost family). Using the proposed approach, not only can one find a general configuration for converters in a family, but one can yield the same small-signal models as those derived from the direct state-space averaging method. Additionally, modeling of quasi-resonant converters and multiresonant converters can be simplified when adopting the proposed approach     

A passive lossless snubber cell for nonisolated PWM DC/DCconverters

A passive lossless snubber cell is proposed to improve the turn-on and turnoff transients of the MOSFETs in nonisolated pulsewidth modulated (PWM) DC/DC converters. Switching losses and EMI noise are reduced by restricting di/dt of the reverse-recovery current and dv/dt of the drain-source voltage. The MOSFET operates at zero-voltage-switching (ZVS) turnoff and near zero-current-switching (ZCS) turn-on. The freewheeling diode is also commutated under ZVS. As an example, operation principles, theoretical analysis, relevant equations, and experimental results of a boost converter equipped with the proposed snubber cell are presented in detail. Efficiency of 96% has also been measured in the experimental results reported for a 1 kW 100 kHz prototype in the laboratory, Six basic nonisolated PWM DC/DC converters (buck, boost, buck-boost, Cuk, Sepic, and Zeta) equipped with the proposed general snubber cells are also shown in this paper     

A systematic approach to developing single-stage soft switching PWMconverters

A systematic approach to developing soft switching PWM converters based on the synchronous switch scheme is presented in this paper. With the approach, several families of passive and active soft switching PWM converters, such as buck-boost, Zeta, Cuk, and Sepic, can be generated from the two basic converters, buck and boost. Also, the approach is used to integrate multiple converters to form a single-stage soft switching PWM converter. It has been shown that analysis of the converters can be conveniently performed from the derived general configurations, reducing the complexity significantly. Therefore, employing the technique can not only explore more physical insights into the converters in a family but reveal more relationships among the soft switching converters over conventional approaches. Measured results from a prototype have verified the feasibility of the derived single-stage converters     

Switched-Capacitor/Switched-Inductor Structures for Getting Transformerless Hybrid DC–DC PWM Converters

A few simple switching structures, formed by either two capacitors and two-three diodes (C-switching), or two inductors and two-three diodes (L-switching) are proposed. These structures can be of two types: ldquostep-downrdquo and ldquostep-up.rdquo These blocks are inserted in classical converters: buck, boost, buck-boost, Cuk, Zeta, Sepic. The ldquostep-downrdquo C- or L-switching structures can be combined with the buck, buck-boost, Cuk, Zeta, Sepic converters in order to get a step-down function. When the active switch of the converter is on, the inductors in the L-switching blocks are charged in series or the capacitors in the C-switching blocks are discharged in parallel. When the active switch is off, the inductors in the L-switching blocks are discharged in parallel or the capacitors in the C-switching blocks are charged in series. The ldquostep-uprdquo C- or L-switching structures are combined with the boost, buck-boost, Cuk, Zeta, Sepic converters, to get a step-up function. The steady-state analysis of the new hybrid converters allows for determing their DC line-to-output voltage ratio. The gain formula shows that the hybrid converters are able to reduce/increase the line voltage more times than the original, classical converters. The proposed hybrid converters contain the same number of elements as the quadratic converters. Their performances (DC gain, voltage and current stresses on the active switch and diodes, currents through the inductors) are compared to those of the available quadratic converters. The superiority of the new, hybrid converters is mainly based on less energy in the magnetic field, leading to saving in the size and cost of the inductors, and less current stresses in the switching elements, leading to smaller conduction losses. Experimental results confirm the theoretical analysis.     

Optimal feed-forward compensation for PWM DC/DC converters with`linear' and `quadratic' conversion ratio

An analytical procedure to optimize the feedforward compensation for any PWM DC/DC power converters is described. Achieving zero DC audiosusceptibility was found to be possible for the buck, buck-boost, Cuk, and SEPIC cells; for the boost converter, however, only nonoptimal compensation is feasible. Rules for the design of PWM controllers and procedures for the evaluation of the hardware-introduced errors are discussed. A PWM controller implementing the optimal feedforward compensation for buck-boost, Cuk, and SEPIC cells is described and fully experimentally characterized     

Spectral characteristics of randomly switched PWM DC/DC convertersoperating in discontinuous conduction mode

This paper addresses a comparative study of the spectral characteristics of four random-switching schemes that apply to the basic pulsewidth-modulation (PWM) DC/DC converters operating in discontinuous conduction mode (DCM). They include randomized pulse position modulation, randomized pulsewidth modulation, and randomized carrier frequency modulation with fixed duty cycle and with fixed duty time, respectively. Mathematical models that characterize the input current and output voltage of the three basic PWM converters operating in DCM are derived. In particular, the effectiveness of spreading the dominant switching harmonics in the input current that normally exist in the standard PWM scheme and the introduction of low-frequency harmonics in the output voltage with respect to the randomness level are investigated. The validity of the models and analyses are confirmed experimentally by using a DC/DC buck converter     

A comparative investigation on the use of random modulation schemesfor DC/DC converters

A comparative investigation on the use of random modulation schemes for DC/DC power converters is presented. The modulation schemes under consideration include randomized pulse position modulation, randomized pulsewidth modulation (PWM) and randomized carrier-frequency modulation with fixed and variable duty cycle. The paper emphasizes the suitability and applicability of each scheme in DC/DC power converters. Issues addressed include the effectiveness of randomness level on spreading the dominating frequencies that normally exist in constant-frequency PWM schemes, and the low-frequency power spectral density (PSD) of each scheme. The validity of the analyses is confirmed experimentally by using a DC/DC buck converter operating in the continuous conduction mode. The PSD of the output under each scheme is presented and compared     

Modeling of single-stage converters with high power factor and fastregulation

This paper presents an approach to systematically model single-stage DC/DC converters operated in discontinuous conduction mode (DCM) based on the graft scheme. With the graft scheme, the active switches which are with a common node and operating in unison can be integrated to form a single stage converter (SSC). The small-signal models of the SSC can, therefore, be derived by combining those of its originally separate converters. Using the proposed approach can help yield highly related dynamic models of the converters in a family and, in addition, physical insights between the converters can be readily identified. Moreover, the expressions of the small-signal models for the SSCs operated in DCM can be extended to those in continuous-conduction-mode operation. These have made the proposed modeling method valuable and viable. Experimental measurements have demonstrated that the small-signal model of an SSC derived with the proposed approach is relatively accurate     

DC/DC变换器自适应模糊逻辑控制器设计

文章为DC/DC变换器设计了一种自适应模糊逻辑控制器（AFLC）。所提出的AFLC不需要专家系统提供决策参数和控制规则,而是使用模型数据文件来产生参数和规则,该模型数据文件包含输入输出对的整体概况。所提出的控制器使用8位微控制器来实现降压、升压和降压-升压变换器。     

Application of the current-injected modeling approach toquasi-resonant converters

This paper describes how the current-injected (CI) method, which has been applied only to pulse-width modulation (PWM) DC-DC power converters, can be extended to quasi-resonant (QR) power converters. The methodology for extending this small-signal modeling approach is described in detail. It is also shown that QR dynamic models are easy to obtain since they are derived directly from PWM power converter models. These new models result in a unified block diagram from which zero-voltage-switching (ZVS) or zero-current-switching (ZCS) transfer functions of the basic topologies, such as buck, boost, and buck-boost operated in half-wave (HW) or full-wave (FW) modes, are found. As an application of this method, a ZVS boost power converter and ZCS boost power converter were fabricated and tested. In addition, small-signal models of these power converters were derived with the help of the state-space averaging (SSA) method. The agreement of the CI method simulations with the experimental results for the two QR power converters is comparable or better than that of the SSA method     

用开关电容网络改善DC-DC变换器性能的研究

将串并电容组合结构,极性反转开关电容网络和推挽开关电容网络和ｂｕｃｋ,ｂｏｏｓｔ,Ｃｕｋ及ｂｕｃｋ－ｂｏｏｓｔ等传统ＤＣ－ＤＣ变换器相结合,构成一系列新的变换器拓扑结构。理论分析和实验结果秀助于提高具有悬殊电压变化比的ＤＣ－ＤＣ变换器的工作频率和动态响应,还能拓宽变换器的电压变换范围。     

A novel PWM control for a bi-directional full-bridge DC–DC converter with smooth conversion mode transitions

A novel CMOS integrated pulse-width modulation (PWM) control circuit allowing smooth transitions between conversion modes in full-bridge based bi-directional DC–DC converters operating at high switching frequencies is presented. The novel PWM control circuit is able to drive full-bridge based DC–DC converters performing step-down (i.e. buck) and step-up (i.e. boost) voltage conversion in both directions, thus allowing charging and discharging of the batteries in mobile systems. It provides smooth transitions between buck, buck-boost and boost modes. Additionally, the novel PWM control loop circuit uses a symmetrical triangular carrier, which overcomes the necessity of using an output phasing circuit previously required in PWM controllers based on sawtooth oscillators. The novel PWM control also enables to build bi-directional DC–DC converters operating at high switching frequencies (i.e. up to 10?MHz and above). Finally, the proposed PWM control circuit also allows the use of an average lossless inductor-current sensor for sensing the average load current even at very high switching frequencies. In this article, the proposed PWM control circuit is modelled and the integrated CMOS schematic is given. The corresponding theory is analysed and presented in detail. The circuit simulations realised in the Cadence Spectre software with a commercially available 0.18?µm mixed-signal CMOS technology from UMC are shown. The PWM control circuit was implemented in a monolithic integrated bi-directional CMOS DC–DC converter ASIC prototype. The fabricated prototype was tested experimentally and has shown performances in accordance with the theory.     

开关电容DC—DC变换器的效率

将开关电容网络应用到ＤＣ－ＤＣ变换器，并从能量的角度研究了其效率，得出一个对所有类型的开关电容变换器的适用的公式，提出了改善效率的新的拓扑结构，使升压与降压开关电容变换器有较高的效率，实验结果与计算机模拟均取得了与分析相同的结果。     

An ultra-low power CMOS DC–DC buck converter with double-chain digital PWM technique

In present-day integrated digital circuits are become attractive choice for the DC–DC buck converters. This paper proposes a novel approach of CMOS DC–DC buck converter with double-chain digital pulse width modulation (PWM) for ultra-low power applications. The proposed digital PWM architecture consists of double delay lines which is to reduce power consumption and improves ripple voltage with the resolution. An algorithm is proposed that describes the operation of digital PWM. The double chain digital PWM is implemented and analyzed in cadence platform using commercial 180 nm TSMC design kit. The promising results reveals that the power consumption is reduces up to 1.16 µW with occupies less area under the operating frequency of 100 kHz. The DC–DC buck converter with proposed PWM achieves peak efficiency of 92.6% including a load current range of 4–10 mA. This proposed digital PWM method demonstrates its ability to minimize the ripple voltage by 49% and enables to DC–DC converter for compose in a compact chip area as compared to conventional converters. Measured and Simulated power efficiency are made good agreement with each other.     

State-plane analysis of zero-current-switching resonant DC/DC powerconverters

The state-plane analysis for the buck, boost, buck/boost, and Cuk zero-current-switching resonant DC/DC power converters is presented. Simple visual criteria are introduced to determine whether the converter is operating in a mode producing voltage conversion. It is shown that the voltage conversion takes place within the converters if and only if both horizontal and vertical straight-line segments are present in the state-plane graph. The boundary of energy conversion is identified from the state plane by the evaporation of one or both straight-line segments. Formulas are found for the normalized switching frequency at this boundary that depend on the value of normalized switching voltage     

Single-inductor dual-output (SIDO) DC–DC converters for minimized cross regulation and high efficiency in soc supplying systems

A compact size and high efficiency single-inductor dual-output (SIDO) DC–DC converter is proposed. The proposed SIDO DC–DC converter not only provides dual output sources (one buck and one boost outputs) but also has minimized cross regulation without using any external compensation components. Generally speaking, it is important to minimize the number of components and footprint area in the design of SIDO converters. However, usually large external compensation resistors and capacitors are required to stabilize DC–DC converters. Importantly, our proposed hysteresis mode operation can effectively avoid the oscillation problems that may exist in many SIMO designs. Furthermore, the dynamic dc current level like that in the continuous conduction mode (CCM) operation can make the proposed SIDO DC–DC converter achieve high conversion efficiency at light loads owing to small conduction loss. Experimental results show a high efficiency from 85% at light loads to 94% at heavy loads.     

Soft switching active snubbers for DC/DC converters

A soft-switching active snubber is proposed to reduce the turn-off losses of the insulated gate bipolar transistor (IGBT) in a buck power converter. The soft-switching snubber provides zero-voltage switching for the IGBT, thereby reducing its high turn-off losses due to the current tailing. The proposed snubber uses an auxiliary switch to discharge the snubber capacitor. This auxiliary switch also operates at zero-voltage and zero-current switching. The size of the auxiliary switch compared to the main switch makes this snubber a good alternative to the conventional snubber or even to passive low-loss snubbers. The use of the soft-switching active snubber permits the IGBT to operate at high frequencies with an improved RBSOA. In the experimental results reported for a 1 kW, 40 kHz prototype, combined switching/snubbing losses are reduced by 36% through the use of the active snubber compared to a conventional RCD snubber. The use of an active snubber allows recovery of part of the energy stored in the snubber capacitor during turn-off. The generic snubber cell for the buck power converter is generalized to support the common nonisolated DC/DC power converters (buck, boost, buck-boost, Cuk, sepic, zeta) as well as isolated DC/DC power converters (forward, flyback, Cuk, and sepic)     

基于动态相量法的PWM DC/DC变换器的建模与分析方法

文章从动态相量的概念以及基本性质出发,推导了动态相量法应用于PWM DC/DC变换器建模与分析的数学方法。首先介绍了纹波的计算方法,引入了选择模式分析法对PWM DC/DC变换器动态相量模型进行简化,建立了小信号模型,并以PWM BUCK/BOOST双向DC/DC变换器为例,用MATLAB软件建立了PWM DC/DC变换器的动态相量模型,将之与时域仿真模型进行了比较,验证了该方法的有效性。     

Multifrequency averaging of DC/DC converters

This paper presents some of the issues involved in applying frequency-selective averaging to modeling the dynamic behavior of pulsewidth-modulated (PWM) DC-DC converters. We use the boost converter as an example to show the details involved in deriving some novel extended averaged models, and we use simulations to highlight the accuracy of the models even when traditional small-ripple conditions are not satisfied     

A simple large-signal nonlinear modeling approach for fastsimulation of zero-current-switch quasi-resonant converters

A nonlinear modeling approach for zero-current-switch (ZCS) quasi-resonant converters (QRC) is proposed which can be derived easily using simple analytical techniques. The converter model obtained is readily absorbed by MATLAB for analysis and design of both the open- and closed-loop configurations in fast speed. Simulations have shown its accuracy, even for large-signal transient responses. Applications of this modeling approach to the three basic topologies of buck, boost, and buck-boost converters are given as illustrative examples. The condition for zero-current switching is identified from the model. The feasibility of applying this proposed modeling approach to the extended period QRC topologies is to be discussed. Simulation results for the three basic topologies are given to show the merits of the proposed modeling approach