Dimension-control technique in the VAD process and wholly synthesised single-mode fibre preform

A preform dimension control technique in the VAD process has been developed using chemical dry etching with fluoride gas applied to silica glass particles in an oxyhydrogen flame. Wholly synthesised VAD single-mode fibre preforms have been fabricated using this technique with high adjustment accuracy of outer/core diameter ratio. These preforms have exhibited excellent structural characteristics.     

Materials and processes for preform fabrication—Modified chemical vapor deposition and plasma chemical vapor deposition

This paper summarizes recent achievements and current directions of process developments for making optical fibers by modified chemical vapor deposition and plasma deposition.     

Materials and processes for fiber preform fabrication—Vapor-phase axial deposition

The vapor-phase axial deposition (VAD) process was developed to realize continuous fabrication of high-silica fiber preforms. This process could be used to fabricate various kinds of optical fibers such as graded-index, single-mode, and high NA fibers. Transmission characteristics of these VAD fibers have improved to the level almost comparable to the best values attained by the MCVD process. The VAD process has excellent prospects as an economical means to produce long-length fibers with good transmission characteristics.     

Peripheral and diffused layer effects on doping profiles

The impurity profile of an epitaxial layer has been determined from the capacitance-voltage (C-V) characteristics of a diffused p-n junction. TheC-Vcharacteristics were corrected for peripheral and diffused layer effects. Peripheral capacitance corrections account for the lateral spread of the space-charge region, whose periphery is assumed to be cylindrical. Diffused layer corrections account for the penetration of the space-charge region into the diffused layer, assumed to be Gaussian. The importance of these corrections can be estimated from graphs that cover a wide range of practical diffusion conditions and junction diameters. The sensitivity of profiles to the assumed Gaussian diffusion are examined. Finally, the corrections are applied to an experimental junction and the results are presented from a computer printout. The Appendix includes graphs for determining the space-charge width of a Gaussian-diffused silicon junction, given the diffused layer sheet resistance, junction depth, and background concentration.     

Germanium surface and interfaces (Invited Paper)

Germanium surface and interfaces are modeled based on the requirement that surface charge neutrality is satisfied. It is found that Ge interfaces have remarkable electronic properties stemming from the fact that the energy gap is low and the CNL is located very low in the gap close to the valence band. Because of this, acceptor defects (probably dangling bonds) are easily filled building a negative charge at the interface which easily inverts the surface of n-type Ge at no gate bias and for low doping N_D and moderate to high interface state density D_it. This has important consequence in the electrical characteristics of Ge transistors. In p-channel FETs, an undesired positive threshold voltage V_T of +0.2 to +0.5 V is predicted depending on N_D, D_it and the equivalent oxide thickness. In n-channel FETs, inversion is inhibited and V_T could become higher than 1 V if the D_it is well in excess of 10¹³ eV^?1 cm^?2.     

Modeling study of the impact of surface roughness on silicon and Germanium UTB MOSFETs

We outlined a simple model to account for the surface roughness (SR)-induced enhanced threshold voltage (V/sub TH/) shifts that were recently observed in ultrathin-body MOSFETs fabricated on <100> Si surface. The phenomena of enhanced V/sub TH/ shifts can be modeled by accounting for the fluctuation of quantization energy in the ultrathin body (UTB) MOSFETs due to SR up to a second-order approximation. Our model is then used to examine the enhanced V/sub TH/ shift phenomena in other novel surface orientations for Si and Ge and its impact on gate workfunction design. We also performed a calculation of the SR-limited hole mobility (/spl mu//sub H,SR/) of p-MOSFETs with an ultrathin Si and Ge active layer thickness, T/sub Body/<10 nm. Calculation of the electronic band structures is done within the effective mass framework via the Luttinger Kohn Hamiltonian, and the mobility is calculated using an isotropic approximation for the relaxation time calculation, while retaining the full anisotropy of the valence subband structure. For both Si and Ge, the dependence of /spl mu//sub H,SR/ on the surface orientation, channel orientation, and T/sub Body/ are explored. It was found that a <110> surface yields the highest /spl mu//sub H,SR/. The increasing quantization mass m/sub z/ for <110> surface renders its /spl mu//sub H,SR/ less susceptible with the decrease of T/sub Body/. In contrast, <100> surface exhibits smallest /spl mu//sub H,SR/ due to its smallest m/sub z/. The SR parameters, i.e. autocorrelation length (L) and root-mean-square (/spl Delta//sub rms/) used in this paper is obtained from the available experimental result of Si<100> UTB MOSFETs, by adjusting these SR parameters to obtain a theoretical fit with experimental data on SR-limited mobility and V/sub TH/ shifts. This set of SR parameters is then employed for all orientations of both Si and Ge devices.     

Capacitance and doping profiles of ion-implanted,buried-channel MOSFETs

Detailed capacitance measurements are presented of large-area, ion-implanted, buried-channel MOSFETs. The gate capacitance was measured as a function of gate-substrate voltage with drain (source)-substrate voltage as parameter. The MOSFETs were prepared on 10 Ω-cm, n-type, 〈111〉 Si. Boron ions with doses of 4 × 10¹¹ and 8 × 10¹¹/cm² were implanted through the gate oxide to a depth of 0.30–0.35 μ m in the Si. The devices were subjected to heat treatments of 900–1100°C.Calculated capacitances based on a one-dimensional, partial-ionization model are in good agreement with experiment. The model is used to assess the validity of C–V profiling technique based on the abrupt space-charge approximation. It is concluded that the impurity distribution can be measured quite accurately near the peak of the profile, for ion-implantation and heat-treatment conditions examined in this paper. However, the “tails” of the distribution cannot be measured with this technique. The limitations of the C–V profiling method are discussed quantitatively for a stepped profile.     

Correlation between inversion layer mobility and surface roughnessmeasured by AFM

The correlation between inversion layer mobility of MOSFET's and surface micro-roughness of the channel has been studied using split CV measurements and AFM analysis. The mobility at high normal field decreases with increasing the surface roughness over a wide range of roughness from 0.3 nm to 4.3 nm (RMS). The trend is the same even for very thin gate oxides down to 3 nm. Careful AFM measurements are used to show that the gate oxide thickness doesn't affect the surface roughness, supporting the independence of mobility on the gate oxide thickness     

H2Se “memory effects” upon doping profiles in GaAs grown by metalorganic chemical vapor deposition (MO-CVD)

A chemical vapor deposition “memory effect” is the tendency of a source material to adsorb onto the internal walls of the system and subsequently desorb after nominal source shutoff. H₂Se, the most common Se transport agent in metalorganic chemical vapor deposition (MOCVD), adsorbs onto stainless steel and glass surfaces. Among the consequences are: graded doping profiles at the end of Se-containing epitaxial layers and the depletion of H2Se gas mixtures with time. By contrast, SiH₄, the most common Si transport agent, exhibits negligible memory effect and is recommended as an alternate n-dopant source when memory effects must be entirely eliminated. Capacitance-voltage measurements are used to quantify the extent of the t₂Se “memory effect” in GaAs to identify methods for its reduction or elimination, and to distinguish the effects of diffusion and memory upon observed doping profiles. Memory effects are also anticipated when Se is a primary constituent of a semiconductor and H₂Se the transport agent.     

A simulation study of gate line edge roughness effects on doping profiles of short-channel MOSFET devices

We study the effects of gate line edge roughness (LER) on doping profiles of MOSFET transistors using two-dimensional numerical calculation and advanced process simulation. Gate LER transfers the roughness to doping profiles self-aligned to gate edges such as source/drain (S/D) extensions. We found that the transferred roughness has a dominant contribution to the LER effects on device performance. Implantation scattering and diffusion are low-pass filters in the roughness transfer. Low frequency gate LER with 30 nm or larger correlation length (L/sub C/) causes rough S/D-channel junctions, which approximately follow the roughness of gate edges with slight reduction in the RMS roughness value under typical thermal budget. Implantation scattering and diffusion smooth off a major part of the high frequency junction roughness induced by gate LER with 5 nm or smaller L/sub C/. In addition, the average lateral diffusion length is enhanced when this high-frequency roughness is present.     

Monte Carlo study of Germanium n- and pMOSFETs

In this paper, we perform fullband Monte Carlo simulations of Ge bulk nand pMOSFETs and compare them with their Si counterparts. We consider transport in the presence of phonon, ionized impurity, surface roughness scattering, and impact ionization. Quantum confinement in the inversion layer is taken into account in the form of a modified potential. Germanium devices gave higher drive current when compared with Si devices for the device structures studied. Consistent with the arguments of Lundstrom, the performance enhancement of Ge MOSFETs lies between that which would be expected based on the higher mobility alone, and the much smaller advantage, if any, offered in the ballistic limit where transport is governed by thermal injection velocities from the source.     

Comments on "Peripheral and diffused layer effects on doping profiles"

A simple method is described for the characterization of uniformly doped epitaxial layers from the capacitance-voltage measurements of a diffused p-n junction, considering the peripheral effect due to the sidewall junction and the diffused layer effect due to the depletion region in the heavily doped side of the junction.     

Finite-element simulation of GaAs MESFET's with lateral doping profiles and submicron gates

Results of a two-dimensional finite-element simulation of a GaAs MESFET are presented. The simulation is used to determine the drain current and transconductance as well as the two-dimensional voltage, electron density, and electric-field distributions. It is shown that placement of a compensated doping region in the high electric-field region between gate and drain increases the drain current and transconductance by reducing the velocity-saturation effect. The transconductance and drain conductance of the MESFET in the saturation region of devices having different channel heights are compared with previous analysis.     

Design of GNRFET using different doping profiles near the source and drain contacts

The graphene nanoribbon field effect transistors (GNRFET) suffer from band-to-band tunnelling (BTBT), which in turn causes ambipolar conduction. In this simulation study, we propose a step–linear doping profile for the graphene nanoribbon near the source and drain contacts. This type of doping profile suppresses the BTBT and ambipolar conduction of the transistor. The proposed step–linear dopant distribution efficiently modulates the potential barrier at the source–channel interface, increases the width of the tunnelling region, and thus reduces the OFF-state current by decreasing the possibility of BTBT. A p_z orbital band model with the nearest neighbour is used to simulate the graphene nanoribbon. The Schrödinger equation is solved by non-equilibrium Green's function method to achieve the charge density. In order to calculate the electrostatic potential, the Poisson's equation is solved by means of the non-linear finite difference method. We have used the uncoupled mode space approach significantly to reduce the computational time. It is shown that the proposed doping profile improves the performance of graphene nanoribbon transistor by decreasing the OFF-state current and increasing the ON-state current. We have also observed a slight improvement in the subthreshold slope of the proposed GNRFET. The proposed GNRFET is more suitable than the conventional GNRFETs for switching applications.     

Simultaneous optical measurement of Germanium content and Boron doping in strained heteroepitaxial SiGe films using a novel data-analysis technique

We present here a novel technique, based on a proprietary approach for analyzing raw optical data, which is able to decouple the effects of Ge and B on the optical properties of a B-doped SiGe film and so measure the two material fractions, and the thickness, simultaneously and independently on a standard Opti-Probe^® film-thickness tool.Two sets of doped epitaxial SiGe layers were grown, each with a nominally fixed Ge-content but with the boron levels varying from zero to 1×10²⁰ cm⁻³. One set consisted of single-layer films on c-Si substrates, and the other consisted of similar films capped with undoped epi-Si layers.In each case, the Ge-fraction found was in good agreement with expectation (and, in the case of the undoped sample, with XRD), whilst the calculated “doping parameter” was found to follow a monotonic relationship with changes in Boron concentration.     

Correlation between chemical and electrical profiles in Si+, Se+ and S+ implanted bulk and epitaxial GaAs

We compare the chemical profiles of Cr, Mn, Si and Se with the electron concentration profiles in Si, Se and S implanted semi-insulating Cr-O doped bulk GaAs substrates and undoped VPE buffer layers annealed with and without a SiO₂ encapsulant in a H₂-As₄ atmosphere. A higher activation efficiency in the net electron concentration and the gateless saturated channel current is measured for SiO₂ encapsulated wafers annealed under arsine overpressure than for capless annealed ones using Cr-O doped bulk GaAs substrates. On the other hand, the net donor concentration peak is higher for implanted buffer epi layers capless annealed under arsine overpressure than for SiO₂ encapsulated ones. Secondary ion mass spectrometry (SIMS) studies of the Cr decoration of the implant damage indicate that the damage from the 100 keV Si implant anneals out at 840°C while a temperature of 900°C is required to anneal out the 260 keV Se implant damage. An explanation of these differences is provided using an impurity redistribution model and charge neutrality considerations. Excellent Hall electron mobilities at liquid nitrogen temperature of 5400–9200 cm²/V-sec are measured for Si-implanted buffer epi substrates.     

Comparison of doping profiles in capless annealed and dielectrically capped — Annealed ion implanted GaAs

Recent results of a capless method of annealing ion implanted GaAs are reported. The physical mechanism and effectiveness of the process are described and comparison of doping profiles from wafers annealed with a reactively sputtered Si₃N₄ dielectric encapsulation and with the capless process is given. Capless annealing is shown to consistently result in narrower profiles for various dopants and implant energies. The observed differences are shown to be consistent with enhanced diffusion in the dielectric capped samples, and the effective diffusion coefficients, which are of the order of 10^?15 cm²/s for Se, differ by as much as a factor of two.     

Base transport factor calculations for transistors with complementary error function and Gaussian base doping profiles

By taking account of the carrier mobility degradation at high impurity concentrations, the high-frequency base transport factor of an n-p-n germanium base transistor was computed numerically for different base doping levels. The doping profiles under consideration were Gaussian and complementary error functions. The base doping level adjacent to the emitter was optimized for minimum base transit time. The optimum values are 4×10¹⁷atom/ cm³for complementary error function profile and 2×10¹⁷atom/cm³for Gaussian profile. The effects of emitter barrier capacitance, base resistance, collector barrier capacitance, and the collector depletion layer on the overall frequency response of a junction transistor are also discussed.