FPGA-realization of a sensorless speed controller for PMSM drives using novel sliding mode observer

Microsystem Technologies - FPGA-realization of a rotor position estimation algorithm based on a novel sliding mode observer (SMO) for permanent magnet synchronous motor (PMSM) drives is adopted in...     

基于FPGA的数字三相锁相环的优化设计

数字三相锁相环中含有大量乘法运算和三角函数运算,占用大量的硬件逻辑资源。为此,提出一种数字三相锁相环的优化实现方案,利用乘法模块复用和CORDIC算法实现三角函数运算,并用VerilogHDL硬件描述语言对优化前后的算法进行了编码实现。仿真和实验结果表明,优化后的数字三相锁相环大大节省了FPGA的资源,并能快速、准确地锁定相位,具有良好的性能。     

Model predictive controller design and implementation on FPGA with application to motor servo system

In this paper, an integrated hardware and software design method is developed to implement an MPC algorithm on an FPGA chip. This makes it possible to achieve the long-desired goal of extending MPC algorithms to field control so as to deal with constraints effectively. To expedite the numerical procedure of solving quadratic programming (QP) in the MPC algorithm, a QP solver based on embedded chips is designed to exploit the flexibility and efficiency of FPGA chips. With a carefully devised software architecture, a universal platform is proposed to be facilely deployed to field control applications. To demonstrate the efficacy, a prototype system is built based on a Xilinx FPGA chip. It is then applied to a motor servo tracking control system and achieves satisfactory control performance.     

Cintia: a neuro-fuzzy real-time controller for low-power embeddedsystems

Cintia, a neuro-fuzzy real-time controller based on pulse stream computation techniques, is designed for applications in low-power embedded systems. The system mixes two approaches: neuro-fuzzy controllers and finite-state automata. We implement the former by means of a custom neural chip, the latter as sequential code on a traditional microcontroller. Cintia demonstrates the advantages of mixing the two approaches and the feasibility of embedded neuro-fuzzy control systems. A low-power, single-chip version is also under design     

基于FPGA的新型高性能永磁同步电机驱动系统设计

提出了一种基于FPGA的单芯片驱动控制方案。它采用硬件模块化的现代EDA设计方法,使用VHDL硬件描述语言,实现了永磁同步电机矢量控制系统的设计。     

A neuro-fuzzy controller for a stoker-fired boiler,based on behavior modeling

A key issue in an industrial stoker-fired boiler is the design of an efficient and robust controller for its combustion system, so that the boiler can provide a continuous supply of steam at the desired pressure conditions. However, it is difficult to achieve this objective by using a model-based approach because of the high nonlinearity and uncertainty of boiler systems. In addition, the control performance may also suffer as a result of strong load changes, large disturbances, large time lags, and so forth. This paper presents a behavior-modeling-based approach to the design of a neuro-fuzzy controller for the combustion control of a stoker-fired boiler. In this approach, boiler combustion processes with unknown structure are modeled by defining three dynamic behaviors. According to these behavior ‘templates’, their corresponding fuzzy-logic controllers can be optimized off-line. During boiler system operation, the appropriate fuzzy-logic controller is fired, based on an on-line assessment of its dynamic behavior. The application results obtained demonstrate the effectiveness and the robustness of the proposed controller.     

On some idea of a neuro-fuzzy controller

The paper presents a neuro-fuzzy technique for the design of controllers. This technique can effectively deal with two main types of knowledge which usually describe the control strategy for complex systems, that is, a qualitative, linguistic, fuzzy knowledge usually expressed in the form of linguistic rules, and a quantitative, nonfuzzy information in the form of measurements and other numerical data. The proposed technique combines artificial neural networks with fuzzy logic yielding a structure that can be called a neuro-fuzzy controller or, broadly speaking, a fuzzy neural network. The paper presents a general structure of a neuro-fuzzy controller and two essential phases of its design, that is, a learning phase and a functioning phase. In turn, a numerical example which illustrates how the proposed controller works is presented. Finally, the paper describes an application of a neuro-fuzzy control to inverter drive systems for electric vehicles. The results of simulation and experimental investigations carried out on the laboratory model of an inverter drive system are also provided.     

数字动态靶标控制器的设计与实现

介绍一种数字动态靶标控制器的设计方法。重点说明了该控制器的硬件组成、工作原理和软件算法。结果表明该设计实现了动态靶标的多种工作模式,扩展了动态靶标的应用范围,使其不仅可以用于设备检测,同时又可用于设备训练。     

Accurate two-degree-of-freedom discrete-time current controller design for PMSM using complex vectors

Properties of the current controller are essential for permanent magnet synchronous machine (PMSM) drives, but the conventional continuous-time current controller cannot fully decouple the cross-coupling terms when applied in the digital processor. Its performance is related closely to the rotational speed. To improve the performance of the current loop, the direct design method in the discrete-time domain is adopted using the accurate discrete-time complex vector model. An integrated accurate hold-equivalent discrete model for PMSM is derived considering the difference between the output of the voltage source inverter and the back electro-motive force. Then an accurate two-degree-of-freedom (2DOF) current controller with a third-order closed-loop transfer function is designed. The 2DOF controller has more freedom in pole placement, and two schemes with a different cancelled pole-zero pair are investigated. Analysis is conducted by the robust root locus method via the complex vector root locus and sensitivity functions, showing properties in disturbance rejection and sensitivity to parameter variation of two schemes. Both schemes have their own advantages. Finally, the dynamic performance and flexibility of the proposed current controller is verified on a 2.5-kW PMSM test bench.     

基于FPGA多轴差补控制器设计与实现

介绍了一种基于FPGA实现多轴联动插补控制器的设计方案.利用FPGA定制发送脉冲控制步进电机工作的电路,通过将多种互不重叠的基脉冲叠加,实现速度的连续可调.采用累加器的半加载、被积函数的左移规格化以及空间矢量速度的调速再分解等方式,使得插补运算速度更快,脉冲分配更均匀,定位更准确.该系统达到了新型分光测色平台[1]对步进电机高速高精度的控制要求.     

基于FPGA的VGA显示控制器的实现

VGA作为一种标准的显示接口得到广泛的应用。本论文依据VGA接口设计原理,采用VHDL语言以及Altera公司的Cyclone系列FPGA进行VGA显示控制器的设计,最后给出了Quartus Ⅱ的仿真结果。     

Design of a two-degree-of-freedom controller for motor drives

A two-degree-of-freedom controller for motor drives with a first-order model is proposed. The parameters of the controller are designed using a systematic procedure to match the prescribed motor drive specifications. Very good rotor speed dynamic responses of both the command tracking and load regulation characteristics can be achieved. A theoretic basis for the design procedure is derived in detail. Simulated and experimental results are given to demonstrate the effectiveness of the controller     

Tuning of a neuro-fuzzy controller by genetic algorithm

Due to their powerful optimization property, genetic algorithms (GAs) are currently being investigated for the development of adaptive or self-tuning fuzzy logic control systems. This paper presents a neuro-fuzzy logic controller (NFLC) where all of its parameters can be tuned simultaneously by GA. The structure of the controller is based on the radial basis function neural network (RBF) with Gaussian membership functions. The NFLC tuned by GA can somewhat eliminate laborious design steps such as manual tuning of the membership functions and selection of the fuzzy rules. The GA implementation incorporates dynamic crossover and mutation probabilistic rates for faster convergence. A flexible position coding strategy of the NFLC parameters is also implemented to obtain near optimal solutions. The performance of the proposed controller is compared with a conventional fuzzy controller and a PID controller tuned by GA. Simulation results show that the proposed controller offers encouraging advantages and has better performance.     

A fast adaptive memetic algorithm for online and offline control design of PMSM drives.

A fast adaptive memetic algorithm (FAMA) is proposed which is used to design the optimal control system for a permanent-magnet synchronous motor. The FAMA is a memetic algorithm with a dynamic parameter setting and two local searchers adaptively launched, either one by one or simultaneously, according to the necessities of the evolution. The FAMA has been tested for both offline and online optimization. The former is based on a simulation of the whole system--control system and plant--using a model obtained through identification tests. The online optimization is model free because each fitness evaluation consists of an experimental test on the real motor drive. The proposed algorithm has been compared with other optimization approaches, and a matching analysis has been carried out offline and online. Excellent results are obtained in terms of optimality, convergence, and algorithmic efficiency. Moreover, the FAMA has given very robust results in the presence of noise in the experimental system.     

B超中数字扫描变换器的FPGA设计与实现

数字扫描变换器(DSC)是医用B超的重要部件,有坐标变换和插值两个关键点.根据实际项目的需求,在分析DSC原理的基础上,确立了以双线性插值和CORDIC算法完成坐标变换的设计思想,并给出其在FPGA中的实现和硬件仿真.结果表明,其运行速度快,结构简单,满足应用需求.     

基于自抗扰控制器的PMSM矢量控制系统设计与实现

针对永磁同步电机存在的非线性、强耦合、参数摄动等问题,设计并实现了基于自抗扰控制器(ADRC)的矢量控制系统.首先提出基于ADRC的控制策略,实时观测出由系统内部非线性因素以及外部扰动引起的“内外扰动”并进行补偿,从而实现精确控制;其次研制基于DSP的多轴运动控制卡,并在此基础上实现了基于ADRC的PMSM矢量控制系统...     

基于FPGA的LCD&VGA控制器设计

介绍了基于FPGA的图形式LCD&VGA控制器的设计,详细讨论了用VHDL设计行场扫描时序的方法,这种设计方法稍作改动便可产生任意行场扫描时序,具有很好的可重用性。该控制器已成功地在某型飞机座舱图形显示系统中使用。     

万兆以太网MAC层控制器的FPGA设计与实现

根据IEEE802.3-2005和IEEE802.3ae标准,在Xilinx公司的Virtex6系列XC6VHX255T器件上设计实现了万兆以太网MAC层控制器。与千兆以太网相比,万兆以太网使用更宽的数据位宽和更高的时钟频率,这使得其MAC层控制器的设计和实现都面临新的挑战。在解决了数据并行处理、不定长字节CRC编码/校验及与千兆以太网兼容等问题的基础上,设计实现了万兆以太网MAC层控制器。经布局布线后仿真验证,说明该设计可满足万兆以太网实际应用的要求。     

VGA汉字显示的FPGA设计与实现

VGA是显示器接口的一种工业标准.以往大多采用通用处理器控制VGA接口来实现汉字及其它信息的显示,但是以通用处理器为核心的体系结构不易修改,体积偏大,不适合小型便携式设备的设计.由于FPGA具有可重构、体积小等优势,采用FPGA来控制VGA的汉字显示.依据VGA的显示原理,提出了一种基于Xilinx Spartan-3的彩条信号显示方法,并利用FPGA内部的块RAM,实现了VGA的汉字显示.实验结果表明,由FPGA来控制汉字的显示,达到了预期的效果,克服了通用处理器的弊端.     

面向逻辑设计的SDRAM 控制器性能度量模型*

以SDRAM控制器为研究对象,探讨硬件逻辑设计时其性能度量的方法,通过建立一个硬件时钟周期级上的SDRAM控制器性能度量模型,在硬件逻辑实现的层次上实现了SDRAM控制器性能的评估。根据该性能度量模型,既可以分析已有设计的性能,又可以启发SDRAM控制器的优化方案。在双向有线数字电视信道SoC系统平台上应用该度量模型对三个AMBA总线接口的SDRAM控制器实现方案的性能进行分析,从而验证该性能度量模型适用于评估和指导SDRAM控制器的设计。该实验方法还可以用来评价各个不同IP核提供商提供的SDRAM控制