Tunnel field-effect transistors with graphene channels

The lack of an OFF-state has been the main obstacle to the application of graphene-based transistors in digital circuits. Recently vertical graphene tunnel field-effect transistors with a low OFF-state current have been reported; however, they exhibited a relatively weak effect of gate voltage on channel conductivity. We propose a novel lateral tunnel graphene transistor with the channel conductivity effectively controlled by the gate voltage and the subthreshold slope approaching the thermionic limit. The proposed transistor has a semiconductor (dielectric) tunnel gap in the channel operated by gate and exhibits both high ON-state current inherent to graphene channels and low OFF-state current inherent to semiconductor channels.     

GaAs field-effect transistors with ion-implanted channels

Schottky-barrier-gate n channel depletion-mode field-effect transistors have been fabricated in GaAs by the use of sulphurion implantation directly into semi-insulating Cr-doped substrates to produce the channel. This technique eliminates the need for the growth of a thin epitaxial layer, as is usually done, and results in better uniformity of device characteristics over the wafer area. Performance of these devices at 1 to 12 GHz is described, and low-frequency characteristics are given.     

Characterization of ohmic contacts in polymer organic field-effect transistors

It is well known that contact resistance R_c limits the performance of organic field-effect transistors (OFETs) that have high field-effect mobilities (μ_FET ≳ 0.3 cm² V⁻¹ s⁻¹) and short channel lengths (L_ch ≲ 30 μm). The usual transfer-line method (TLM) to analyze R_c calls for extrapolation of total resistance to zero L_ch at constant drain and gate voltages. This requires an unrealistic assumption that R_c does not vary with source−drain current I_sd (nor with channel carrier density σ). Here we describe a self-consistent TLM analysis that instead imposes the condition of constant I_sd and σ. The results explicitly reveal the dependence of R_c on I_sd and σ. We further describe how this R_c(I_sd, σ) surface can be modelled to yield the specific contact resistivity ρ_c of the metal/organic semiconductor (OSC) interface, a key parameter that has so far been neglected in OFETs. We illustrate the application of these analyses to high-performance staggered top-gate bottom-contact poly(2,5-bis(alkyl)-1,4-dioxopyrrolo [3,4-c]pyrrole-3,6-diyl-terthiophene-2,5″-diyl) (DPPT2-T) OFETs fabricated on bottom Au source–drain electrode arrays, with high contact-corrected μ_FET of 0.5 cm² V⁻¹ s⁻¹. We show that when these electrodes are modified to impose weak, and then strong hole-doping of the DPPT2-T interface, R_c diminishes and its dispersion, i.e. dependence on I_sd and σ, weakens. The ultimate ρ_c attained for the strongly hole-doped contact is ca. 1 Ω cm², broadly independent of I_sd and σ, which we propose is a hallmark of a true metal/OSC ohmic contact. For comparison, the bare Au/DPPT2-T contact gives ρ_c of the order of 10 Ω cm² with a marked σ dependence. The lowest ρ_c reached here shortens the current transfer length down to ca. 5 μm, enabling short electrode lengths to be advantageously employed in technology.     

Four-terminal field-effect transistors

A derivation is presented for the transconductances of a four-terminal transistor of arbitrary channel doping profile. The derivation takes into account finite barrier potential and is specifically applied to the symmetrical, abrupt-junction, four-terminal, field-effect transistor. Curves are presented showing variations of normalized transconductance with applied gate-source EMF.     

Spray-coated contacts from an organic charge transfer complex solution for organic field-effect transistors

We demonstrate the deposition of films of the conducting charge transfer complex TTF-TCNQ from solution by spray-coating. The benefit of spray-coating is the ability to process large volumes of solution, therefore allowing the utilisation of compounds with very low solubility. The sheet resistance in the TTF-TCNQ film is similar to that of the commonly used organic PEDOT:PSS electrodes, with the added benefit of room temperature deposition and no additional thermal treatments. Spray-coated TTF-TCNQ is used as source and drain electrodes for transistors based on the organic semiconductor C8-BTBT, achieving similar performances in terms of mobility and turn-on voltage than when conventional contacts of MoO_x/Au are used, whilst exhibiting a slight improvement in the linearity of the output characteristics.     

Medium-power GaAs field-effect transistors

Results on medium-power GaAs m.e.s.f.e.t.s. are described. Output powers as high as 300 mW at 9 GHz at 1 dB gain compression with a linear gain of 5.2 dB and drain efficiency of 30% have been obtained with single-cell m.e.s.f.e.t.s. At 4 GHz, a power output of 665 mW at 1 dB gain compression, a linear gain of 8 dB and a drain efficiency of 44.5% were realised with a 3-cell m.e.s.f.e.t. Two-tone intermodulation characteristics at 4 GHz are also described. A major innovation has been the use of a high-resistivity chromium-doped epitaxial GaAs buffer layer to isolate the device active region from the bulk-grown substrate.     

Amorphous-silicon silicon-nitride field-effect transistors

n-channel and p-channel amorphous-silicon field-effect transistors have been fabricated on a glassy substrate using undoped and impurity-doped a-Si films as the semiconductor and silicon nitride deposited from an SiH4-N2 mixture as the gate insulator. A change in the source-drain conductance of greater than four orders of magnitude is realised by changing the gate potential from 0 to 5 V.     

InP Schottky-gate field-effect transistors

MESFET's with gates 1 µm long were fabricated in LPE layers of InP on Cr-doped InP substrates. The quality of the LPE material is characterized by an electron concentration of 4 × 10¹⁵cm^-3with a mobility of 2.6 × 10⁴cm²V^-1s^-1at 77 K for growths from undoped melts. The devices have current gain cutoff frequencies of 20 GHZ or somewhat larger. This value is greater than that of the best analogous GaAs MESFET bya factor of 1.5. A factor of 1.3 is predicted on the basis of a simple theory. The highest power gain cutoff frequency, fmax, for the InP device is 33 GHz which is somewhat smaller than that of the best analogous GaAs device. The lowest minimum noise figure at 10 GHz for these first InP devices is 3.9 dB with an associated gain of 4.8 dB. The best result for the GaAs counterpart is 3.2 dB with an associated gain of 7.8 dB. The power gain of the InP device suffers compared to the GaAs device because of degenerative feedback resulting from a large gate-to-drain capacitance and because of a small output resistance. If the magnitudes of these two equivalent circuit elements were the same for MESFET's in the two materials, fmaxfor the InP device would be more than double its present value.     

Nonplanar power field-effect transistors

This paper reviews the criteria involved in the design of silicon power field-effect transistors. Particular emphasis is placed on recent nonplanar structures which will, in the near future, present a serious challenge to bipolar power transistors as linear amplifiers and high-speed switches.     

Ultrathin CdSe nanowire field-effect transistors

We report the fabrication, and electrical and optical characterization, of solution-liquid-solid (SLS) grown CdSe nanowire field-effect transistors. Ultrathin nanowires (7–12 nm diameters) with lengths between 1 μm and 10 μm were grown by the SLS technique. Al-CdSe-Al junctions are then defined over oxidized Si substrate using photolithography. The nanowires, which were very resistive in the dark, showed pronounced photoconductivity even with a visible light source with resistance decreasing by a factor of 2–100 for different devices. Field-effect devices fabricated by a global backgating technique showed threshold voltages between −7.5 V and −2.5 V and on-to-off channel current ratios between 10³ and 10⁶ at room temperature. Channel current modulation with gate voltage is observed with the current turning off for negative gate bias, suggesting unintentional n-type doping. Further, optical illumination resulted in the loss of gate control over the channel current of the field-effect transistor.     

Gallium arsenide traveling-wave field-effect transistors

The design, modeling, and fabrication of a GaAs traveling-wave field-effect transistor (TWF) is reported. The TWF described is a device with a single continuous 1-µm-long gate and a total width of 3 mm which shows flat band gain from 1 to 10 GHz with the potential of much wider band performance (1-40 GHz) and high gains. An advanced theoretical model is presented which performs a full coupled transmission line modal analysis for three lines (source gate and drain) using ab.initio calculations of interelectrode capacitance and inductance matrices. Good agreement is demonstrated between theory and experiment for frequency gain response measurements using balanced feed circuits.     

Novel microwave GaAs field-effect transistors

A technology is described for the fabrication of Schottky-barrier f.e.t.s with electrodes on either or both sides of a submicrometre thick single-crystal layer of GaAs. Preliminary d.c. and microwave results are given together with possible advantages of these novel f.e.t. structures.     

Indium phosphide accumulation-mode field-effect transistors

Enhancement-type insulated gate field-effect transistors made of semi-insulating InP depend on the surface accumulation of electrons induced by a positive gate voltage and an equilibrium surface potential whose sign and magnitude are considered to be functions of the difference between charged surface donor and occupied acceptor states.     

Applications of resonant-tunneling field-effect transistors

Flip-flop and frequency-doubling operations are demonstrated, using a simple circuit that combines a resistor with a three-terminal negative-resistance device. The device is a series integration of resonant-tunneling heterostructure with a field-effect transistors. Results, obtained at 77 K, are presented for two samples that were grown by metalorganic chemical vapor deposition     

Proposed vertical-type amorphous-silicon field-effect transistors

Novel amorphous-silicon field-effect transistors (a-Si FET's) with a vertical channel have been proposed and demonstrated for the first time. The channel length of the new FET's is not limited by the photoetching process and thus can be reduced a great deal. Prototype FET's with a channel length of 1 µm had an on-off current ratio of more than 10⁴and the on-resistance was proportional to the channel length, so far as it was longer than 1 µm.     

High-speed gallium-arsenide Schottky-barrier field-effect transistors

The letter shows that gallium arsenide is a well suited material for high-frequency field-effect transistors. From preliminary measurements on realised transistors, it is shown that the frequency limit for power amplification is considerably higher than for other known transistors. The processes involved are briefly described.     

High-quality schottky and ohmic contacts in planar 4H-SiC metal semiconductor field-effect transistors and device performance

We have fabricated planar 4H-SiC, metal-semiconductor field-effect transistors (MESFETs) with high-quality metal/SiC contacts. To eliminate potential damage to the gate region caused by etching and simplify the device fabrication process, gate Schottky contacts were formed without any recess gate etching, and an ideality factor of 1.03 was obtained for these gate contacts. The interface state density between the contact metal and SiC was 5.7×10¹² cm⁻²eV⁻¹, which was found from the relationship between the barrier height and the metal work function. These results indicate that the interface was well controlled. Thus, a transconductance of 30 mS/mm was achieved with a 3-μm gate length as the performance figure of these MESFETs with high-quality metal/SiC contacts. Also, a low ohmic contact resistance of 1.2×10⁻⁶ Θcm² was obtained for the source and drain ohmic contacts by using ion implantation.     

Low-resistance contacts of electroless-plated metals with high-mobility organic semiconductors: Novel organic field-effect transistors with solution-processed electrodes

The establishment of a reliable vacuum-free method for the formation of electrical contacts on high-performance organic semiconductors has become an urgent task due to rapid progress made in the development of solution-processable high-mobility organic field-effect transistors (OFETs). We have recently proposed that electroless plating, a standard technology to mass produce wirings in currently commercialized electronic devices, is suited for high-performance solution-crystallized OFETs. A low contact resistance at the source and drain electrodes is necessary with organic semiconductors for high-speed device operation; therefore, we have evaluated the contact resistance using the transfer line method. A top-contact geometry with sufficient contact area is employed to achieve stable carrier injection, which has enabled contact resistances as low as 1.4 kΩ cm on a polyethylene naphthalate substrate at a gate voltage of −10 V. This marks outstanding performance among the solution-processed metal electrodes reported for OFETs, particularly on plastic substrates. The result indicates that high-quality boundaries with minimized trap densities are realized due to the mild conditions of the electroless plating process at room temperature.     

Square-law circuit using junction field-effect transistors

A simple square-law circuit which requires no DC power supply is proposed and experimentally demonstrated. The circuit uses a matched pair of symmetrical junction field-effect transistors, and is compatible with current integrated-circuit technologies