A Single Supply, High Linearity 2-W PA MMIC for WLAN Applications Using Quasi-Enhancement Mode PHEMTs

A fully matched, 2-W high linearity amplifier monolithic microwave integrated circuit, by using quasi-enhancement mode technology of AlGaAs/InGaAs/ GaAs pseudomorphic high electron mobility transistors, is demonstrated for wireless local area network applications. At Vgs= 0 V, V_ds= 5 V, this power amplifier has achieved 14-dB small-signal gain, 33-dBm output power at 1-dB gain compression point, and 34.5-dBm saturated output power with 35% power added efficiency at 5.8 GHz. Moreover, high-linearity with 45.2-dBm third-order intercept point is also achieved     

（英）D波段InP基高增益、低噪声放大芯片的设计与实现

利用90-nm InAlAs/InGaAs/InP HEMT工艺设计实现了两款D波段（110~170 GHz）单片微波集成电路放大器。两款放大器均采用共源结构,布线选取微带线。基于器件A设计的三级放大器A在片测试结果表明：最大小信号增益为11.2 dB@140 GHz,3 dB带宽为16 GHz,芯片面积2.6×1.2 mm2。基于器件B设计的两级放大器B在片测试结果表明：最大小信号增益为15.8 dB@139 GHz,3dB带宽12 GHz,在130~150 GHz频带范围内增益大于10 dB,芯片面积1.7×0.8 mm2,带内最小噪声为4.4 dB、相关增益15 dB@141 GHz,平均噪声系数约为5.2 dB。放大器B具有高的单级增益、相对高的增益面积比以及较好的噪声系数。该放大器芯片的设计实现对于构建D波段接收前端具有借鉴意义。     

InAlAs/InGaAs/InP基PHEMTs小信号建模及低噪声应用

利用改进的小信号模型对采用100nmInAlAs/InGaAs/InP工艺设计实现的PHEMTs器件进行建模, 并设计实现了一款W波段单片低噪声放大器进行信号模型的验证。为了进一步改善信号模型低频S参数拟合差的精度, 该小信号模型考虑了栅源和栅漏二极管微分电阻, 在等效电路拓扑中分别用Rfs和Rfd表示.为了验证模型的可行性, 基于该信号模型研制了W波段低噪声放大器单片.在片测试结果表明:最大小信号增益为14.4dB@92.5GHz, 3dB带宽为25GHz@85-110GHz.而且, 该放大器也表现出了良好的噪声特性, 在88GHz处噪声系数为4.1dB, 相关增益为13.8dB.与同频段其他芯片相比, 该放大器单片具有宽3dB带宽和高的单级增益.     

基于GaAs PHEMT工艺的60~90GHz功率放大器MMIC

研制了一款60~90 GHz功率放大器单片微波集成电路(MMIC),该MMIC采用平衡式放大结构,在较宽的频带内获得了平坦的增益、较高的输出功率及良好的输入输出驻波比(VSWR)。采用GaAs赝配高电子迁移率晶体管(PHEMT)标准工艺进行了流片,在片测试结果表明,在栅极电压为-0.3 V、漏极电压为+3 V、频率为60~90 GHz时,功率放大器MMIC的小信号增益大于13 dB,在71~76 GHz和81~86 GHz典型应用频段,功率放大器的小信号增益均大于15 dB。载体测试结果表明,栅极电压为-0.3 V、漏极电压为+3 V、频率为60~90 GHz时,该功率放大器MMIC饱和输出功率大于17.5 dBm,在71~76 GHz和81~86 GHz典型应用频段,其饱和输出功率可达到20 dBm。该功率放大器MMIC尺寸为5.25 mm×2.10 mm。     

Narrowband amplifier with excellent power combining efficiency

Based on a coaxial waveguide power-dividing/combining circuit, a four-device solid-state power amplifier with excellent power combining efficiency is presented. The fabricated power amplifier combining four monolithic microwave integrated circuit power amplifiers shows a 13-16.65 dB small-signal gain over a wide bandwidth of 7-13.5 GHz. The measured maximum output power at 1 dB compression is 25.4 dBm at 11 GHz, with a power-combining efficiency of 91%.     

220-GHz metamorphic HEMT amplifier MMICs for high-resolution imaging applications

In this paper, the development of 220-GHz low-noise amplifier (LNA) MMICs for use in high-resolution active and passive millimeter-wave imaging systems is presented. The amplifier circuits have been realized using a well-proven 0.1-/spl mu/m gate length and an advanced 0.05-/spl mu/m gate length InAlAs/InGaAs based depletion-type metamorphic high electron mobility transistor technology. Furthermore, coplanar circuit topology in combination with cascode transistors was applied, leading to a compact chip size and an excellent gain performance at high millimeter-wave frequencies. A realized single-stage 0.05-/spl mu/m cascode LNA exhibited a small-signal gain of 10 dB at 222 GHz, while a 0.1-/spl mu/m four-stage amplifier circuit achieved a linear gain of 20 dB at the frequency of operation and more than 10 dB over the bandwidth from 180 to 225 GHz.     

220GHz低噪声放大器研究

基于IHP锗硅BiCMOS工艺,研究和实现了两种220 GHz低噪声放大器电路,并将其应用于220 GHz太赫兹无线高速通信收发机电路。一种是220 GHz四级单端共基极低噪声放大电路,每级电路采用了共基极（Common Base, CB）电路结构,利用传输线和金属-绝缘体-金属(Metal-Insulator-Metal, MIM)电容等无源电路元器件构成输入、输出和级间匹配网络。该低噪放电源的电压为1.8 V,功耗为25 mW,在220 GHz频点处实现了16 dB的增益,3 dB带宽达到了27 GHz。另一种是220 GHz四级共射共基差分低噪声放大电路,每级都采用共射共基的电路结构,放大器利用微带传输线和MIM电容构成每级的负载、Marchand-Balun、输入、输出和级间匹配网络等。该低噪放电源的电压为3 V,功耗为234 mW,在224 GHz频点实现了22 dB的增益,3 dB带宽超过6 GHz。这两个低噪声放大器可应用于220 GHz太赫兹无线高速通信收发机电路。     

A 9.1–10.7 GHz 10-W, 40-dB Gain Four-Stage PHEMT MMIC Power Amplifier

This letter presents a compact X-band high gain and high power four-stage AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistor (PHEMT) monolithic microwave integrated circuit (MMIC) high power amplifier (PA). This amplifier is designed to fully match a 50-Omega input and output impedance. Based on 0.35-mum gate-length power PHEMT technology, this PA MMIC is fabricated on a 3-mil thick wafer. While operating under 8 V and 2700-mA dc bias condition, the characteristics of 40-dB small-signal gain, a 10-W continuous-wave saturation output power, and 33% power added efficiency at 9.7GHz can be achieved     

A 4 W K-band GaAs MMIC power amplifier with 22 dB gain

A 4 W K-band AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistor (PHEMT) mono-lithic microwave integrated circuit (MMIC) high power amplifier (PA) is reported. This amplifier is designed to fully match for a 50 Ω input and output impedance based on the 0.15 μm power PHEMT process. Under the condition of 5.6 V and 2.6 A DC bias, the amplifier has achieved a 22 dB small-signal gain, better than a 13 dB input return loss,and 36 dBm saturation power with 25% PAE from 19 to 22 GHz.     

5~6GHz自适应线性化偏置的InGaP/GaAs HBT功率放大器

针对高质量无线局域网的传输需求,设计了一款工作在5~6 GHz的宽带磷化镓铟/砷化镓异质结双极型晶体管(InGaP/GaAs HBT)功率放大器芯片。针对HBT晶体管自热效应产生的非线性和电流不稳定现象,采用自适应线性化偏置技术,有效地解决了上述问题。针对射频系统的功耗问题,设计了改进的射频功率检测电路,以实现射频系统的自动增益控制,降低功耗。通过InGaP/GaAs HBT单片微波集成电路(MMIC)技术实现该功率放大器芯片。仿真结果表明,功放芯片的小信号增益达到32 dB;1 dB压缩点功率为28.5 dBm@5.5 GHz,功率附加效率PAE超过32%@5.5 GHz;输出功率为20 dBm时,IMD3低于-32 dBc。     

Noise model of InP-InGaAs SHBTs for RF circuit design

A scalable small-signal and noise model of InP-InGaAs single heterojunction bipolar transistors was developed. Effects which become important at higher frequencies such as the correlation between base and collector current noise and frequency-dependent base current noise are taken into account. We will show that these effects are significant at frequencies higher than 40 GHz and can no longer be neglected. Our model also includes the effects of the different emission coefficients of the base and collector currents. Using this improved model, a direct-coupled, lumped broad-band amplifier was designed. We completely characterized the fabricated circuit with respect to small-signal, noise, and linearity behavior. A -3-dB bandwidth of 50 GHz with a dc gain of 9.8 dB and a gain-peaking of only 1.2 dB were achieved. All these values agree very well with the simulation results. The noise figure is 7.5 dB over a large frequency range. In the frequency range from 2 to 50 GHz, the third-order intercept point IP₃ and 1-dB compression point at the output have values from 17 to 10 dBm and 3 to 0 dBm, respectively     

The design, fabrication, and characterization of a novel electrode structure self-aligned HBT with a cutoff frequency of 45 GHz

This paper establishes a systematic approach for the design, fabrication, and modeling of a newly proposed self, aligned Al-GaAs/GaAs heterojunction bipolar transistor (HBT) employing a two-dimensional heterostructure device simulator and a heterojunction bi-polar transistor circuit simulator. The developed HBT has an abrupt emitter-base heterojunction, and applies a novel structure in which a single base electrode is placed between two emitter electrodes. A fabricated 3 × 8 µm²two-emitter HBT exhibits a measured current gain cutoff frequency fT= 45 GHz and a maximum oscillation frequency fmax= 18.5 GHz. Results of frequency divider circuit Simulation indicate that the developed HBT would be 1.4 times faster than a conventional HBT in which one emitter electrode is located between two base electrodes.     

A fully matched high linearity 2-W PHEMT MMIC power amplifier for 3.5 GHz applications

A 2-W monolithic microwave integrated circuit power amplifier, operating between 3.3 and 3.8GHz by implementing AlGaAs/InGaAs/GaAs pseudomorphic high electronic mobility transistor for the applications of wideband code division multiple access, wireless local loop, and multichannel multipoint distribution service, is demonstrated. This two-stage amplifier is designed to fully match 50/spl Omega/ input and output impedances. With a dual-bias configuration, the amplifier possesses the characteristics of 30.4dB small-signal gain and 34dBm 1-dB gain compression power with 37.1% power added efficiency. Moreover, with a single carrier output power level of 24dBm, high linearity with a 43.5-dBm third-order intercept point operating at 3.5GHz is also achieved.     

Millileter-Wave Power-Combining Amplifier Using A Broadband Waveguide Combiner

A Millimeter-wave power-combining amplifier based on the multi-way rectangular-waveguide power-dividing/combining circuit has been presented and investigated. The equivalent-circuit approach has been used to analyze the passive power-dividing/combining circuits. An eight-device amplifier is designed and measured to validate the power-dividing/combining mechanism using this technique. Both the measured 10-dB return loss bandwidth and the 2-dB insertion loss bandwidth of the passive system are more than 10?GHz. The measured maximum small-signal gain of the millimeter-wave eight-device power amplifier is 22.5?dB at 26.8?GHz with a 3-dB bandwidth of more than 6?GHz, while the input and output return loss of the proposed eight-device power amplifier is around ?10?dB from 26?GHz to 36?GHz. The measured maximum output power at 1-dB compression from the power amplifier is 28 dBm at 29.5?GHz.     

High-power GaAs FET's prepared by ion implantation

High-power GaAs FET's have been developed by using ion implantation to form channel layers and n⁺ohmic contact regions. The burn-out characteristics have been improved by introducing n⁺regions with high surface carrier concentration. The source-drain burnout voltage has been found to be more than 40 V. The distributions of saturated source-drain current (Idss) and RF output power of the devices have been found much more uniform than those of power GaAs FET's prepared by metalorganic chemical vapor deposition (MOCVD). Multichip operation of the FET's has demonstrated an excellent power combining efficiency due to the good uniformity among the chips. The two-chip device (total gate width WG= 14.4 mm) has delivered 5 W at 10 GHz with 4-dB gain and 23-percent power added efficiency (ηadd). The four-chip device (WG= 28.8 mm) has given 10 W at 8 GHz (gain = 4.5 dB, ηadd= 23 percent). The four-chip device (WG= 48 mm) has developed 15 W at 5 GHz (gain = 8 dB, ηadd= 30 percent).     

An X-Band High-Power and High-PAE PHEMT MMIC Power Amplifier for Pulse and CW Operation

An X-band high-power and high power added efficiency (PAE), two-stage AlGaAs/InGaAs/GaAs psuedomorphic high electronic mobility transistor (PHEMT) monolithic microwave integrated circuit (MMIC) power amplifier is presented. The amplifier is designed to fully match a 50 Omega input and output impedance. Based on a 0.35 mum gate-length power PHEMT technology, the MMIC is fabricated on a 3 mil thick wafer. Under an 8 V DC bias condition, the characteristics of 17.5 dB small-signal gain, 10 W continuous wave mode saturation output power of 42% PAE, and 12.6 W pulse saturation output power of 52.6% PAE at 9.4 GHz can be achieved.     

An experimental wide-band gyrotron traveling-wave amplifier

Initial tests of a fast-millimeter-wave wide-band gyrotron traveling-wave amplifier (gyro-TWA)of novel design have demonstrated a small-signal 3-dB bandwidth of 13 percent with 18-dB gain at midband (35 GHz)using a 70-kV 1-A annular electron beam. This reflection-type amplifier using the TE01circular-electric mode has a linear tapered Waveguide circuit with an axial magnetic field profiled to maintain synchronism.     

A DC-12 GHz monolithic GaAsFET distributed amplifier

A monolithic balanced traveling-wave amplifier stage using GaAs MESFET's is demonstrated. This amplifier achieves 7-9-dB gain with about 40-ps risetime and a -3-dB bandwidth of 12 GHz, on a 0.91 × 0.97-mm die. Its gain versus frequency is very flat, and |S11|, |S12|, and |S22| are less than 0.2 from 0-18 GHz. S-parameter uniformity and yield data are measured on-wafer with a special hybrid wafer probe.     

110-120-GHz monolithic low-noise amplifiers

The authors discuss the development of 110-120-GHz monolithic low-noise amplifiers (LNAs) using 0.1-mm pseudomorphic AlGaAs/InGaAs/GaAs low-noise HEMT technology. Two 2-stage LNAs have been designed, fabricated, and tested. The first amplifier demonstrates a gain of 12 dB at 112 to 115 GHz with a noise figure of 6.3 dB when biased for high gain, and a noise figure of 5.5 dB is achieved with an associated gain of 10 dB at 113 GHz when biased for low-noise figure. The other amplifier has a measured small-signal gain of 19.6 dB at 110 GHz with a noise figure of 3.9 dB. A noise figure of 3.4 dB with 15.6-dB associated gain was obtained at 113 GHz. The authors state that the small-signal gain and noise figure performance for the second LNA are the best results ever achieved for a two-stage HEMT amplifier at this frequency band     

A high-gain monolithic D-band InP HEMT amplifier

This paper describes a three-stage monolithic amplifier that exhibits a small-signal gain of 30 dB at 140 GHz. The amplifier employs AlInAs/GaInAs/InP high electron mobility transistor devices with 0.1×150 μm² gate periphery, is implemented with coplanar waveguide circuitry fabricated on an InP substrate, and occupies a total area of 2 mm². Gain exceeding 10 dB was measured on-wafer from 129 to 157 GHz. This is the highest reported gain per stage for a transistor amplifier operating at these frequencies