细微间距器件焊点形态成形建模与预测

基于最小能量原理和焊点形态理论 ,以方形扁平封装器件 (QFP)焊点为例建立了细微间距 (FPT)器件焊点形态成形模型 ,运用有限元方法预测了QFP焊点形态 ,并运用该模型和有限元方法对QFP器件焊点三维形态问题进行了分析。     

细间距器件焊点桥接研究

根据能量最小原理建立SMT焊点形态预测的三维数学模型,模拟了焊点桥接成形过程并对模拟结果进行实验验证。通过分析模拟结果,对SMT焊点钎料桥接机理进行理论研究。     

球栅阵列(BGA)器件焊点形态成形建模与预测

本文基于最小能量原理建立了塑料球栅阵列（ＰＢＧＡ）焊点形态成形模型,运用有限元方法预测ＰＢＧＡ焊点形态,并对预测结果与其它不同模型的预测结果和实验结果进行了对比．结果表明,有限元方法预测结果与其它模型结果和实验结果吻合良好．     

塑料球栅阵列（PBGA）焊点三维形态预测与分析

本文应用最小能量原理和有限元方法，建立塑料球栅阵列（ＰＢＧＡ）器件焊点三维形态预测模型。对ＰＢＧＡ焊点三维形态进行预测和分析。并将预测结果与试验结果以及国外学者用数学分析模型所得的预测结果进行了对比验证。     

模板对倒装焊焊点形态的影响及其可靠性研究

本文通过用于焊点形态预测软件SURFACE EVOLVER的输入数据文件,得到倒装焊焊点形态.参考模板开口指导说明(IPC-7525),拟定模板开口方案,得到相应的焊点形态.通过建立有限元模型,运用ANSYS软件对含铅焊点在热循环加载条件下的应力应变和疲劳寿命进行分析.根据预测得到的热疲劳寿命,找出了适合本文模型的模板结构参数,同时分析了其它设计与工艺参数和焊点可靠性之间的关系.     

振动载荷下特种设备中电路板级焊点疲劳寿命预测

基于内聚力模型,提出一种用于振动载荷下特种设备中电路板级焊点疲劳寿命预测的介观尺度模型。将单调载荷与振动周期载荷相结合,建立焊点累积损伤参数来表征焊点的剩余疲劳寿命,利用焊点损伤累积率来表征焊点损伤演化规律。以Sn3.0Ag0.5Cu(SAC305)细间距无铅焊点为例分析了模型参数确定方法,并通过振幅为5 mm与10 mm的定频振动试验对模型的预测精度进行了验证,寿命预测结果误差小于10%。由于模型参数为焊点钎料累积塑性应变的固有函数,与焊点尺寸与几何形态无关,通过小样本试验,数据一经确定即可应用于同种钎料不同尺寸焊点在不同振动等级下的疲劳寿命预测,节约了时间与试验成本,该模型能为特种设备中的电子组件提供一种评估板级焊点疲劳寿命的简洁、实用方法。     

CSP封装Sn-3.5Ag焊点的热疲劳寿命预测

对芯片尺寸封装(CSP)中Sn-3.5Ag无铅焊点在热循环加速载荷下的热疲劳寿命进行了预测.首先利用ANSYS软件建立CSP封装的三维有限元对称模型,运用Anand本构模型描述Sn-3.5Ag无铅焊点的粘塑性材料特性;通过有限元模拟的方法分析了封装结构在热循环载荷下的变形及焊点的应力应变行为,并结合Darveaux疲劳寿命模型预测了无铅焊点的热疲劳寿命.     

CSP封装Sn-3.5Ag焊点的热疲劳寿命预测

对芯片尺寸封装(CSP)中Sn-3.5Ag无铅焊点在热循环加速载荷下的热疲劳寿命进行了预测.首先利用ANSYS软件建立CSP封装的三维有限元对称模型,运用Anand本构模型描述Sn-3.5Ag无铅焊点的粘塑性材料特性;通过有限元模拟的方法分析了封装结构在热循环载荷下的变形及焊点的应力应变行为,并结合Darveaux疲劳寿命模型预测了无铅焊点的热疲劳寿命.     

基于最小能量原理的SMT焊点三维形态预测

本文应用最小能量原理和有限元方法建立表面组装技术（ＳＭＴ：Ｓｕｒｆａｃｅ Ｍｏｕｎｔ Ｔｅｃｈｎｏｌｏｇｙ）形成的焊点三维形态预测模型,并运用该模型对塑料球栅阵列（ＰＢＧＡ：Ｐｌａｓｔｉｃ Ｂａｌｌ Ｇｒｉｄ Ａｒｒａｙ）器件焊点三维形态问题进行了预测和分析。最后将预测结果与试验结果以及国外学者用数学分析模型所得的预测结果进行了对比验证。     

基于电阻应变的无铅焊点损伤临界点在线检测

蠕变损伤是引起焊点失效的重要因素,实验表明在蠕变过程中存在一个临界点,在临界点之前蠕变呈现一种缓慢的增长趋势,而在临界点之后蠕变加速进行,导致焊点很快失效。找出此临界点对了解焊点的性能及寿命预测有重要意义,但传统的蠕变测试方法不能实时测得焊点的蠕变损伤临界点。研究表明焊点的蠕变损伤与其电阻变化存在着线性关系,因此可以通过测量焊点的电阻变化来监测其蠕变情况。文章以单个无铅焊点为研究对象,利用特制的无铅焊点微电阻在线测量系统,实时监测焊点在蠕变过程中的电阻变化,并利用二次移动平均法建立焊点电阻的预测模型,通过对比预测电阻值与实测值的差异实时找出焊点的损伤临界点,为蠕变测试研究提供了一种新的方法。     

光纤固定软钎焊焊点的三维形态模拟

本文在建立光纤固定软钎焊焊点模型及能量边界条件的基础上,利用有限元方法对焊点三维形态进行数值模拟并分析材料及结构等参数对焊点形态的影响规律.基于能量最小原理并利用形态模拟数据,得出钎料量及焊盘尺寸对光纤与焊盘间隙高度的影响规律,以及光纤横向偏移量对回复力的影响规律.研究结果表明:针对一定的焊盘相对尺寸,当钎料量大于临界值,最小间隙高度随着钎料量的增加而成线性增加;光纤横向偏移量小于一定值时,回复力随着偏移量的增加成线性增加.研究结果对于通过调整结构及工艺参数来控制光纤对准偏移具有指导意义.     

A Parallel-Structure Solder Paste Inspection System

In this paper, we present an innovative design of a solder paste inspection system that can be practically integrated into existing solder paste printing machines. Since solder paste inspection systems usually occupy a large vertical space, we designed a mirror box that can redirect the transmission of fringe patterns. In this way, a new parallel-structure solder paste inspection system with a significant reduction in the vertical constraint is developed. We also developed a hybrid weighting algorithm that applies the distance and fringe contrast to acquire the height of solder pastes. Furthermore, we developed an algorithm that generates the 2-D image from the fringe pattern images during the four-step algorithm. It reduces the time required for solder paste inspection compared to traditional approaches that use special lighting systems to create the 2-D image. Based on the results of the height acquisition algorithm, 2-D and 3-D solder paste inspections are performed. Experimental results show that our system can inspect a 20 mm times 20 mm printed circuit board area within 2 s to detect common 2-D and 3-D defects, and the maximum standard deviation for the average height is 3 mum.     

BGA焊点的形态预测及可靠性优化设计

制定了BGA(球栅阵列)焊点的形态预测以及可靠性分析优化设计方案，对完全分布和四边分布的两种BGA元件，通过改变下焊盘的尺寸得到不同钎料量的焊点，并对其形态进行了预测，建立了可靠性分析的三维力学模型。采用有限元方法分析了元件和焊点在热循环条件下的应力应变分布特征，预测了不同种类和不同形态的BGA焊点的热疲劳寿命，由此给出了最佳的上下焊盘比例范围。     

SMT焊点元件与基板间隙的预测及其对焊点三维形态的影响

基于能量最小原理，采用三维有限元方法，考究了片式元件与基板的间隙对ＳＭＴ焊点三维开矿的影响，利用焊点系统的能量数据，分析元件与基板的间隙。研究表明，元件与基板的间隙对焊点三维形态有重要影响，元件与基板的间隙随焊点钎料量的增加和焊盘伸出长度匠减小而增加，提出了间隙与钎料量，焊盘伸出长度关系的回归模型。     

热循环加载条件下焊点形态参数对板级光互连模块对准偏移影响分析

建立光互连模块有限元分析模型并进行热循环加载有限元分析,获取了垂直腔面发射激光器(Vertical Cavity Surface Emitting Laser,VCSEL)与耦合元件间的位置偏移;采用正交实验设计法设计了不同焊点结构参数组合并建立有限元模型,计算相应焊点形态参数组合下的位置偏移数据并进行方差分析.结果表明:在一个热循环周期内低温保温结束时刻位置偏移最大;外端光通道的位置偏移比中间光通道的偏移值大;在置信度为95%时VCSEL焊点高度对对准偏移具有显著影响,因素显著性排序由大到小依次为:VCSEL焊点高度、陶瓷基板焊点高度、VCSEL焊点体积和陶瓷基板焊点体积;单因子变量分析表明,位置偏移随VCSEL焊点高度增加而增大.     

Critical variables of solder paste stencil printing for micro-BGA and fine-pitch QFP

Stencil printing continues to be the dominant method of solder deposition in high-volume surface-mount assembly. Control of the amount of solder paste deposited is critical in the case of fine-pitch and ultrafine-pitch surface-mount assembly. The process is still not well understood as indicated by the fact that industry reports 52-71% surface-mount technology (SMT) defects are related to the solder paste stencil printing process. The purpose of this paper is to identify the critical variables that influence the volume, area, and height of solder paste deposited. An experiment was conducted to investigate the effects of relevant process parameters on the amount of solder paste deposited for ball grid arrays (BGAs) and quad flat packages (QFPs) of five different pitches ranging from 0.76 mm (30 mil) to 0.3 mm (12 mil). The effects of aperture size, aperture shape, board finish, stencil thickness, solder type, and print speed were examined. The deposited solder paste was measured by an inline fully automatic laser-based three-dimensional (3-D) triangulation solder paste inspection system. Analysis of variance (ANOVA) shows that aperture size and stencil thickness are the two most critical variables. A linear relationship between transfer ratio (defined as the ratio of the deposited paste volume to the stencil aperture volume) and area ratio (defined as the ratio of the area of the aperture opening to the area of the aperture wall) is proposed. The analysis indicates that the selection of a proper stencil thickness is the key to controlling the amount of solder paste deposited, and that the selection of maximum stencil thickness should be based on the area ratio. The experimental results are shown to be consistent with a theoretical model, which are also described.     

Full-field 3-D measurement of solder pastes using LCD-based phase shifting techniques

Quality inspection of deposited solder pastes is critical in surface mounting processes. As surface-mount technology (SMT) component pitches decrease, three-dimensional (3-D) measurement of solder pastes has become more and more important in ensuring solder joint reliability. Currently, the 3-D measurements for solder pastes are mainly performed by laser-based systems. However, they suffer from low inspection speed due to the physical line-scanning process. In this paper, a fast and cost-effective 3-D measurement system for deposited solder pastes is proposed. The proposed system uses a liquid crystal display (LCD)-based phase shifting technique to perform full-field 3-D measurement of solder pastes with high accuracy. Experiments have shown that the 3-D profiling and volume measurement of solder pastes are very efficient and effective with the proposed system. The volume measurement repeatability is in the micrometer range. The processing time of the proposed 3-D measurement system for an image of 640/spl times/480 pixels is less than 1 s on a typical personal computer.     

An integrated system for prediction and analysis of solderinterconnection shapes

In this paper, an integrated system [predicting solder interconnection shapes (PSIS)] is built to predict and analyze the shape of solder interconnections in electronic packaging. The purposes are to numerically simulate the formation of solder joints, analyze the shape of solder joints and its influential factors and provide an efficient tool for design and manufacturing engineers to improve the integrity of solder interconnections. The formation of solder joints is numerically simulated through a surface evolver program and the calculation is automated with an additional controller. A datafile generator is developed in which the potential energies, geometry of the conjunction and boundary conditions of the initial solder joint can be generated visually and transferred into evolver syntax automatically. A post processor is built to analyze the global three-dimensional (3-D) shape and cross section profiles of solder fillets. Also, the applications for solder interconnection shape prediction of chip component (RC3216) are conducted with this system     

Effects of solder joint shape and height on thermal fatigue lifetime

Solder joint thermal fatigue failure is a major concern for area array technologies such as flip chip and ball grid array technologies. Solder joint geometry is an important factor influencing thermal fatigue lifetime. In this paper, the effects of solder joint shape and height on thermal fatigue lifetime are studied. Solder joint fatigue lifetime was evaluated using accelerated temperate cycling and adhesion test. Scanning electron microscopy (SEM), energy dispersive x-ray analysis (EDX), scanning acoustic microscopy (nondestructive evaluation) and optical microscopy were utilized to examine the integrity of the joint and to detect cracks and other defects before and during accelerated fatigue tests. Our accelerated temperature cycling test clearly shows that solder joint fatigue failure process consists of three phases: crack initiation, crack propagation and catastrophic failure. Experimental results indicated that both hourglass shape and great standoff height could improve solder joint fatigue lifetime, with standoff height being the more effective factor. Experimental data suggested that shape is the dominant factor affecting crack initiation time while standoff height is the major factor influencing crack propagation time.     

Improvements of solder ball shear strength of a wafer-level CSP using a novel Cu stud technology

The solder ball shear test has been widely adopted in the electronics industry to estimate the strength of solder ball attachment of advanced electronic packages. A solder ball with low shear strength is usually considered as a weak solder joint in package reliability testing. Consequently, demands for increasing the solder ball shear strength have risen in recent years. This work attempts to enhance the solder ball shear strength of the wafer level chip scale package (WLCSP) by forming a Cu stud on the surface of the solder pad. The novel Cu stud design technology has been achieved by using a simple semiconductor manufacturing process. To investigate the impact of Cu stud, a three-dimensional (3-D) nonlinear finite element method is used for Cu stud design. Furthermore, the shear force-displacement curves, obtained by computational analysis, are compared with the experimental results to demonstrate the accuracy of the finite element models. This investigation also explores the effects of various parameters including the Cu stud's dimension, shape, and material properties on solder ball shear strength. The analytical results establish that a suitable size of Cu stud in a solder ball can effectively enhance the ball's shear strength.