Printable Organic‐Inorganic Nanoscale Multilayer Gate Dielectrics for Thin‐Film Transistors Enabled by a Polymeric Organic Interlayer

Here, a new approach to the layer‐by‐layer solution‐processed fabrication of organic/inorganic hybrid self‐assembled nanodielectrics (SANDs) is reported and it is demonstrated that these ultrathin gate dielectric films can be printed. The organic SAND component, named P‐PAE, consists of polarizable π‐electron phosphonic acid‐based units bound to a polymeric backbone. Thus, the new polymeric SAND (PSAND) can be fabricated either by spin‐coating or blade‐coating in air, by alternating P‐PAE, a capping reagent layer, and an ultrathin ZrOx layer. The new PSANDs thickness vary from 6 to 15 nm depending on the number of organic‐ZrOx bilayers, exhibit tunable film thickness, well‐defined nanostructures, large electrical capacitance (up to 558 nF cm^?2), and good insulating properties (leakage current densities as low as 10^?6 A cm^?2). Organic thin‐film transistors that are fabricated with representative p‐/n‐type organic molecular/polymeric semiconducting materials, function well at low voltages (<3.0 V). Furthermore, flexible TFTs fabricated with PSAND exhibit excellent mechanical flexibility and good stress stability, offering a promising route to low operating voltage flexible electronics. Finally, printable PSANDs are also demonstrated and afford TFTs with electrical properties comparable to those achieved with the spin‐coated PSAND‐based devices.     

Hybrid Nanodielectrics for Low‐Voltage Organic Electronics

Nanoscale hybrid dielectrics composed of an ultra‐thin polymeric low‐κ bottom layer and an ultra‐thin high‐κ oxide top layer, with high dielectric strength and capacitances up to 0.25 μFcm^?2, compatible with low‐voltage, low‐power, organic electronic circuits are demonstrated. An efficient and reliable fabrication process, with 100% yield achieved on lab‐scale arrays, is demonstrated by means of pulsed laser deposition (PLD) for the fast growth of the oxide layer. With this strategy, high capacitance top gate (TG), n‐type and p‐type organic field effect transistors (OFETs) with high mobility, low leakage currents, and low subthreshold slopes are realized and employed in complementary‐like inverters, exhibiting ideal switching for supply voltages as low as 2 V. Importantly, the hybrid double‐layer allows for a neat decoupling between the need for a high capacitance, guaranteed by the nanoscale thickness of the double layer, and for an optimized semiconductor–dielectric interface, a crucial point in enabling high mobility OFETs, thanks to the low‐κ polymeric dielectric layer in direct contact with the polymer semiconductor. It is shown that such decoupling can be achieved already with a polymer dielectric as thin as 10 nm when the top oxide is deposited by PLD. This paves the way for a very versatile implementation of the proposed approach for the scaling of the operating voltages of TG OFETs with very low level of dielectric leakage currents to the fabrication of low‐voltage organic electronics with drastically reduced power consumption.     

High‐Performance,Air‐Stable,Top‐Gate,p‐Channel WSe2 Field‐Effect Transistor with Fluoropolymer Buffer Layer

High‐performance, air‐stable, p‐channel WSe₂ top‐gate field‐effect transistors (FETs) using a bilayer gate dielectric composed of high‐ and low‐k dielectrics are reported. Using only a high‐k Al₂O₃ as the top‐gate dielectric generally degrades the electrical properties of p‐channel WSe₂, therefore, a thin fluoropolymer (Cytop) as a buffer layer to protect the 2D channel from high‐k oxide forming is deposited. As a result, a top‐gate‐patterned 2D WSe₂ FET is realized. The top‐gate p‐channel WSe₂ FET demonstrates a high hole mobility of 100 cm²_­ V^?1 s^?1 and a I_ON/I_OFF ratio > 10⁷ at low gate voltages (V_GS ca. ?4 V) and a drain voltage (V_DS) of ?1 V on a glass substrate. Furthermore, the top‐gate FET shows a very good stability in ambient air with a relative humidity of 45% for 7 days after device fabrication. Our approach of creating a high‐k oxide/low‐k organic bilayer dielectric is advantageous over single‐layer high‐k dielectrics for top‐gate p‐channel WSe₂ FETs, which will lead the way toward future electronic nanodevices and their integration.     

Large‐Area Schottky Barrier Transistors Based on Vertically Stacked Graphene–Metal Oxide Heterostructures

The fabrication of all‐transparent flexible vertical Schottky barrier (SB) transistors and logic gates based on graphene–metal oxide–metal heterostructures and ion gel gate dielectrics is demonstrated. The vertical SB transistor structure is formed by (i) vertically sandwiching a solution‐processed indium‐gallium‐zinc‐oxide (IGZO) semiconductor layer between graphene (source) and metallic (drain) electrodes and (ii) employing a separate coplanar gate electrode bridged with a vertical channel through an ion gel. The channel current is modulated by tuning the Schottky barrier height across the graphene–IGZO junction under an applied external gate bias. The ion gel gate dielectric with high specific capacitance enables modulation of the Schottky barrier height at the graphene–IGZO junction over 0.87 eV using a voltage below 2 V. The resulting vertical devices show high current densities (18.9 A cm^?2) and on–off current ratios (>10⁴) at low voltages. The simple structure of the unit transistor enables the successful fabrication of low‐power logic gates based on device assemblies, such as the NOT, NAND, and NOR gates, prepared on a flexible substrate. The facile, large‐area, and room‐temperature deposition of both semiconducting metal oxide and gate insulators integrates with transparent and flexible graphene opens up new opportunities for realizing graphene‐based future electronics.     

Mercury‐Mediated Organic Semiconductor Surface Doping Monitored by Electrolyte‐Gated Field‐Effect Transistors

Surface doping allows tuning the electronic structure of semiconductors at near‐surface regime and is normally accomplished through the deposition of an ultrathin layer on top or below the host material. Surface doping is particularly appealing in organic field‐effect transistors (OFETs) where charge transport takes place at the first monolayers close to the dielectric surface. However, due to fabrication restrictions that OFET architecture imparts, this is extremely challenging. Here, it is demonstrated that mercury cations, Hg²⁺, can be exploited to control doping levels at the top surface of a thin film of a p‐type organic semiconductor blended with polystyrene. Electrolyte‐ or water‐gated field‐effect transistors, which have its conductive channel at the top surface of the organic thin film, turn out to be a powerful tool for monitoring the process. A positive shift of the threshold voltage is observed in the devices upon Hg²⁺ exposure. Remarkably, this interaction has been proved to be specific to Hg²⁺ with respect to other divalent cations and sensitive down to nanomolar concentrations. Hence, this work also opens new perspectives for employing organic electronic transducers in portable sensors for the detection of an extremely harmful water pollutant without the need of using specific receptors.     

Contact Resistance in Organic Field‐Effect Transistors: Conquering the Barrier

Organic semiconductors have sparked interest as flexible, solution processable, and chemically tunable electronic materials. Improvements in charge carrier mobility put organic semiconductors in a competitive position for incorporation in a variety of (opto‐)electronic applications. One example is the organic field‐effect transistor (OFET), which is the fundamental building block of many applications based on organic semiconductors. While the semiconductor performance improvements opened up the possibilities for applying organic materials as active components in fast switching electrical devices, the ability to make good electrical contact hinders further development of deployable electronics. Additionally, inefficient contacts represent serious bottlenecks in identifying new electronic materials by inhibiting access to their intrinsic properties or providing misleading information. Recent work focused on the relationships of contact resistance with device architecture, applied voltage, metal and dielectric interfaces, has led to a steady reduction in contact resistance in OFETs. While impressive progress was made, contact resistance is still above the limits necessary to drive devices at the speed required for many active electronic components. Here, the origins of contact resistance and recent improvement in organic transistors are presented, with emphasis on the electric field and geometric considerations of charge injection in OFETs.     

Surface‐Modified High‐k Oxide Gate Dielectrics for Low‐Voltage High‐Performance Pentacene Thin‐Film Transistors

In this study, pentacene thin‐film transistors (TFTs) operating at low voltages with high mobilities and low leakage currents are successfully fabricated by the surface modification of the CeO₂–SiO₂ gate dielectrics. The surface of the gate dielectric plays a crucial role in determining the performance and electrical reliability of the pentacene TFTs. Nearly hysteresis‐free transistors are obtained by passivating the devices with appropriate polymeric dielectrics. After coating with poly(4‐vinylphenol) (PVP), the reduced roughness of the surface induces the formation of uniform and large pentacene grains; moreover, –OH groups on CeO₂–SiO₂ are terminated by C₆H₅, resulting in the formation of a more hydrophobic surface. Enhanced pentacene quality and reduced hysteresis is observed in current–voltage (I–V) measurements of the PVP‐coated pentacene TFTs. Since grain boundaries and –OH groups are believed to act as electron traps, an OH‐free and smooth gate dielectric leads to a low trap density at the interface between the pentacene and the gate dielectric. The realization of electrically stable devices that can be operated at low voltages makes the OTFTs excellent candidates for future flexible displays and electronics applications.     

High‐Transconductance Organic Thin‐Film Electrochemical Transistors for Driving Low‐Voltage Red‐Green‐Blue Active Matrix Organic Light‐Emitting Devices

Switching and control of efficient red, green, and blue active matrix organic light‐emitting devices (AMOLEDs) by printed organic thin‐film electrochemical transistors (OETs) are demonstrated. These all‐organic pixels are characterized by high luminance at low operating voltages and by extremely small transistor dimensions with respect to the OLED active area. A maximum brightness of ≈900 cd m^?2 is achieved at diode supply voltages near 4 V and pixel selector (gate) voltages below 1 V. The ratio of OLED to OET area is greater than 100:1 and the pixels may be switched at rates up to 100 Hz. Essential to this demonstration are the use of a high capacitance electrolyte as the gate dielectric layer in the OETs, which affords extremely large transistor transconductances, and novel graded emissive layer (G‐EML) OLED architectures that exhibit low turn‐on voltages and high luminescence efficiency. Collectively, these results suggest that printed OETs, combined with efficient, low voltage OLEDs, could be employed in the fabrication of flexible full‐color AMOLED displays.     

Orders‐of‐Magnitude Reduction of the Contact Resistance in Short‐Channel Hot Embossed Organic Thin Film Transistors by Oxidative Treatment of Au‐Electrodes

In this study we report on the optimization of the contact resistance by surface treatment in short‐channel bottom‐contact OTFTs based on pentacene as semiconductor and SiO₂ as gate dielectric. The devices have been fabricated by means of nanoimprint lithography with channel lengths in the range of 0.3 μm < L < 3.0 μm. In order to reduce the contact resistance the Au source‐ and drain‐contacts were subjected to a special UV/ozone treatment, which induced the formation of a thin AuO_x layer. It turned out, that the treatment is very effective (i) in decreasing the hole‐injection barrier between Au and pentacene and (ii) in improving the morphology of pentacene on top of the Au contacts and thus reducing the access resistance of carriers to the channel. Contact resistance values as low as 80 Ω cm were achieved for gate voltages well above the threshold. In devices with untreated contacts, the charge carrier mobility shows a power‐law dependence on the channel length, which is closely related to the contact resistance and to the grain‐size of the pentacene crystallites. Devices with UV/ozone treated contacts of very low resistance, however, exhibit a charge carrier mobility in the range of 0.3 cm² V^–1 s^–1 < μ < 0.4 cm² V^–1 s^–1 independent of the channel length.     

Solution‐Processed Silicane Field‐Effect Transistor: Operation Due to Stacking Defects on the Channel

2D silicon nanomaterials have unique potential for use in applications owing to their many different exotic electronic properties. Field‐effect transistors are fabricated based on free‐standing silicanes through a solution process. Owing to the sensitive surface and the nanometer thickness, the devices require the use of fabrication conditions similar to those of lithium‐ion batteries to prevent oxidation of the sheets. Reliable transistor performance is observed at room temperature in a channel thinner than 3 nm, as drain voltage dependent transfer curves current modulation, depending on the edge effect of the silicane, although the transistor property is modest (hole mobility of 1.8 cm² V^?1 s^?1). The results suggest the feasibility of other air‐sensitive 2D nanomaterials for applications in nanoelectronic devices.     

Simplified Large‐Area Manufacturing of Organic Electrochemical Transistors Combining Printing and a Self‐Aligning Laser Ablation Step

A hybrid manufacturing approach for organic electrochemical transistors (OECTs) on flexible substrates is reported. The technology is based on conventional and digital printing (screen and inkjet printing), laser processing, and post‐press technologies. A careful selection of the conductive, dielectric, and semiconductor materials with respect to their optical properties enables a self‐aligning pattern formation which results in a significant reduction of the usual registration problems during manufacturing. For the prototype OECTs, based on this technology, on/off ratios up to 600 and switching times of 100 milliseconds at gate voltages in the range of 1 V were obtained.     

Systematic Study of Widely Applicable N‐Doping Strategy for High‐Performance Solution‐Processed Field‐Effect Transistors

A specific design for solution‐processed doping of active semiconducting materials would be a powerful strategy in order to improve device performance in flexible and/or printed electronics. Tetrabutylammonium fluoride and tetrabutylammonium hydroxide contain Lewis base anions, F^? and OH^?, respectively, which are considered as organic dopants for efficient and cost‐effective n‐doping processes both in n‐type organic and nanocarbon‐based semiconductors, such as poly[[N,N′‐bis(2‐octyldodecyl)‐naphthalene‐1,4,5,8‐bis(dicarboximide)‐2,6‐diyl]‐alt‐5,5′‐(2,2′‐bithiophene)] (P(NDI2OD‐T2)) and selectively dispersed semiconducting single‐walled carbon nanotubes by π‐conjugated polymers. The dramatic enhancement of electron transport properties in field‐effect transistors is confirmed by the effective electron transfer from the dopants to the semiconductors as well as controllable onset and threshold voltages, convertible charge‐transport polarity, and simultaneously showing excellent device stabilities under ambient air and bias stress conditions. This simple solution‐processed chemical doping approach could facilitate the understanding of both intrinsic and extrinsic charge transport characteristics in organic semiconductors and nanocarbon‐based materials, and is thus widely applicable for developing high‐performance organic and printed electronics and optoelectronics devices.     

Extracting Parameters from the Current–Voltage Characteristics of Organic Field‐Effect Transistors

Organic field‐effect transistors were fabricated with vapor‐deposited pentacene on aluminum oxide insulating layers. Several methods are used in order to extract the mobility and threshold voltage from the transfer characteristic of the devices. In all cases, the mobility is found to depend on the gate voltage. The first method consists of deriving the drain current as a function of gate voltage (transconductance), leading to the so‐called field‐effect mobility. In the second method, we assume a power‐law dependence of the mobility with gate voltage together with a constant contact resistance. The third method is the so‐called transfer line method, in which several devices with various channel length are used. It is shown that the mobility is significantly enhanced by modifying the aluminum oxide layer with carboxylic acid self‐assembled monolayers prior to pentacene deposition. The methods used to extract parameters yield threshold voltages with an absolute value of less than 2 V. It is also shown that there is a shift of the threshold voltage after modification of the aluminum oxide layer. These features seem to confirm the validity of the parameter‐extraction methods.     

Implementation of Low‐Power Electronic Devices Using Solution‐Processed Tantalum Pentoxide Dielectric

The development of solution‐processed field effect transistors (FETs) based on organic and hybrid materials over the past two decades has demonstrated the incredible potential in these technologies. However, solution processed FETs generally require impracticably high voltages to switch on and off, which precludes their application in low‐power devices and prevent their integration with standard logic circuitry. Here, a universal and environmentally benign solution‐processing method for the preparation of Ta₂O₅, HfO₂ and ZrO₂ amorphous dielectric thin films is demonstrated. High mobility CdS FETs are fabricated on such high‐κ dielectric substrates entirely via solution‐processing. The highest mobility, 2.97 cm² V^?1 s^?1 is achieved in the device with Ta₂O₅ dielectric with a low threshold voltage of 1.00 V, which is higher than the mobility of the reference CdS FET with SiO₂ dielectric with an order of magnitude decrease in threshold voltage as well. Because these FETs can be operated at less than 5 V, they may potentially be integrated with existing logic and display circuitry without significant signal amplification. This report demonstrates high‐mobility FETs using solution‐processed Ta₂O₅ dielectrics with drastically reduced power consumption; ≈95% reduction compared to that of the device with a conventional SiO₂ gate dielectric.     

Air‐Stable n‐Type Organic Field‐Effect Transistors Based on Carbonyl‐Bridged Bithiazole Derivatives

An electronegative conjugated compound composed of a newly designed carbonyl‐bridged bithiazole unit and trifluoroacetyl terminal groups is synthesized as a candidate for air‐stable n‐type organic field‐effect transistor (OFET) materials. Cyclic voltammetry measurements reveal that carbonyl‐bridging contributes both to lowering the lowest unoccupied molecular orbital energy level and to stabilizing the anionic species. X‐ray crystallographic analysis of the compound shows a planar molecular geometry and a dense molecular packing, which is advantageous to electron transport. Through these appropriate electrochemical properties and structures for n‐type semiconductor materials, OFET devices based on this compound show electron mobilities as high as 0.06 cm² V^?1 s^?1 with on/off ratios of 10⁶ and threshold voltages of 20 V under vacuum conditions. Furthermore, these devices show the same order of electron mobility under ambient conditions.     

Anodization for Simplified Processing and Efficient Charge Transport in Vertical Organic Field‐Effect Transistors

Vertical organic transistors are an attractive alternative to realize short channel transistors, which are required for powerful electronic devices and flexible electronic circuits operating at high frequencies. Unfortunately, the vertical device architecture comes along with an increased device fabrication complexity, limiting the potential of this technology for application. A new design of vertical organic field‐effect transistors (VOFETs) with superior electrical performance and simplified processing is reported. By using electrochemical oxidized aluminum oxide (AlO_x) as a pseudo self‐aligned charge‐blocking structure in vertical organic transistors, direct leakage current between the source and drain can be effectively suppressed, enabling VOFETs with very low off‐current levels despite the short channel length. The anodization technique is easy to apply and can be surprisingly used on both n‐type and p‐type organic semiconductor thin films with significant signs of degradation. Hence, the anodization technique enables a simplified process of high‐performance p‐type and n‐type VOFETs, paving the road toward complementary circuits made of vertical transistors.     

Polyelectrolyte Dielectrics for Flexible Low‐Voltage Organic Thin‐Film Transistors in Highly Sensitive Pressure Sensing

Organic thin‐film transistors (OTFTs) can provide an effective platform to develop flexible pressure sensors in wearable electronics due to their good signal amplification function. However, it is particularly difficult to realize OTFT‐based pressure sensors with both low‐voltage operation and high sensitivity. Here, controllable polyelectrolyte composites based on poly(ethylene glycol) (PEG) and polyacrylic acid (PAA) are developed as a type of high‐capacitance dielectrics for flexible OTFTs and ultrasensitive pressure sensors with sub‐1 V operation. Flexible OTFTs using the PAA:PEG dielectrics show good universality and greatly enhanced electrical performance under a much smaller operating voltage of ?0.7 V than those with a pristine PAA dielectric. The low‐voltage OTFTs also exhibit excellent flexibility and bending stability under various bending radii and long cycles. Flexible OTFT‐based pressure sensors with low‐voltage operation and superhigh sensitivity are demonstrated by using a suspended semiconductor/dielectric/gate structure in combination with the PAA:PEG dielectric. The sensors deliver a record high sensitivity of 452.7 kPa^?1 under a low‐voltage of ?0.7 V, and excellent operating stability over 5000 cycles. The OTFT sensors can be built into a wearable sensor array for spatial pressure mapping, which shows a bright potential in flexible electronics such as wearable devices and smart skins.     

Mechanistic Considerations of Bending‐Strain Effects within Organic Semiconductors on Polymer Dielectrics

The development of organic transistors for flexible electronics requires the understanding of device behavior upon the application of strain. Here, a comprehensive study of the effect of polymer‐dielectric and semiconductor chemical structure on the device performance under applied strain is reported. The systematic change of the polymer dielectric results in the modulation of the effects of strain on the mobility of organic field‐effect transistor devices. A general method is demonstrated to lower the effects of strain in devices by covalent substitution of the dielectric surface. Additionally, the introduction of a hexyl chain at the peripheries of the organic semiconductor structure results in an inversion of the effects of strain on device mobility. This novel behavior may be explained by the capacitative coupling of the surface energy variations during applied strain.     

Optimal Structure for High‐Performance and Low‐Contact‐Resistance Organic Field‐Effect Transistors Using Contact‐Doped Coplanar and Pseudo‐Staggered Device Architectures

A low contact resistance achieved on top‐gated organic field‐effect transistors by using coplanar and pseudo‐staggered device architectures, as well as the introduction of a dopant layer, is reported. The top‐gated structure effectively minimizes the access resistance from the contact to the channel region and the charge‐injection barrier is suppressed by doping of iron(III)trichloride at the metal/organic semiconductor interface. Compared with conventional bottom‐gated staggered devices, a remarkably low contact resistance of 0.1–0.2 kΩ cm is extracted from the top‐gated devices by the modified transfer line method. The top‐gated devices using thienoacene compound as a semiconductor exhibit a high average field‐effect mobility of 5.5–5.7 cm² V^?1 s^?1 and an acceptable subthreshold swing of 0.23–0.24 V dec^?1 without degradation in the on/off ratio of ≈10⁹. Based on these experimental achievements, an optimal device structure for a high‐performance organic transistor is proposed.     

Ionic Liquid Activation of Amorphous Metal‐Oxide Semiconductors for Flexible Transparent Electronic Devices

Amorphous metal‐oxide semiconductors offer the high carrier mobilities and excellent large‐area uniformity required for high performance, transparent, flexible electronic devices; however, a critical bottleneck to their widespread implementation is the need to activate these materials at high temperatures which are not compatible with flexible polymer substrates. The highly controllable activation of amorphous indium gallium zinc oxide semiconductor channels using ionic liquid gating at room temperature is reported. Activation is controlled by electric field‐induced oxygen migration across the ionic liquid‐semiconductor interface. In addition to activation of unannealed devices, it is shown that threshold voltages of a transistor can be linearly tuned between the enhancement and depletion modes. Finally, the first ever example of transparent flexible thin film metal oxide transistor on a polyamide substrate created using this simple technique is demonstrated. This study demonstrates the potential of field‐induced activation as a promising alternative to traditional postdeposition thermal annealing which opens the door to wide scale implementation into flexible electronic applications.