Dual‐Phase All‐Inorganic Cesium Halide Perovskites for Conducting‐Bridge Memory‐Based Artificial Synapses

Neuromorphic computing, which mimics biological neural networks, can overcome the high‐power and large‐throughput problems of current von Neumann computing. Two‐terminal memristors are regarded as promising candidates for artificial synapses, which are the fundamental functional units of neuromorphic computing systems. All‐inorganic CsPbI₃ perovskite‐based memristors are feasible to use in resistive switching memory and artificial synapses due to their fast ion migration. However, the ideal perovskite phase α‐CsPbI₃ is structurally unstable at ambient temperature and rapidly degrades to a non‐perovskite δ‐CsPbI₃ phase. Here, dual‐phase (Cs₃Bi₂I₉)_0.4?(CsPbI₃)_0.6 is successfully fabricated to achieve improved air stability and surface morphology compared to each single phase. Notably, the Ag/polymethylmethacrylate/(Cs₃Bi₂I₉)_0.4?(CsPbI₃)_0.6/Pt device exhibits non‐volatile memory functions with an endurance of ≈10³ cycles and retention of ≈10⁴ s with low operation voltages. Moreover, the device successfully emulates synaptic behavior such as long‐term potentiation/depression and spike timing/width‐dependent plasticity. This study will contribute to improving the structural and mechanical stability of all‐inorganic halide perovskites (IHPs) via the formation of dual phase. In addition, it proves the great potential of IHPs for use in low‐power non‐volatile memory devices and electronic synapses.     

Logic operations in memory using a memristive Akers array

In-memory computation is one of the most promising features of memristive memory arrays. In this paper, we propose an array architecture that supports in-memory computation based on a logic array first proposed in 1972 by Sheldon Akers. The Akers logic array satisfies this objective since this array can realize any Boolean function, including bit sorting. We present a hardware version of a modified Akers logic array, where the values stored within the array serve as primary inputs. The proposed logic array uses memristors, which are nonvolatile memory devices with noteworthy properties. An Akers logic array with memristors combines memory and logic operations, where the same array stores data and performs computation. This combination opens opportunities for novel non-von Neumann computer architectures, while reducing power and enhancing memory bandwidth.     

Biorealistic Implementation of Synaptic Functions with Oxide Memristors through Internal Ionic Dynamics

Memristors have attracted broad interest as a promising candidate for future memory and computing applications. Particularly, it is believed that memristors can effectively implement synaptic functions and enable efficient neuromorphic systems. Most previous studies, however, focus on implementing specific synaptic learning rules by carefully engineering external programming parameters instead of focusing on emulating the internal cause that leads to the apparent learning rules. Here, it is shown that by taking advantage of the different time scales of internal oxygen vacancy (V_O) dynamics in an oxide‐based memristor, diverse synaptic functions at different time scales can be implemented naturally. Mathematically, the device can be effectively modeled as a second‐order memristor with a simple set of equations including multiple state variables. Not only is this approach more biorealistic and easier to implement, by focusing on the fundamental driving mechanisms it allows the development of complete theoretical and experimental frameworks for biologically inspired computing systems.     

Look-ahead mapping of Boolean functions in memristive crossbar array

Memristors have drawn the attention of researchers due to their unique non-volatile and logic design capabilities. Combining these two, a concept called in-memory computing has emerged, wherein the same memory unit is used for both storage and computation, which helps in overcoming the CPU-memory bottleneck in conventional processor architectures. In this paper, we propose a look-ahead strategy for Boolean functions using Memristor Aided LoGIC (MAGIC) design style in the memristive crossbar, which supports in-memory computing. First, the Boolean function is converted into a netlist of NOT and NOR gates using a logic synthesis tool. The proposed crossbar mapping tool then maps the gate netlist to the crossbar, and also generates the micro-operations needed to execute the gate operations. Experimental evaluation on ISCAS^′85 benchmarks reports average improvements of 37.02%, 36.55%, 64.99% and 35.55% respectively in terms of memristor count, latency, crossbar size, and energy over a recently published work. Results were also reported for IWLS-2005 benchmarks.     

Photon‐Memristive System for Logic Calculation and Nonvolatile Photonic Storage

Memristor‐based architectures have shown great potential for developing future computing systems beyond the era of von Neumann and Moore's law. However, the monotonous electrical input for dynamic resistance regulation limits the developments of memristors. Here, a concept of a photon‐memristive system, which realizes memristance depending on number of photons (optical inputs), is proposed. A detailed theoretical derivation is performed and the memristive characteristics, as stimulated by the optical inputs based on a hybrid system, consisting of a low‐dimension photoelectric semiconductor and a ferroelectric substrate are determined. The photon‐memristive system is also suitable for nonvolatile photonic memory since it possesses three or more‐bit data storage, desirable resistance‐change space, and an ON/OFF ratio of nearly 10⁷. The integrated circuit based on several photon‐memristive systems also realizes available photon‐triggered in‐memory computing. The photon‐memristive system expands the definition of memristors and emerges as a new data storage cell for future photonic neuromorphic computational architectures.     

Emerging MXene-Based Memristors for In-Memory,Neuromorphic Computing,and Logic Operation

Confronted by the difficulties of the von Neumann bottleneck and memory wall, traditional computing systems are gradually inadequate for satisfying the demands of future data-intensive computing applications. Recently, memristors have emerged as promising candidates for advanced in-memory and neuromorphic computing, which pave one way for breaking through the dilemma of current computing architecture. Till now, varieties of functional materials have been developed for constructing high-performance memristors. Herein, the review focuses on the emerging 2D MXene materials-based memristors. First, the mainstream synthetic strategies and characterization methods of MXenes are introduced. Second, the different types of MXene-based memristive materials and their widely adopted switching mechanisms are overviewed. Third, the recent progress of MXene-based memristors for data storage, artificial synapses, neuromorphic computing, and logic circuits is comprehensively summarized. Finally, the challenges, development trends, and perspectives are discussed, aiming to provide guidelines for the preparation of novel MXene-based memristors and more engaging information technology applications.     

Memristor Kinetics and Diffusion Characteristics for Mixed Anionic‐Electronic SrTiO3‐δ Bits: The Memristor‐Based Cottrell Analysis Connecting Material to Device Performance

Memristors based on mixed anionic‐electronic conducting oxides are promising devices for future data storage and information technology with applications such as non‐volatile memory or neuromorphic computing. Unlike transistors solely operating on electronic carriers, these memristors rely, in their switch characteristics, on defect kinetics of both oxygen vacancies and electronic carriers through a valence change mechanism. Here, Pt|SrTiO_3‐δ|Pt structures are fabricated as a model material in terms of its mixed defects which show stable resistive switching. To date, experimental proof for memristance is characterized in hysteretic current–voltage profiles; however, the mixed anionic‐electronic defect kinetics that can describe the material characteristics in the dynamic resistive switching are still missing. It is shown that chronoamperometry and bias‐dependent resistive measurements are powerful methods to gain complimentary insights into material‐dependent diffusion characteristics of memristors. For example, capacitive, memristive and limiting currents towards the equilibrium state can successfully be separated. The memristor‐based Cottrell analysis is proposed to study diffusion kinetics for mixed conducting memristor materials. It is found that oxygen diffusion coefficients increase up to 3 × 10^–15 m²s^–1 for applied bias up to 3.8 V for SrTiO_3‐δ memristors. These newly accessible diffusion characteristics allow for improving materials and implicate field strength requirements to optimize operation towards enhanced performance metrics for valence change memristors.     

An efficient memristor crossbar architecture for mapping Boolean functions using Binary Decision Diagrams (BDD)

The memristor is considered as the fourth fundamental circuit element along with resistor, capacitor and inductor. It is a two-terminal passive circuit element whose resistance value changes based on the amount of charge flowing through it. Another property of the memristor is that its resistance change is non-volatile in nature, and hence can be used for non-volatile memory applications. Researchers have been exploring memristors from various perspectives such as logic design and storage applications. In this paper, a slicing crossbar architecture for the efficient mapping of Boolean functions is proposed which exploits gate level parallelism using the memristor aided logic (MAGIC) design style. A Boolean function is first represented as a Binary Decision Diagram (BDD). The BDD nodes are expressed as netlists of NOR and NOT gates, and are mapped to the proposed slicing crossbar architecture with parallel node evaluation where possible. This is the first approach that combines BDD-based synthesis with MAGIC gate evaluation on memristor crossbar, while at the same time avoiding crossbar-related problems using a slicing architecture. Experimental evaluations on standard benchmark functions show considerable improvement in the solutions.     

Artificial Synapses Based on Multiterminal Memtransistors for Neuromorphic Application

Neuromorphic computing, which emulates the biological neural systems could overcome the high‐power consumption issue of conventional von‐Neumann computing. State‐of‐the‐art artificial synapses made of two‐terminal memristors, however, show variability in filament formation and limited capacity due to their inherent single presynaptic input design. Here, a memtransistor‐based arti?cial synapse is realized by integrating a memristor and selector transistor into a multiterminal device using monolayer polycrys‐talline‐MoS₂ grown by a scalable chemical vapor deposition (CVD) process. Notably, the memtransistor offers both drain‐ and gate‐tunable nonvolatile memory functions, which efficiently emulates the long‐term potentiation/depression, spike‐amplitude, and spike‐timing‐dependent plasticity of biological synapses. Moreover, the gate tunability function that is not achievable in two‐terminal memristors, enables significant bipolar resistive states switching up to four orders‐of‐magnitude and high cycling endurance. First‐principles calculations reveal a new resistive switching mechanism driven by the diffusion of double sulfur vacancy perpendicular to the MoS₂ grain boundary, leading to a conducting switching path without the need for a filament forming process. The seamless integration of multiterminal memtransistors may offer another degree‐of‐freedom to tune the synaptic plasticity by a third gate terminal for enabling complex neuromorphic learning.     

Memristor with Ag‐Cluster‐Doped TiO2 Films as Artificial Synapse for Neuroinspired Computing

Memristor, based on the principle of biological synapse, is recognized as one of the key devices in confronting the bottleneck of classical von Neumann computers. However, conventional memristors are difficult to continuously adjust the conduction and dutifully mimic the biosynapse function. Here, TiO₂ films with self‐assembled Ag nanoclusters implemented by gradient Ag dopant are employed to achieve enhanced memristor performance. The memristors exhibit gradual both potentiating and depressing conduction under positive and negative pulse trains, which can fully emulate excitation and inhibition of biosynapse. Moreover, comprehensive biosynaptic functions and plasticity, including the transition from short‐term memory to long‐term memory, long‐term potentiation and depression, spike‐timing‐dependent plasticity, and paired‐pulse facilitation, are implemented with the fabricated memristors in this work. The applied pulses with a width of hundreds of nanoseconds timescale are beneficial to realize fast learning and computing. High‐resolution transmission electron microscopy observations clearly demonstrate that Ag clusters redistribute to form Ag conductive filaments between Ag and Pt electrode under electrical field at ON‐state device. The experimental data confirm that the oxides doped with Ag clusters have the potential for mimicking biosynaptic behavior, which is essential for the further creation of artificial neural systems.     

Intelligent Molecular Searcher from Logic Computing Network Based on Eu(III) Functionalized UMOFs for Environmental Monitoring

By taking advantage of facile preparation and sensitive recognition capacity, the first example of a fluorescence system based on Eu(III) functionalized UiO(bpdc) (UMOFs) has been constructed for effective combination of ions recognition and logic computing. All the ions, including Hg²⁺, Ag⁺, and S^2? in the system are water harmful, which can be recognized through affecting energy transfer or framework structure. By the self‐assembling, competing and connecting with each other, Eu(III)@UMOFs and the ions have achieved the implementation of Boolean logic network system connecting the elementary logic operations (NOR, INH, and IMP) and integrative logic operation (OR + INH), also obtaining computing keypad‐lock security system by sequential logic operation. To deal with uncertain information in the analog region of nonlinear response (fluorescence and concentration), soft computation through the formulation of fuzzy logic operation has been constructed. On the basis of Boolean logic and fuzzy logic, one intelligent molecular searcher can be realized by taking chemical events (Hg²⁺, Ag⁺, and S^2?) as programmable words and chemical interactions as syntax. Considering the particularity of all the input ions, the approach is helpful in developing the advanced logic program based on Eu(III)@UMOFs for application in environmental monitoring.     

Nanoscale Resistive Switching in Amorphous Perovskite Oxide (a‐SrTiO3) Memristors

Memristive devices are the precursors to high density nanoscale memories and the building blocks for neuromorphic computing. In this work, a unique room temperature synthesized perovskite oxide (amorphous SrTiO₃: a‐STO) thin film platform with engineered oxygen deficiencies is shown to realize high performance and scalable metal‐oxide‐metal (MIM) memristive arrays demonstrating excellent uniformity of the key resistive switching parameters. a‐STO memristors exhibit nonvolatile bipolar resistive switching with significantly high (10³–10⁴) switching ratios, good endurance (>10⁶I–V sweep cycles), and retention with less than 1% change in resistance over repeated 10⁵ s long READ cycles. Nano‐contact studies utilizing in situ electrical nanoindentation technique reveal nanoionics driven switching processes that rely on isolatedly controllable nano‐switches uniformly distributed over the device area. Furthermore, in situ electrical nanoindentation studies on ultrathin a‐STO/metal stacks highlight the impact of mechanical stress on the modulation of non‐linear ionic transport mechanisms in perovskite oxides while confirming the ultimate scalability of these devices. These results highlight the promise of amorphous perovskite memristors for high performance CMOS/CMOL compatible memristive systems.     

一种基于RRAM和表决器逻辑的新型乘法器

计算机系统快速发展,逐步进入大内存系统时代。但存储瓶颈的问题严重制约着计算机系统的进一步发展。结合RRAM这种非易失性存储器,设计了一种可以实现存储与计算一体化的逻辑运算架构。首次利用多数表决器逻辑实现了一种新型的全加器和乘法器,并给出了一种新型的逻辑运算单元架构。试验结果表明,该多数表决器逻辑实现全加器仅需4个步骤、3个单元,实现乘法器仅需24个步骤、42个单元,远远低于目前其他逻辑所需的步骤数和单元数。     

Bienenstock,Cooper, and Munro Learning Rules Realized in Second‐Order Memristors with Tunable Forgetting Rate

Memristors with synaptic functions are very promising for developing artificial neural networks. Compared with the extensively reported spike‐timing‐dependent plasticity (STDP), Bienenstock, Cooper, and Munro (BCM) learning rules, the most accurate model of the synaptic plasticity to date, are more compatible with the neural computing system; however, the progress in the realization of the BCM rules has been quite limited. The realized BCM rules so far mostly performs just the spike‐rate‐dependent plasticity (SRDP), however, without a tunable sliding frequency threshold, because the memristors used to realize the BCM rules do not have tunable forgetting rates. In this work, the BCM rules with a tunable sliding frequency threshold are biorealistically implemented in SrTiO₃‐based second‐order memristors; the forgetting rate of the memristors is tuned by engineering the electrode/oxide interface through controlling the electrode composition. The approach of this work is precise and efficient, and the biorealistic implementation of the BCM rules in memristors improves the efficiency of the neural network for the artificial intelligent system.     

Non-Volatile Electrolyte-Gated Transistors Based on Graphdiyne/MoS2 with Robust Stability for Low-Power Neuromorphic Computing and Logic-In-Memory

Artificial synapses are the key building blocks for low-power neuromorphic computing that can go beyond the constraints of von Neumann architecture. In comparison with two-terminal memristors and three-terminal transistors with filament-formation and charge-trapping mechanisms, emerging electrolyte-gated transistors (EGTs) have been demonstrated as a promising candidate for neuromorphic applications due to their prominent analog switching performance. Here, a novel graphdiyne (GDY)/MoS₂-based EGT is proposed, where an ion-storage layer (GDY) is adopted to EGTs for the first time. Benefitting from this Li-ion-storage layer, the GDY/MoS₂-based EGT features a robust stability (variation < 1% for over 2000 cycles), an ultralow energy consumption (50 aJ µm⁻²), and long retention characteristics (>10⁴ s). In addition, a quasi-linear conductance update with low noise (1.3%), an ultrahigh G_max/G_min ratio (10³), and an ultralow readout conductance (<10 nS) have been demonstrated by this device, enabling the implementation of the neuromorphic computing with near-ideal accuracies. Moreover, the non-volatile characteristics of the GDY/MoS₂-based EGT enable it to demonstrate logic-in-memory functions, which can execute logic processing and store logic results in a single device. These results highlight the potential of the GDY/MoS₂-based EGT for next-generation low-power electronics beyond von Neumann architecture.     

Artificial Optoelectronic Synapses Based on TiNxO2–x/MoS2 Heterojunction for Neuromorphic Computing and Visual System

Being capable of dealing with both electrical signals and light, artificial optoelectronic synapses are of great importance for neuromorphic computing and are receiving a burgeoning amount of interest in visual information processing. In this work, an artificial optoelectronic synapse composed of Al/TiN_xO_2–x/MoS₂/ITO (H-OSD) is proposed and experimentally realized. The H-OSD can enable basic electrical voltage-induced synaptic functions such as the long/short-term plasticity and moreover the synaptic plasticity can be electrically adjusted. In response to the light stimuli, versatile advanced synaptic functions including long/short-term memory, and learning-forgetting-relearning are successfully demonstrated, which could enhance the information processing capability for neuromorphic computing. Most importantly, based on these light-induced salient features, a 4 × 4 synapse array is developed to show the potential application of the proposed H-OSD in constructing artificial visual system. It is shown that the perceiving and memorizing of the light information that are respectively relevant to the visual perception and visual memory functions, can be readily attained through tuning of the light intensity and the number of illuminations. As such, the proposed optoelectronic synapse shows great potentials in both neuromorphic computing and visual information processing and will facilitate the applications such as electronic eyes and light-driven neurorobotics.     

Boolean Logic Computing Based on Neuromorphic Transistor

General-purpose computers usually use logic gate computing units based on complementary metal oxide semiconductors (CMOS). Due to the separate memory and computing units in Von Neumann architecture, data transmission requires great energy and time consumption. Developing novel neuromorphic devices and comprehensively investigating their logical computing mode are crucial to achieve high-performance and low-power neuromorphic computation. Here, a systematic summary of Boolean logic computing based on emerging neuromorphic transistors is presented. This summary encompasses logical operation modes, materials, device structures, and working mechanisms. The input mode of Boolean logic operation is classified into electrical input, optical input, and synergistic optical/electrical input. Besides, additional modulation strategies to construct programmable logic functions by electrical, optical, and thermal signals are also summarized. These strategies hold great significance as they enable dynamic reconfiguration of logic operations and provide neuromorphic devices with decision-making capabilities. Finally, the application prospects and current challenges to Boolean logic computing based on dendritic integration are discussed from the aspects of device integration, synergistic input/modulation modes, auxiliary peripheral circuit, software/hardware system, etc. It is believed that comprehensive investigations on neuromorphic Boolean logic operations are crucial to push forward the development of future neuromorphic computing toward high efficiency and high integration density.     

A cellular computing architecture for parallel memristive stateful logic

We present a cellular memristive stateful logic computing architecture and demonstrate its operation with computational examples such as vectorized XOR, circular shift, and content-addressable memory. The considered architecture can perform parallel elementary memristor programming and stateful logic operations, namely implication and converse nonimplication. The topology of the crossbar structure used for computing can be dynamically reconfigured, enabling combinations of local and global operations with varying granularity. In the CMOS cells used for controlling the memristors, we apply a new type of capacitive keeper circuit, which allows for energy efficient implementation of logic operations. The correct operation of this architecture is verified by detailed HSPICE simulations for a structure containing eight memristive crossbars. This work presents a hardware platform which enables future work on parallel stateful computing.     

Silicon‐Based Current‐Controlled Reconfigurable Magnetoresistance Logic Combined with Non‐Volatile Memory

Silicon‐based complementary metal‐oxide‐semiconductor (CMOS) transistors have achieved great success. However, the traditional development pathway is approaching its fundamental limits. Magnetoelectronics logic, especially magnetic‐field‐based logic, shows promise for surpassing the development limits of CMOS logic and arouses profound attentions. Existing proposals of magnetic‐field‐based logic are based on exotic semiconductors and difficult for further technological implementation. Here, a kind of diode‐assisted geometry‐enhanced low‐magnetic‐field magnetoresistance (MR) mechanism is proposed. It couples p‐n junction's nonlinear transport characteristic and Lorentz force by geometry, and shows extremely large low‐magnetic‐field MR (>120% at 0.15 T). Further, it is applied to experimentally demonstrate current‐controlled reconfigurable magnetoresistance logic on the silicon platform at room temperature. This logic device could perform all four basic Boolean logic including AND, OR, NAND and NOR in one device. Combined with non‐volatile magnetic memory, this logic architecture with unique magnetoelectric properties has the advantages of current‐controlled reconfiguration, zero refresh consumption, instant‐on performance and would bridge the processor‐memory gap. Our findings would pave the way in silicon‐based magnetoelectronics and offer a route to make a new kind of microprocessor with potential of high performance.     

Donor‐Induced Performance Tuning of Amorphous SrTiO3 Memristive Nanodevices: Multistate Resistive Switching and Mechanical Tunability

Metal–oxide valence‐change memristive devices are the key contenders for the development of multilevel nonvolatile analog memories and neuromorphic computing architectures. Reliable low energy performance and tunability of nonlinear resistive switching dynamics are essential to streamline the high‐density circuit level integration of these devices. Here, manipulation of room temperature‐synthesized defect chemistry is employed to enhance and tune the switching characteristics of high‐performance amorphous SrTiO₃ (a‐STO) memristors. Substitutional donor (Nb) doping with low concentrations in the a‐STO oxide structure allows extensive improvements in energy requirements, stability, and controllability of the memristive performance, as well as field‐dependent multistate resistive switching. Evidence is presented that room temperature donor doping results in a modified insulator oxide where dislocation sites act as charge carrier modulators for low energy and multilevel operation. Finally, the performance of donor‐doped a‐STO‐based memristive nanodevices is showcased, with the possibility of mechanical modulation of the nonlinear memristive characteristics of these devices demonstrated. These results highlight the potential of donor‐doped a‐STO nanodevices for high‐density integration as analog memories and multifunctional alternative logic elements.