An analytical gate tunneling current model for MOSFETs

Gate tunneling current of MOSFETs is an important factor in modeling ultra small devices. In this paper, gate tunneling in present-generation MOSFETs is studied. In the proposed model, we calculate the electron wave function at the semiconductor-oxide interface and inversion charge by treating the inversion layer as a potential well, including some simplifying assumptions. Then we compute the gate tunneling current using the calculated wave function. The proposed model results have an excellent agreement with experimental results in the literature.     

An analytical avalanche breakdown model for double gate MOSFET

An analytical model of avalanche breakdown for double gate (DG) metal-oxide-semiconductor field-effect transistor (MOSFET) is presented. First of all, the effective mobility (μ_eff) model is defined to replace the constant mobility model. The channel length modulation (CLM) effect is modeled by solving the Poisson’s equation. The avalanche multiplication factor (M) is calculated using the length of saturation region (ΔL). It is shown that the avalanche breakdown characteristics calculated from the analytical model agree well with commercially available 2D numerical simulation results. Based on the results, the reliability of the DG MOSFET can be estimated using the proposed analytical model.     

An analytical compact model for Schottky-barrier double gate MOSFETs

An analytical and explicit compact model for undoped symmetrical silicon double gate MOSFETs (DGMOSFETs) with Schottky barrier (SB) source and drain is presented. The SB MOSFET can be studied as a traditional MOSFET where the doped source/drain regions have been replaced by a metal contact. Due to particular features of this new structure, the main transport mechanisms of these devices differ from those found in traditional MOSFETs. The model developed in this paper is based on a previously published DGMOSFET model which has been extended to include the characteristic tunneling transport mechanisms of SB MOSFET.The proposed model reproduces the well known ambipolar behavior found in SB MOSFET for a wide range of metal source and drain contacts specified through different values of their work function. The model has been validated with numerical data obtained by means of the 2D ATLAS simulator, where a SB DGMOSFET structure has been defined and characterized in order to obtain the transfer and output characteristics for several bias configurations. Devices with two channel lengths (2 μm and 3 μm) has been simulated and modeled.     

An analytical model for fully depleted single gate SOI MOS transistors including lattice temperature effects

An analytical model for fully depleted SOI MOSFETs is presented. Major small geometry effects such as carrier velocity saturation, mobility degradation, channel length modulation, and drain induced barrier lowering are included. Device self heating due to low thermal conductivity of a buried oxide layer is included in carrier mobility modelling. Thermal effects are also included in threshold voltage expression. Source, drain, and channel resistance effects are also included. Modelled results are then compared to available measured data and are shown to be in very good agreement.     

An analytical model for back-gate effects on ultrathin-film SOIMOSFET's

An analytical model including the semiconducting substrate effect for silicon-on-insulator (SOI) MOSFET threshold and subthreshold operation is presented. The potential drop across the substrate tends to reduce the front-gate threshold voltage as well as subthreshold swing. However, if the substrate or the back-gate surface is accumulated, the substrate effects can be neglected. Five comprehensive operation regions under various bias conditions are distinguished and discussed for the first time     

A high-frequency nonquasi-static analytical model including gate leakage effects for on-chip decoupling capacitors

This paper presents a compact model for on-chip decoupling capacitors (decaps) including gate-oxide leakage. The model makes use of only four parameters, namely, channel resistance, gate-oxide capacitance, and two parameters to quantify gate-oxide leakage, to predict the static and dynamic response of decaps. Quality indices have been defined to enable development of decap design guidelines and evaluation of performance of such capacitors. The model shows how the gate leakage and longer channel lengths severely affect the performance of on-chip decaps for both low and high frequencies. The model also shows that lumped models of decaps at high frequencies fail and have to be substituted by a distributed model. Application of the model uncovers tradeoffs for thin- and thick-oxide capacitors in an available 90-nm CMOS technology. For a general-purpose technology, a reference capacitance value has been realized using decaps with a discrete width and length. Our model predicts that thick-oxide n-channel (p-channel) capacitors require /spl sim/3.37x (/spl sim/3.31x) more silicon area and /spl sim/1.70x (/spl sim/1.17x) degraded time response as compared to their thin-oxide versions. The time response is even more degraded (/spl prop/L/sup 2/) when longer channel decaps are used. This paper contributes by defining performance benchmarks for decaps.     

An analytical drain current model for graded channel cylindrical/surrounding gate MOSFET

In the present paper, a comprehensive drain current model incorporating various effects such as drain-induced barrier lowering (DIBL), channel length modulation and impact ionization has been developed for graded channel cylindrical/surrounding gate MOSFET (GC CGT/SGT) and the expressions for transconductance and drain conductance have been obtained. It is shown that GC design leads to drain current enhancement, reduced output conductance and improved breakdown voltage. The effectiveness of GC design was examined by comparing uniformly doped (UD) devices with GC devices of various L₁/L₂ ratios and doping concentrations and it was found that GC devices offer superior characteristics as compared to the UD devices. The results so obtained have been compared with those obtained from 3D device simulator ATLAS and are found to be in good agreement.     

An analytical programming model for the drain-coupling source-side injection split gate flash EEPROM

This paper presents a compact and accurate analytical model for evaluating the programming behaviors of the drain-coupling source-side injection (SSI) split-gate Flash memory. Starting with the bias-dependent and time-varying drain coupling ratio, a programming model is developed on the basis of the constant barrier height approximation and Lucky-electron model to express the full transient injection current, peak lateral electric field, and storage charge as functions of technological, physical, and electrical parameters. The extracted re-direction mean-free path of the SSI device is smaller than that of the channel hot-electron counterpart by one order of magnitude, which provides the physical intuition for the derived high injection efficiency of around 2/1000. The intrinsic coupling ratio depends only on technological parameters and is presented as the design index of the device. The usefulness of this model is its ability of constructing the complete operation plot of the time-to-program versus the programming voltage for various reliability windows and tunable technological parameters. Besides, the variance of the read current distribution of a memory array is also analytically predicted.     

An analytical expression for MOSFET gate leakage current

Integral expressions for the gate leakage current in a MOSFET are derived on the basis of Schottky emission across the gate insulator and on the internal self-heating due to device power dissipation. Computer evaluation of these integrals yields gate leakage current curves that exhibit the same characteristics observed experimentally.     

An explicit analytical charge-based model of undoped independent double gate MOSFET

This paper describes an explicit analytical charge-based model of an undoped independent double gate (DG) MOSFET. This model is based on Poisson equation resolution and field continuity equations. Without any fitting parameter or charge sheet approximation, it provides explicit analytical expressions of both inversion charge and drain current considering long undoped transistor. Consequently, this is a fully analytical and predictive model allowing describing planar DG MOSFET as well as FinFET structures. The validity of this model is demonstrated by comparison with Atlas simulations.     

An analytical drain current model for dual material engineered cylindrical/surrounded gate MOSFET

In this paper, a drain current model incorporating drain-induced barrier lowering (DIBL) has been developed for Dual Material gate Cylindrical/Surrounding gate MOSFET (DMG CGT/SGT MOSFET) and the expressions for transconductance and drain conductance have been obtained. It is shown that DMG design leads to drain current enhancement and reduced output conductance. The effectiveness of DMG design was scrutinized by comparing with single metal gate (SMG) CGT/SGT MOSFET. Moreover, the effect of technology parameters variations workfunction difference has also been presented in terms of gate bias, drain bias, transconductance and drain conductance. Results reveal that the DMG SGT/CGT devices offer superior characteristics as compared to single material gate CGT/SGT devices. A good agreement between modeled and simulated results has also been obtained thus providing the validity of proposed model.     

An analytical model for high-low-emitter (HLE) solar cells in concentrated sunlight

A current-voltage characteristic is derived for the high-low emitter (HLE) solar cell in concentrated sunlight. For high-level injection, the ambipolar approach is used to yield the complete information of the low emitter concentration region, including the ohmic drop, the Dember voltage, the minority carrier current density, the minority-carrier distribution and the electric field distribution. High doping effects including Auger recombination and bandgap narrowing are considered. The dependences of short-circuit current, open-circuit voltage, fill factor and conversion efficiency on the variations of the geometrical dimensions and material parameters are discussed in detail for silicon single crystal materials. It is shown that the maximum conversion efficiency of 22% at 100 suns AMO can be obtained for silicon high-low emitter solar cell.     

An analytical back gate bias dependent threshold voltage model forSiGe-channel ultrathin SOI PMOS devices

An analytical threshold voltage model for SiGe-channel ultrathin SOI PMOS devices is presented. As confirmed by the PISCES simulation results, the analytical model provides a good prediction on the threshold voltage. According to the analytical-formula, depending on the back gate bias, the SiGe-channel SOI PMOS device may have a conduction channel at the top or the bottom of the SiGe channel or at the top of the field oxide     

一种VOD系统的分析模型

对全连网络的分布式视频点播系统进行了性能分析，提出了一种VOD系统的分析模型，可以利用这一模型计算视频请球发生拥塞的概率以及网络的带宽要求，同时还可以得到在通信和存储费用两者之间的一个折衷方案。     

An analytical model for studies of soil modification effects onground penetrating radar

Due to the similar dielectric constants of buried nonmetallic targets and dry soils, it is often difficult to detect and identify nonmetallic targets with ground penetrating radar. The addition of properly chosen chemical agents to modify soil properties can potentially provide improved detection. Previous studies using waveguide experiments have shown that the addition of water improves dielectric contrasts but also increases loss so that target detectability is not necessarily improved. The addition of liquid nitrogen to wet soils can reduce background medium loss and restore target visibility, and waveguide studies of target detection through controlled depth of nitrogen penetration have shown that scattering can be significantly enhanced if an optimal amount of nitrogen is added. A simple physical optics (PO) model for scattering from a three-dimensional target buried below a half space is presented, and it is shown that the radar cross section of the target depends on the dielectric contrast with and attenuation in the background medium. The model is validated through comparison with a method of moments code and found to yield accurate predictions for near normal incidence geometries. Analytical studies of target detection with two concepts of soil modification are then described: obtaining an “optimal” homogeneous soil water content and the addition of a large quantity of water along with an optimal amount of liquid nitrogen. Finally, initial tests of these soil modification techniques with a dielectric rod antenna ground penetrating radar are performed and demonstrate that the addition of liquid nitrogen to excessively wet soils can reduce loss and enhance target visibility     

An analytical SiGe-base HBT model and its effects on a BICMOSinverter circuit

Reports an analytical model for SiGe-base HBTs with a graded germanium profile in the base region and its effects on the rise time in a related BiCMOS inverter circuit. According to the model results, for an HBT with a graded germanium profile, a peak germanium concentration of 15% at the base/collector junction is sufficient to generate an optimized forward transit time. For a BiCMOS inverter using linearly graded SiGe-base HBT's with a peak germanium concentration larger than 15% at the base/collector, its rise time is not strongly correlated to its peak germanium concentration     

An analytical dishing and step height reduction model for chemical mechanical planarization (CMP)

An analytical model for dishing and step height reduction in chemical mechanical planarization (CMP) is presented. The model is based on the assumption that at the feature scale, high areas on the wafer experience higher pressure than low areas. A Prestonian material removal model is assumed. The model delineates how dishing and step height reduction depend on slurry properties (selectivity and Preston's constants), pad characteristics (stiffness and bending ability), polishing conditions (pressure, relative velocity and overpolishing) and wafer surface geometry (linewidth, pitch and pattern density). Model predictions are in good agreement with existing experimental observations. The present model facilitates understanding of the CMP process at the feature scale. Based on the proposed model, design avenues for decreasing dishing and increasing the speed of step height reduction may be explored through modification of appropriate parameters for slurry, pad and polishing conditions. The proposed model may also be used as a design tool for pattern layout to optimize the performance of the CMP process.     

Compact analytical model for single gate AlInSb/InSb high electron mobility transistors

We have developed a 2D analytical model for the single gate Al In Sb/In Sb HEMT device by solving the Poisson equation using the parabolic approximation method.The developed model analyses the device performance by calculating the parameters such as surface potential,electric field distribution and drain current.The high mobility of the Al In Sb/In Sb quantum makes this HEMT ideal for high frequency,high power applications.The working of the single gate Al In Sb/In Sb HEMT device is studied by considering the variation of gate source voltage,drain source voltage,and channel length under the gate region and temperature.The carrier transport efficiency is improved by uniform electric field along the channel and the peak values near the source and drain regions.The results from the analytical model are compared with that of numerical simulations(TCAD) and a good agreement between them is achieved.