High average power dissipation in helix tubes

By precisely shrinking the glass envelope around the helix to a controlled depth, thus providing an exceptionally low thermal impedance to the outside of the envelope, and passing a suitable coolant over the envelope, it has been found that the power dissipation capability of helix circuits can be extended by more than one order of magnitude. A qualitative analysis indicates that the heat transfer characteristics should be as good as the experimental results indicate.     

Least-square estimation of average power in digital CMOS circuits

The estimation of average-power dissipation of a circuit through exhaustive simulation is impractical due to the large number of primary inputs and their combinations. In this work, two algorithms based on least square estimation are proposed for determining the average power dissipation in complementary metal-oxide-semiconductor (CMOS) circuits. Least square estimation converges faster by attempting to minimize the mean square error value during each iteration. Two statistical approaches namely, the sequential least square (SLS) estimation and the recursive least square estimation are investigated. The proposed methods are distribution independent in terms of the input samples, unbiased and point estimation based. Experimental results presented for the MCNC'91 and the ISCAS'89 benchmark circuits show that the least square estimation algorithms converge faster than other statistical techniques such as the Monte Carlo method and the DIPE     

Using SAT-based techniques in power estimation

Recent algorithmic advances in Boolean satisfiability (SAT), along with highly efficient solver implementations, have enabled the successful deployment of SAT technology in a wide range of applications domains, and particularly in electronic design automation (EDA). SAT is increasingly being used as the underlying model for a number of applications in EDA. This paper describes how to formulate two problems in power estimation of CMOS combinational circuits as SAT problems or 0–1 integer linear programming (ILP). In these circuits, it was proven that maximizing dissipation is equivalent to maximizing gate output activity, appropriately weighted to account for differing load capacitances. The first problem in this work deals with identifying an input vector pair that maximizes the weighted circuit activity. In the second application we attempt to find an estimate for the maximum power-up current in circuits where power cut-off or gating techniques are used to reduce leakage current. Both problems were successfully formulated as SAT problems. SAT-Based and generic Integer Linear Programming (ILP) solvers are then used to find a solution. The experimental results obtained on a large number of benchmark circuits provide promising evidence that the proposed complete approach is both viable and useful and outperforms the random approach.     

Wavelet thresholding techniques for power spectrum estimation

Estimation of the power spectrum S(f) of a stationary random process can be viewed as a nonparametric statistical estimation problem. We introduce a nonparametric approach based on a wavelet representation for the logarithm of the unknown S(f). This approach offers the ability to capture statistically significant components of ln S(f) at different resolution levels and guarantees nonnegativity of the spectrum estimator. The spectrum estimation problem is set up as a problem of inference on the wavelet coefficients of a signal corrupted by additive non-Gaussian noise. We propose a wavelet thresholding technique to solve this problem under specified noise/resolution tradeoffs and show that the wavelet coefficients of the additive noise may be treated as independent random variables. The thresholds are computed using a saddle-point approximation to the distribution of the noise coefficients     

Statistical analysis and spectral estimation techniques forone-dimensional chaotic signals

Signals arising out of nonlinear dynamics are compelling models for a wide range of both natural and man-made phenomena. In contrast to signals arising out of linear dynamics, extremely rich behavior is obtained even when we restrict our attention to one-dimensional (1-D) chaotic systems with certain smoothness constraints. An important class of such systems are the so-called Markov maps. We develop several properties of signals obtained from Markov maps and present analytical techniques for computing a broad class of their statistics in closed form. These statistics include, for example, correlations of arbitrary order and all moments of such signals. Among several results, we demonstrate that all Markov maps produce signals with rational spectra, and we can therefore view the associated signals as “chaotic ARMA processes,” with “chaotic white noise” as a special case. Finally, we also demonstrate how Markov maps can be used to approximate to arbitrary accuracy the statistics any of a broad class of non-Markov chaotic maps     

Statistical power estimation of CMOS logic circuits with variableerrors

A statistical power estimation method is proposed where estimation time and accuracy can be balanced by assigning smaller (higher) errors to the nodes with higher (lower) power dissipation. To determine the errors, a quadratic programming based problem is formulated. Experimental results show a drastic reduction in the number of simulation patterns compared to previous methods     

A survey of power estimation techniques in VLSI circuits

With the advent of portable and high-density microelectronic devices, the power dissipation of very large scale integrated (VLSI) circuits is becoming a critical concern. Accurate and efficient power estimation during the design phase is required in order to meet the power specifications without a costly redesign process. In this paper, we present a review of the power estimation techniques that have recently been proposed     

GA—BASED MAXIMUM POWER DISSIPATION ESTIMATION OF VLSI SEQUENTIAL CIRCUITS OF ARBITRARY DELAY MODELS

In this paper,the glitching activity and process variations in the maximum power dissipation estimation of CMOS circulits are introduced.Given a circuit and the gate library,a new Genetic Algorithm (GA)-based technique is developed to determine the maximum power dissipation from a statistical point of view.The simulation on ISCAS-89 benchmarks shows that the ratio of the maximum power dissipation with glitching activity over the maximum power under zero-delay model ranges from 1.18 to 4.02.Compared with the traditional Monte Carlo-based technique,the new approach presented in this paper is more effective.     

Adaptive power techniques for blind channel estimation in CDMA systems

The problem of blind adaptive channel estimation in code-division multiple access (CDMA) systems is considered. Motivated by the iterative power method, which is used in numerical analysis for estimating singular values and singular vectors, we develop recursive least squares (RLS) and least mean squares (LMS) subspace-based adaptive algorithms in order to identify the impulse response of the multipath channel. The schemes proposed in this paper use only the spreading code of the user of interest and the received data and are therefore blind. Both versions (RLS and LMS) exhibit rapid convergence combined with low computational complexity. With the help of simulations, we demonstrate the improved performance of our methods as compared with the already-existing techniques in the literature.     

节省功耗的LED驱动器

一种驱动高亮度LED的方法是采用标准的降压补偿转换器(图1).检测电阻器Rs产生一个反馈电压VFB,它根据公式RS=VFB/ILED设定了需要的LED电流ILED.不幸的是,大多数补偿转换器需要一个1V量级的相对较高反馈电压,这个电压在检测电阻器上的耗电过大(PSENSE=VFB×ILED).     

High average power harmonic generation

High average power frequency conversion using solid-state nonlinear materials is discussed. Recent laboratory experience and new developments in design concepts show that current technology, a few tens of watts, may be extended by several orders of magnitude. For example, using KD*P, efficient doubling (> 70 percent) of Nd:YAG at average powers approaching 100 KW is possible; for doubling to the blue or UV regions the average power may approach 1 MW. Configurations using segmented apertures permit essentially unlimited scaling of average power. High average power is achieved by configuring the nonlinear material as a set of thin plates with a large ratio of surface area to volume, and cooling the exposed surfaces with a flowing gas. The design and material fabrication of such a harmonic generator is well within current technology.     

Parameter estimation of two-dimensional moving average randomfields

This paper considers the problem of estimating the parameters of two-dimensional (2-D) moving average random (MA) fields. We first address the problem of expressing the covariance matrix of nonsymmetrical half-plane, noncausal, and quarter-plane MA random fields in terms of the model parameters. Assuming the random field is Gaussian, we derive a closed-form expression for the Cramer-Rao lower bound (CRLB) on the error variance in jointly estimating the model parameters. A computationally efficient algorithm for estimating the parameters of the MA model is developed. The algorithm initially fits a 2-D autoregressive model to the observed field and then uses the estimated parameters to compute the MA model. A maximum-likelihood algorithm for estimating the MA model parameters is also presented. The performance of the proposed algorithms is illustrated by Monte-Carlo simulations and is compared with the Cramer-Rao bound     

Estimating power dissipation in VLSI circuits

With the shift to low power IC design for personal computing and communication applications, designers' priorities turn to accurate and efficient estimation of power consumption in ICs. Traditional current and power estimation techniques based on a SPICE-like simulation do not provide the necessary efficiency for such an application, and thus new approaches have been recently proposed. In this, the first of a series of articles that reflect the new orientation of this column, Professor Farid Najm of the University of Illinois at Urbana-Champaign presents an overview of different techniques for estimating power consumption in large-scale IC designs. He also discusses computer aided design tools to help in the task     

Electric load estimation techniques for high-speed railway (HSR)traction power systems

As modern (e.g., high-speed railway (HSR)) traction power systems (TPS) become more and more comparable in size to grid capacity, dynamic load estimation (DLE) has become not just an important tool for TPS planning, but also an indispensable tool for utility companies to evaluate traction system's accurate unbalance impact on the grid. Without a good DLE algorithm, unbalance impact can easily be underestimated and causes power system instabilities. A good DLE must be carried out with a power engineering perspective while incorporating real railway operating principles and practices. However, due to the lack of well-documented literature on this subject and the interdisciplinary nature of DLE, it usually presents a difficult task for the system planner. As such, this paper presents an accurate DLE algorithm capable of achieving these goals, while providing a complete coverage of all the principles and parameters used during the derivation. The methodology developed here is applicable to HSR TPS and to conventional railways as well with minor modifications. Unbalance impact evaluation of the new Taiwan HSR is presented in the last part of the paper, while further application of the proposed DLE algorithm is also proposed     

基于矢量平均的信道估计算法

提出一种适用于DS-CDMA无线通信系统的低计算量而性能良好的信道估计算法。在DS-CDMA系统中，当接收信号经过解扩或多用户检测等时域预处理后，可以认为干扰大大减弱、期望信号在处理后的信号中占主要地位。这样，用预处理后信号相关阵的最大特征值对应的特征矢量可以很好地近似期望信号的信道矢量。但是，直接特征分解需要很大的计算量，特征跟踪计算量较低，但瞬态性能较差。本文提出一种基于相关矩阵列矢量平均的信道估计算法，该算法不需要特征分解或跟踪。仿真结果表明：新算法在降低计算量的情况下可以获得同直接特征分解方法几乎相同的性能。     

Heat dissipation in kilowatt fiber power amplifiers

The heat dissipation and output power characteristics of kilowatt ytterbium-doped double-clad (YDDC) fiber power amplifiers are investigated through numerical modeling. Solutions to facilitate heat dissipation and reduce operating temperature in YDDC fibers under bi-directional end pump and distributed pump are presented and compared. It is shown that the heat dissipation issue in kilowatt fiber power amplifiers can be effectively solved by optimizing the arrangement of pump powers, pump absorption coefficients, and fiber lengths.     

Internally varying analog circuits minimize power dissipation

We review several techniques that make possible the dynamic variation of analog circuits internally, without affecting their input-output characteristics. Particular attention is paid to companding (dynamic gain scaling), dynamic impedance scaling, dynamic biasing, and dynamic structure variation. A mixture of more than one of these techniques is appropriate in some cases. We use filters as a specific example of dynamical analog circuits and place particular emphasis on avoiding or eliminating transients at the output of such circuits, which would normally occur due to such dynamic variations. By allowing for dynamic internal variations, the power dissipation of such circuits can be lowered and can be made to depend on how demanding the task at hand is. This allows for large savings of energy drain over time, thus making possible long battery life in portable equipment.     

An 85-watt dissipation silicon power transistor

Production prototype silicon transistors have been made using large area diffused base structures. Simultaneous diffusion of gallium and phosphorus is used to form the diffused base structures. The geometry and doping level of the structure can be controlled by varying the impurity source composition and temperature. The phosphorus surface concentration is a much less rapidly varying function of source temperature than is the gallium surface concentration, and is determined primarily by the source composition. Two line base contacts, one line emitter contact and a collector contact, are attached to the wafer by using appropriate alloys in conjunction with titanium or tungsten back-up plates. The structure then is encapsulated in a hermetically sealed package. The transistors are capable of dissipating 85 watts at a 25°C mounting base temperature and have been used in circuits, as is described, to deliver 25 watts Class A, 80 watts Class B in push-pull operation and peak currents of 10 amperes in pulsed operation.