显卡芯片不能正常显示的分析

计算机最重要的部件之一是显卡芯片。由于其显示异常常常造成不必要的麻烦,对其不能正常显示的原因做一分析是很有必要的。按照严格的失效分析流程、使用芯片失效分析的方法准快速的查找的显卡芯片不能正常显示的原因对于计算机的集成制造和显卡芯片的品质提高有着很好的帮助。由于显卡芯片是一个高精密的半导体器件,因此使用半导体器件失效分析的基本流程的改进流程来分析显卡芯片的失效原因。     

基于ESD的芯片失效分析

提出了一种基于静电放电（ESD）的芯片可靠性测试及失效分析流程,并且以芯片静电放电测试为例详细阐述了芯片失效分析的过程与实现方法,包括电性失效分析和物理失效分析。通过专用仪器对芯片进行了静电放电测试,并利用红外微光显微镜（EMMI）及砷化镓铟微光显微镜（InGaAs）等实现芯片故障定位,从而确定芯片的失效模式与失效机理,实验证明该方法切实有效,这种失效分析的结果对优化集成电路的抗静电设计以及外部工作环境的完善都具有重要的参考意义。     

关于芯片失效分析方法的讨论

主要通过实践经验总结了一种关于芯片失效分析流程和方法,用于应对集成电路研发、生产和使用过程中不可避免的失效问题的分析,满足用户对高品质、高可靠性产品的要求。通过对芯片失效的充分剖析,从简到繁、从表面破损到内部具体电路损坏,通用性强,分析逐步深入,在一定程度上可以节约分析成本,快捷有效地找到失效具体位置、失效原因以及预防措施。     

二极管器件漏电失效分析及改进措施

通过外观检查、开盖检查、 I/V曲线测试、微光显微镜观测和扫描电子显微镜检查等分析手段,结合芯片结构,对漏电失效的二极管器件进行分析,定位器件的失效位置,确定器件漏电失效的机理。形成一套针对半导体分立器件的失效分析流程,并对漏电失效模式提出了相应的优化改进措施。     

电视背光LED灯失效机理和分析方法

基于直下式LED发光电视,从封装失效、芯片失效、热应力失效、电应力失效等方面分析了电视背光系统中发光二极管(LED)器件的失效机理和改进措施,同步提出安全性失效和可靠性失效的理论概念,并对电视整机系统的LED温升控制和LED驱动电流控制方面进行了分析,提出了实用的LED失效分析流程.     

SiP组件中芯片失效机理与失效分析

由于分析手段与分析设备的限制,系统级封装（SiP）组件的芯片在失效分析的过程中带有一定的盲目性。结合故障树分析方法,以PM O S芯片失效为例,讨论了SiP组件常见的管芯失效机理：电应力失效、热应力失效、机械损伤和环境应力失效以及相应的失效现象;最后从设计和工艺角度提出了降低各种失效机理发生的改进措施。     

联用动态EMMI与FIB的集成电路失效分析

EMMI被广泛应用于集成电路的失效分析和机理判定。针对端口I-V特性曲线的异常现象,采用静态电流的发光效应对漏电点进行光发射定位。静态电流法无法全面测试集成电路内部逻辑单元,需要使用动态信号驱动集成电路,使内部失效部位能够产生光发射。对样品在动态失效工作状态进行光发射捕捉,再结合良品对比、电路原理图和版图分析等辅助手段进行故障假设,以定位失效点,最后利用FIB系统对电路进行剖面切割制样,找出物理损伤点。对砷化镓数字集成电路的不稳定软失效案例进行分析,动态EMMI法与FIB系统联用可成功应用于芯片内部金属化互连异常的失效分析,解决传统静态光发射法无法定位的技术难题。     

LED水汽侵蚀失效分析

通过I-V特性曲线测试、机械开封、光学观察、扫描电镜及能谱分析、切片观察和红墨水试验等测试手段，对失效LED和正常LED进行了测试，并对测试结果进行了对比分析。结果显示失效样品I-V特性曲线异常；存在短路现象，电镜观察失效样品芯片表面出现树枝状银物质，同时观察到支架与环氧胶界面存在缝隙，由此推断出水汽入侵路径。结合失效背景，得出LED灯珠失效原因为LED支架与环氧胶的界面存在缝隙，水汽通过缝隙侵入，在电场作用下，芯片正极发生银迁移，导致样品失效。并提出了相应的改进措施，对于提高LED产品的可靠性具有一定的参考意义。     

电子组装中焊点的失效分析

焊点的失效分析是电子产品质量和可靠性保证体系的重要组成部分。本文首先概述了焊点的失效机理,主要包括热致失效、机械失效、电化学失效。在此基础之上,综述了焊点失效分析的基本流程与各类失效分析方法,并对无铅条件下该领域的研究作了简要评述。     

板上驱动封装LED的电源IC失效分析

通过基础电性测试确认了板上驱动（DOB）封装LED光源的失效现象,通过X射线无损探测内部的结构,得到了基本电路结构原理图。分别对LED光源电路上的各个分立部分做示波器测试,确认了失效部位为电源IC。通过物理开封并结合扫描电子显微镜（SEM）、聚焦离子束显微镜（FIB-SEM）和能谱仪（EDS）测试,分析出该LED光源亮度下降的根本原因是电源IC异常。而该电源IC失效的原因为Fe元素残留与污染引发蚀刻异常,含Fe元素异物镶嵌在芯片内部,导致芯片内部蚀刻线路异常,造成内部功能单元失效,最终使IC功能偏离设计,局部或全部失效。     

Flip chip on board: assessment of reliability in cellular phone application

Flip chips are generally seen as a potential future "packaging" option providing an alternative to chip scale packages. In this work, the reliability of flip chip assemblies was analyzed using daisy chain test components on a schematic test vehicle designed to emulate a cellular phone environment printed wiring board (PWB). The flip chip components were assembled in a standard surface mount technology process, where the flip chip bumps were first dipped in a flux film. A test matrix consisting of a number of flip chip test components with different input/output configurations, PWBs, fluxes, and underfills was built up. The assemblies were tested for potential damage to the flip chips and their interconnects by thermal cycling and by mechanical shock in a drop. After testing, the root causes of the failures were analyzed. As a separate task, the stress/strain generation that occurs in the flip chips in the drop test was analyzed using simulation, in order to find the critical locations on the test PWB.     

Effect of Gold Stud Bump Topology on Reliability of Flip Chip on Flex Interconnects

The flip chip technique using conductive adhesives have emerged as a good alternative to solder flip chip methods. Different approaches of the interconnection mechanism using conductive adhesives have been developed. In this paper, test chips with gold stud bumps are flip-chipped with conductive adhesives onto a flexible substrate. An experimental study to characterize the bonding process parameters is reported. Initial results from the environmental studies show that thermal shock test causes negligible failure. On the other hand, high humidity test causes considerable failure in flip chip on flex assemblies. Improvements in the reliability of the assembly are achieved by modifying the shape of the gold stud bumps.     

贴片电容器失效分析

采用外观检查、金相切片、SEM和EDS分析等手段,通过对贴片电容器失效实例的分析,介绍了对贴片电容器失效的分析过程与方法,得出了内部电极间的陶瓷介质裂纹存在并联电阻特性,这是导致电容器产生漏电失效的主要原因,该裂纹属制造缺陷。失效分析对贴片电容器制造工艺有质量控制作用。     

SOT82功率产品的热阻控制

文章首先列出了封装过程中可能对SOT82功率产品热阻产生影响的所有因素，并对其中几个关键因素进行了原因分析，如空洞、锡层厚度、锡层倾斜度等。其后，针对这几个关键因素，分别进行对应的装配过程优化改善，来保证SOT82功率产品的热阻稳定。     

Using active thermography for defects inspection of flip chip

With the development of electronics towards smaller, more compact, and increasingly complex, flip chip technology has been used extensively in microelectronic packaging, and disadvantages occur in traditional detection methods. It is indispensable to explore new methods for flip chip solder joint inspection. In this paper we investigate an approach for solder joint inspection based on the active thermography. The basic principle of the active thermography method is described, and the experimental investigation is carried out using the method. The test flip chip is heated by a non-contact heating source. The thermal distribution on two kinds of chips is captured by an infrared thermal imager. With median filter and segmentation processes, positions of the bumps are segmented. For chips with smaller bumps, principal component thermography is introduced to enhance the segmentation process. The analysis results demonstrate that missing bumps in flip chips can be discerned obviously, which proves the feasibility of the proposed method for defects inspection of flip chips.     

A numerical failure analysis on lead breakage issues of ultra fine pitch flip chip-on-flex and tape carrier packages during chip/film assembly process

As the lead pitch gets finer, numerous problems emerge during manufacturing process of LCD packages. Lead breakage failure at ultra fine pitch (around 30 μm and under) chip/film assembly stage would be one of them. In this paper a failure analysis process on this issue is presented. In order to figure out more detailed phenomena that occurred at miscellaneous area for a very short instant, a numerical approach is utilized along with tests and measurements. A verified/predictive finite element model is developed and applied on flip chip-on-flex and tape carrier packages for LCD applications. The root causes of the lead breakage and dominant effecting factors are identified through various tests and simulations. Design/process guidelines for the packages are proposed to mitigate or remove the risk of the failure.     

基于投影寻踪分析的芯片硬件木马检测

提出一种利用芯片旁路泄漏信息的硬件木马无损检测方法,通过基于绝对信息散度指标的投影寻踪技术,将芯片运行过程中产生的高维旁路信号投影变换到低维子空间,在信息损失尽量小的前提下发现原始数据中的分布特征,从而实现芯片旁路信号特征提取与识别。针对示例性高级加密标准(AES-128)木马电路的检测实验表明,该技术可以有效分辨基准芯片与硬件木马测试芯片之间的旁路信号特征差异,实现硬件木马检测。     

Decapsulation Method for Flip Chips with Ceramics in Microelectronic Packaging

The decapsulation of flip chips bonded to ceramic substrates is a challenging task in the packaging industry owing to the vulnerability of the chip surface during the process. In conventional methods, such as manual grinding and polishing, the solder bumps are easily damaged during the removal of underfill, and the thin chip may even be crushed due to mechanical stress. An efficient and reliable decapsulation method consisting of thermal and chemical processes was developed in this study. The surface quality of chips after solder removal is satisfactory for the existing solder rework procedure as well as for die-level failure analysis. The innovative processes included heat-sink and ceramic substrate removal, solder bump separation, and solder residue cleaning from the chip surface. In the last stage, particular temperatures were selected for the removal of eutectic Pb-Sn, high-lead, and lead-free solders considering their respective melting points.     

光伏型锑化铟红外探测器开路失效研究

主要对光伏型锑化铟红外探测器组件开路失效现象进行分析。选取典型失效产品,通过性能测试、解剖等分析方法,寻找失效原因(金层表面有网状胶存在、引线与金属化层形变不够导致键合失效,芯片材料崩裂等),并对引起失效的机理进行了分析。