PZT铁电场效应晶体管电学性能

采用磁控溅射法制备了(111)向择优的Pb(Zr0.52Ti0.48)O3(PZT)铁电薄膜,并结合半导体集成技术制备了金属/铁电/金属/多晶硅/绝缘层/Si衬底(MFMIS)结构的n沟道铁电场效应晶体管.研究了铁电场效应晶体管的C-V特性、I-V特性以及写入速度.顺时针的C-V滞回曲线和逆时针的Id-Vg滞回曲线表明,n沟道PZT铁电场效应晶体管具有极化存储性能和明显的栅极化调制效应,并且在-5V到 5V的Vg电压下从C-V和Id-Vg滞回曲线中都得到了2V的存储窗口.     

Light Effects on the Bias Stability of Transparent ZnO Thin Film Transistors

We report on the bias stability characteristics of transparent ZnO thin film transistors (TFTs) under visible light illumination. The transfer curve shows virtually no change under positive gate bias stress with light illumination, while it shows dramatic negative shifts under negative gate bias stress. The major mechanism of the bias stability under visible illumination of our ZnO TFTs is thought to be the charge trapping of photo‐generated holes at the gate insulator and/or insulator/channel interface.     

Photoinduced Colossal Magnetoresistance under Substantially Reduced Magnetic Field

The colossal magnetoresistive insulator to metal switching of almost nine orders of magnitude under the significantly reduced magnetic field is achieved by illumination for the low bandwidth manganite thin films. Similarly, by changing the measuring bias voltage through the sample the required magnetic field for insulator–metal transition can be further fine‐tuned. By applying a magnetic field of suitable strength, the samples can also be tuned to be extra sensitive to the illumination having colossal effect on the resistivity at low temperatures. This kind of utilizing of multiple external stimulants, which together change the properties of the material, could have significant impact on the new generation of phase‐change memories working under affordable conditions.     

Unified tunnelling-diffusion theory for Schottky and very thin MOS structures

We derive general formulae for calculating the transport of free charge carriers in a MOS structure with a thin insulating layer. In particular, we obtain relationships for boundary concentrations of free charge carriers on the insulator–semiconductor interface and for the current densities flowing through the MOS structure. Our direct tunnelling-diffusion approach makes the well known thermionic emission–diffusion theory for the Schottky interface applicable also to metal–insulator–semiconductor barriers with a very thin insulator layer. We demonstrate how direct tunnelling through the insulating layer and drift–diffusion of free charge carriers in the semiconductor affect the I–V and C–V curves and the boundary concentrations needed to numerically solve the continuity equations.     

Effective-Work-Function Control by Varying the TiN Thickness in Poly-Si/TiN Gate Electrodes for Scaled High- $k$ CMOSFETs

We have investigated the controllability of the effective work function $( !phi_{m,{rm eff}}!)$ of TiN as a work-function-determining metal (WFM) for various gate-electrode structures in HfSiON MOSFETs. $phi_{m,{rm eff}}$ was controllable from 4.7 to 4.44 eV by changing the TiN thickness from 30 to 2 nm in poly-Si/TiN gate electrodes, without any distinct increase in EOT. Therefore, thin-TiN and thick-TiN WFMs are preferred for the reduction in threshold voltage in nMOSFETs and pMOSFETs with poly-Si/TiN gate electrodes, respectively. A similar controllability was not observed with W/TiN gate electrodes but was evident with W/TaSiN/TiN gate electrodes. This means that controllability is a characteristic of metal gate electrodes with a structure including a Si-rich layer (such as poly-Si and TaSiN)/TiN. It is considered that Ti suboxides, which increase $ phi_{m,{rm eff}}$ as a thin insulator with negative fixed charges, or interface dipoles in the TiN/HfSiON interface, are reduced by oxidation of the Si-rich layer, producing the required result of $phi_{m,{rm eff}}$ decrease when the TiN thickness becomes as thin as 2 nm.      

Simulating Tunneling Electron Transport in the Semiconductor–Crystalline Insulator–Si(111) System

Tunneling carrier transport through a thin insulator (e.g., CaF₂) layer between a Si(111) substrate and a semiconductor gate is theoretically investigated. Along with the conservation of a large transverse wave vector of tunneling particles, the limitation imposed on the availability of states in the gate is taken into account. Due to this limitation, the tunneling currents at low insulator bias are weaker than in an analogous structure with a metal gate electrode. The same feature leads to a change in the shape of the energy distribution of tunneling electrons, both in transport between the substrate and gate conduction bands and during the Si(111) conduction band–gate valence band transfer.     

Review and Perspective of Architecture Development for Dynamic Random Access Memory

Discussed is a review and perspective of architecture, materials and process technology for dynamic random access memory（DRAM） applications. Key challenges of the transistor and capacitor scaling from DRAM will be reviewed. To continue scaling down, multi-gate devices with very thin silicon channels are most promising. Several architectures like Fin-field effect transistor（Fin-FET）, Wafer bonded double gate and silicon on nothing（SON） gate-all-around have been demonstrated with good electrical characteristics. An overview of the evolution of capacitor technology is also presented from the early days of planar poly/insulator/ silicon（PIS） capacitors to the metal/insulator/metal（MIM） capacitors used for today 50 nm technology node and below. In comparing Ta2O5 , HfO2 and Al2 O3 as high-k dielectric for use in DRAM technology, Al2 O3 is found to give a good compromise between capacitor performance and manufacturability used in MIM architecture.     

Organic thin film transistors with PMMA modified insulator

A double insulation layer structure organic thin films transistor (OTFT) was investigated for improving the performance of the SiO2 gate insulator. A 50 nm PMMA layer was coated on top of the SiO2 gate insulator as the organic insulator layer. The results demonstrated that using inorganic/organic compound insulator as the gate dielectric layer is an effective method to fabricate OTFTs with improved electric characteristics and decreased leakage current. Electrical parameters of carrier mobility and on/off ratio were calculated. OTFT based on Si substrate with a field-effect mobility of 4.0 × 10-3cm2/Vs and on/off ratio of 104 was obtained.     

Modulation of the Charge of Germanium MIS Structures with Fluorine-Containing Insulators

Semiconductors - An insulator layer of ErF3, YF3, NdF3, and TmF3 was formed in n-type Ge-based MIS (metal–insulator–semiconductor) structures. It is shown that no negative effective...     

Injection current flow through thin insulator films

The equations and boundary conditions describing injection current flow through insulators are investigated for the case of thin insulator films. The carrier mobility is assumed to be constant and trapping is neglected. The thickness of the insulator film is taken to be small enough so that surface properties are significant. It is found that electrons flowing in from the metal contacts can increase the insulator conductivity by orders of magnitude. The diffusion term in the current equation is not neglected, and it is found that this enhances the quadratic Mott-Gurney current term. The theoretical results are compared with previous experimental results.     

用于有源矩阵液晶显示的Ta-Ta2O5-Ta MIM薄膜二极管

本文介绍了一种用于有源矩阵液晶显示、具有对称结构的ＭＩＭ薄膜二极管,其中Ｔａ２Ｏ５膜采用溅射／阳极氧化两步法制成。实验结果表明,用此法制备的氧化钽膜作绝缘层的ＭＩＭ二极管,具有良好的开关特性,较大的通断比和较好的伏安特性对称性     

Current multiplication in metal-insulator-semiconductor (MIS) tunnel diodes

In contrast to thick insulator structures, metal-insulator-semiconductor (MIS) diodes with very thin insulating layers (< 30 Å for the silicon-silicon dioxide system) allow appreciable tunnel current flow between the metal and the semiconductor causing the semiconductor to depart significantly from thermal equilibrium conditions when the diode is biased. Under such conditions, recent experiments have demonstrated that multiplication of minority carrier current can occur in the contact region. This multiplication process is described in detail by deriving analytical expressions characterizing this process and its dependence upon the metal, insulator, and semiconductor parameters for one specific class of diode. Numerical methods are used to investigate the multiplication properties under more general conditions. Solutions obtained by this method indicate that values of the small signal multiplication factor, M, in the range of 10²–10³ can be obtained with appropriately designed diodes. The applications of the multiplication process to a transistor structure and to a photodiode with internal multiplication properties are described briefly.     

Properties of phosphorus-doped (Zn,Mg)O thin films and device structures

The properties of phosphorus-doped (Zn,Mg)O polycrystalline and epitaxial thin films are described. The as-deposited (Zn,Mg)O:P films are n type with high electron carrier density. High resistivity is induced in the films with moderate temperature annealing, which is consistent with suppression of the donor state and activation of the deep acceptor. The resistivity of the as-deposited and annealed film is an order of magnitude higher than similar samples with no Mg, consistent with a shift in the conduction band edge relative to the defect-related donor state. The capacitance-voltage characteristics of annealed metal/insulator/P-doped (Zn,Mg)O structures in which the (Zn,Mg)O is polycrystalline exhibit p-type polarity. In addition, multiple polycrystalline devices comprising n-type ZnO/P-doped (Zn,Mg)O thin-film junctions display asymmetric I–V characteristics that are consistent with the formation of a p-n junction at the interface, although the ideality factor is anomalously high.     

碱土族金属掺杂对C60薄膜的电子结构与性质的影响

将Sn粉末和C60粉末共同蒸发获得碱土族金属掺杂的C60薄膜样品，与未掺杂的纯C60样品一起进行扫描电镜，紫外可见吸收光谱和电阻随温度变化特性的测量，分析比较掺杂对薄膜样品的组成，结构和性质的影响，结果显示，掺锡后组成薄膜的纳米颗粒略有增大并突出表面，使薄膜的电子发射阈值降低，掺入的Sn原子在禁带中形成杂质能级，使电子吸收跃迁由原来的直接跃迁变为间接跃迁，导电性也由原来的绝缘体变为N型半导体。     

碱土族金属掺杂对C_(60)薄膜的电子结构与性质的影响

将Ｓｎ粉末和Ｃ６０粉末共同蒸发获得碱土族金属掺杂的Ｃ６０薄膜样品,与未掺杂的纯Ｃ６０样品一起进行扫描电镜、紫外可见吸收光谱和电阻随温度变化特性的测量,分析比较掺杂对薄膜样品的组成、结构和性质的影响．结果显示,掺锡后组成薄膜的纳米颗粒略有增大并突出表面,使薄膜的电子发射阈值降低;掺入的Ｓｎ原子在禁带中形成杂质能级,使电子吸收跃迁由原来的直接跃迁变为间接跃迁,导电性也由原来的绝缘体变为Ｎ型半导体．     

A Multi‐Functional Highly Efficient Upconversion Luminescent Film with an Array of Dielectric Microbeads Decorated with Metal Nanoparticles

Upconversion nanoparticles (UCNPs) have been integrated with photonic platforms to overcome the intrinsically low quantum efficiency limit of upconversion luminescence (UCL). However, platforms based on thin films lack transferability and flexibility, which hinders their broader and more practical application. A plasmonic structure is developed that works as a multi‐functional platform for flexible, transparent, and washable near‐infrared (NIR)‐to‐visible UCL films with ultra‐strong UCL intensity. The platform consists of dielectric microbeads decorated with plasmonic metal nanoparticles on an insulator/metal substrate. Distinct improvements in NIR confinement, visible light extraction, and boosted plasmonic effects for upconversion are observed. With weak NIR excitation, the UCL intensity is higher by three orders of magnitude relative to the reference platform. When the microbeads are organized in a square lattice array, the functionality of the platform can be expanded to wearable and washable UCL films. The platform can be transferred to transparent, flexible, and foldable films and still emit strong UCL with a wide viewing angle.     

TFT-LCD制造工艺中金属残留的解决方案

在TFT-LCD阵列的四次掩模技术中,复合层刻蚀是非常难控制的一道工序,最突出的问题是在复合层刻蚀后信号线的两边有金属残留,金属残留会对之后的绝缘层产生影响,导致断层等不良.调整复合层刻蚀工艺是目前解决金属残留问题的通用方法,但是都没有根本地解决这个问题.文章通过研究信号线刻蚀时间对复合层刻蚀后金属残留的影响,认为通过...     

基片温度对基于Bi1.5Zn1.0Nb1.5O7栅绝缘层的ZnO基TFT性能的影响

在不同基片温度(RT、300、400、500和600℃)下,采用射频磁控溅射法制备了ZnO薄膜和BZN薄膜.研究表明,所制备的BZN薄膜拥有非晶态结构,ZnO薄膜具有c轴择优取向,在基片温度为500℃时,获得低的漏电流(10-7 A/cm2),比RT时的漏电流(10-4 A/cm2)低三个数量级.将所制备的ZnO薄膜和BZN薄膜分别作为ZnO-TFT的有源层和栅绝缘层,研究表明,在基片温度为500℃时,提高了器件性能,所取得的亚阈值摆幅(470 mV/dec.)是RT时的亚阈值摆幅(1 271 mV/dec.)的三分之一;界面态密度(3.21×1012 cm-2)是RT时的界面态密度(1.48×1013 cm-2)的五分之一.     

Memory effects in hybrid silicon-metallic nanoparticle-organic thin film structures

We report on the electrical behaviour of metal–insulator–semiconductor (MIS) structures fabricated on silicon substrates and using organic thin films as the dielectric layers. These insulating thin films were produced by different methods, including spin-coating (polymethylmethacrylate), thermal evaporation (pentacene) and Langmuir–Blodgett deposition (cadmium arachidate). Gold nanoparticles, deposited at room temperature by chemical self-assembly, were used as charge storage elements. In all cases, the MIS devices containing the nanoparticles exhibited hysteresis in their capacitance versus voltage characteristics, with a memory window depending on the range of the voltage sweep. This hysteresis was attributed to the charging and discharging of the nanoparticles from the gate electrode. A maximum memory window of 2.5 V was achieved by scanning the applied voltage of an Al/pentacene/Au nanoparticle/SiO₂/p-Si structure between 9 and −9 V.     

Electroluminescence from MIS silicon-based light emitters with arrays of self-assembled Ge(Si) nanoislands

We report on the electroluminescence from silicon-based metal–insulator–semiconductor (MIS) diodes with arrays of self-assembled Ge(Si) nanoislands. Aluminum oxide (Al₂O₃) is used as an insulator material in the MIS contact. Variations in the electroluminescence spectra caused by changing the metal work function are examined. The intense electroluminescence from Ge(Si) nanoislands localized at a distance of 50 nm from the insulator–semiconductor interface is observed at room temperature. The emission spectrum is found to be controlled by choosing the design of the semiconductor structure and the barrier height for injected carriers.