Characterization of dark current non-uniformities in charge-coupled devices

Thermally generated dark current non-uniformities are electrically characterized, using gate controlled diodes and charge-coupled devices in the integration mode. The generation current in the space charge layer under the electrode of a gated-diode and in a CCD-cell, containing a lot of crystallographic defects, varies non-linearly with the depletion layer width. The leakage current in a charge-coupled device was measured as a function of temperature and had a smaller temperature dependence than n_i has at room temperature or lower. At higher temperatures a normal n_i-dependence is found. These experiments suggest that the enhanced generation at the location of a crystallographic defect is partly due to an increased concentration of generation-recombination centers in the vicinity of a defect and partly due to a field enhanced emission, caused by the high electric fields near the defects.     

A novel photodetector using MOS tunneling structures

A metal/oxide/p-Si structure with ultrathin oxide is utilized as a photodetector. At positive gate bias, the dark current of the photodetector is limited by the thermal generation of minority carriers in the inversion layer. The high growth temperature (1000°C) of the gate oxide can reduce the dark current to a level as low as 3 nA/cm². As biased in the inversion layer, the tunneling diode works in the deep depletion region with soft pinning of oxide voltage, instead of the pinning of surface potential, very different from the conventional MOS diode with thick oxide     

Determination of recombination lifetime in MOS structures by a sine voltage-sweep technique

A sine-voltage technique for measurements of recombination lifetime in metal oxide semiconductor (MOS) structures is proposed. When a fast sine-voltage sweep ramp is applied to the gate of an MOS capacitor a non-equilibrium depletion layer is formed and electron–hole generation starts in the space–charge–region and in the bulk. If the measurements are performed at elevated temperature so that quasi-neutral region generation rather than space charge region generation dominates, then the diffusion length, consequently the recombination lifetime, can be determined.     

1/f noise and specific detectivity of HgCdTe photodiodes passivatedwith ZnS-CdS films

1/f noise in HgCdTe photodiodes has been measured as a function of temperature, diode bias, and dark current. The dependence of 1/f noise on dark current was measured over a wide temperature range. At low temperatures, where surface generation and leakage current were predominant, a linear relationship between 1/f noise and dark current was observed. At higher temperatures, where diffusion current is predominant, the correlation no longer holds. The temperature dependence of 1/f noise was also determined. The temperature dependence of the 1/f noise was found to be the same as that for the surface generation and leakage currents. All the data obtained in these experiments could be fit with theoretical predictions by a simple relationship between 1/f noise and dark current. The 1/f noise in the HgCdTe photodiode varies with diode bias, temperature, and dark current only through the dependence of the surface current on these devices. The maximum specific detectivity (D*) value and the maximum signal-to noise ratio are approximately 3.51×10¹⁰ cm·Hz^1/2/W and 5096 at 50 mV reverse bias, respectively     

Surface leakage current analysis of ion implanted ZnS-passivated n-on-p HgCdTe diodes in weak inversion

Effects of fixed charge on R₀A value of ZnS-passivated x=0.3 HgCdTe n-on-p diode are explained as a shunt resistance that affects current-voltage (I-V) and dynamic resistance-voltage (Rd-V) characteristics. The fixed charge of 1×10¹¹/cm² to 2 × 10¹¹/cm² which is usually obtained with ZnS passivation makes the surface weakly inverted and reduces HgCdTe diode R₀A value owing to the short generation lifetime of HgCdTe substrate. The gate-controlled diode and specially fabricated diode are used to explain the surface leakage current in the weak inversion and charge sheet model is used to explain the characteristics. It is found that the surface leakage current by the inverted channel in the weak inversion can reduce R₀A more than other currents such as the generation current and tunneling current which are usually used to explain the surface leakage current of HgCdTe diode.     

Frequency domain lifetime characterization

Time-based measurements are commonly used for lifetime characterization of semiconductors. We have developed the theory, verified by experiment, of frequency-based lifetime characterization as an alternative to time-based measurements for MOS devices biased in inversion. One consideration during lifetime/diffusion length measurements, is whether the near-surface space-charge region or the bulk or quasineutral region is characterized. To characterize the near-surface space-charge region of the device, one usually makes room temperature pulsed MOS capacitor or diode leakage current measurements. We show that room-temperature, frequency-domain capacitance, conductance, or resistance measurements characterize the quasineutral bulk, not the space charge region, in contrast to room-temperature pulsed MOS-C or diode leakage current measurements which characterize the space-charge region     

双漂移崩越二极管的渡越角分析

在考虑载流子的空间电荷效应、扩散效应和注入电流脉宽情况下,推导了双漂移崩越二极管的渡越角表达式.用于计算35GHz崩越管渡越角,与计算机模拟结果符合良好.     

On the statistics of extra generation in an avalanche diode

The fluctuation characteristics of the output current from an avalanche diode are investigated, allowing a spatial creation of extra carriers in the space charge layer. A spectral density is obtained for the extra generation current, assuming a uniform thermal or optical activation.     

Low temperature impurity diffusion in SiC: Planar quantum-size p-n junctions and n-p-n transistor structures

Low temperature diffusion of boron and phosphorus has been realized for the first time in monocrystalline SiC through controlled surface injection of silicon vacancies. By varying the parameters of the surface oxide overlayer during the boron/phosphorus diffusion process, it was possible to obtain the SiC planar quantum-size p-n junctions and transistor structures featuring low values for dark leakage currents. Use of the SiC quantum-size transistor structures in both bipolar and FET variations has been found to result in the generation of the negative resistance due to avalanche current processes.     

The leakage current improvement in an ultrashallow junction NMOSwith Co silicided source and drain

The leakage current characteristics of the cobalt silicided NMOS transistors with a junction depth of 800 Å have been studied. In order to minimize the junction leakage current, the thickness of the CoSi₂ layer should he controlled under 300 Å and the Si surface damage induced by the gate spacer etch should be minimized. The post furnace annealing after the second silicidation by the rapid thermal annealing (RTA) process also affected the leakage current characteristics. The gate induced drain leakage (GIDL) current was not affected by the lateral encroachment of CoSi₂ layer into the channel direction when the gate spacer length was larger than 400 Å     

Improved analysis of pulsed C-t measurements on silicon MOS capacitors

A modified analysis of the pulse response of silicon MOS capacitors is presented which takes into account the lateral spreading of the depletion region around the gate area. Two aspects of this lateral depletion region which have previously been ignored, namely the bulk generation and space charge in this region, are taken into account and used to explain the experimentally observed dependence of the capacitor relaxation time on the device aspect ratio. The analysis allows the bulk lifetime to be obtained more accurately and also enables the surface recombination velocity resulting from a particular device processing schedule to be estimated. The results obtained agree well with those determined from junction leakage current measurements and the relevance of the lateral edge effect to the characteristics of a more complex charge coupled device has been discussed.     

The camel diode as photodetector with high internal gain

The camel diode is a three layer majority carrier device with an interior layer sufficiently thin so that it is depleted of carriers at all values of bias voltage. The current flow is controlled by a potential barrier in the bulk of the semiconductor, the height of which can be controlled by free carriers trapped in the potential minimum. They will be generated optically within the space charge layer and the adjacent diffusion region. Basic theoretical considerations and first experimental results, which exhibit a gain of values of up to 500, are presented.     

InAs/GaSb超晶格长波红外探测器暗电流特性分析

利用二极管电流解析模型分析了InAs/GaSb超晶格长波红外探测器暗电流的主导机制。首先,通过变面积二极管I-V测试证实77 K下采用阳极硫化加SiO₂复合钝化的InAs/GaSb超晶格长波红探测器的暗电流主要来自于体电流,而非侧壁漏电流;然后,利用扩散电流、产生复合电流、直接隧穿电流和陷阱辅助隧穿电流模型对InAs/GaSb超晶格长波红外探测器的暗电流进行拟合分析。结果表明:在小的反向偏压下(≤60 mV),器件暗电流主要由产生复合电流主导,而在高偏压下(>60 mV）,器件暗电流则主要由缺陷陷阱辅助隧穿电流主导。并分析了吸收层掺杂浓度对这两种电流的影响,证实5×1015~1×1016 cm?3是优化的掺杂浓度。     

Analysis of the soft reverse characteristics of n+p drain diodes

Soft leakage current characteristics of n⁺p drain diodes of a p-well C-MOS process have been measured and analyzed. A field dependent component of the leakage current could be determined after subtraction of the diffusion current. The values of the field-dependent generation current found were compared with calculated values owing to thermal generation according to the Poole-Frenkel effect and phonon-assisted tunneling. The measured values for different diode structures were found to agree well with the theoretical prediction of phonon-assisted tunneling through a barrier lowered by the presence of an electric field.     

Characterization of Generation Lifetime and Surface Generation Velocity of Semiconductor Wafers by a Contactless Zerbst Method

A contactless Zerbst method has been developed to characterize the generation lifetime and the surface generation velocity of a semiconductor wafer. This characterization is unaffected by the gate leakage current or the device fabrication process. In this study, this contactless Zerbst method was used to characterize the generation lifetime and the surface generation velocity of a partially Au-doped Si wafer. The results demonstrate that the contactless Zerbst method is a powerful technique for characterizing the generation lifetimes and the surface recombination velocities of semiconductor wafers.     

Shockley–Read–Hall Lifetime Study and Implication in HgCdTe Photodiodes for IR Detection

The Shockley–Read–Hall (SRH) mechanism might be a limiting factor of an infrared (IR) photodiode's dark current. This limitation is twofold. SRH generation might occur in the depletion region of the photodiode. In that case, the corresponding current is usually limiting the low-temperature dark current. Moreover, SRH generation might also occur in the diffusion volume, close to the space charge region, resulting in an increase of the diffusion dark current, usually limiting the high-temperature behavior of the photodiode. Hence, the determination of the SRH lifetime of IR materials is of first importance and has to be measured (or at least estimated) to define upcoming trends in future high-performance IR detectors. During the last few years, a lot of papers have been published about SRH lifetime in III–V materials (InSb, superlattices, InAsSb) and a few other communications have been more focused on comparing different material systems including III–V and II–VI materials. Those latter communications proposed very long SRH lifetimes (longer than ms) for HgCdTe, instead of the classical 10–100 μs usually admitted until now. This paper aims at investigating this SRH lifetime in HgCdTe based on experimental measurements carried out at the Laboratoire d’électronique des technologies de l’information (LETI) on HgCdTe grown in-house. Direct lifetime measurement (photoconductive or photoluminescence decay) as well as indirect estimations from photodiode dark currents are discussed in order to clarify this question of SRH lifetime and its consequences in upcoming advanced IR detection structures. In the end, it appeared that except for p/n extrinsic heterojunctions (for which the narrow gap depleted volume is not well known), most of the devices tested seemed limited by SRH lifetimes in the 10–100-μs range.     

A calibrated model for the subthreshold operation of a short channel MOSFET including surface states

Describes a simple two-dimensional subthreshold model for short channel MOSFET's. The effects of surface state density are also included in the model. A regional charge density approximation was used in the solution of Poisson's equation and an analytical solution of the continuity equation in two dimensions was derived. Excessive computations are avoided in the present model; this was made possible by the use of a valid regional charge approximation. The model was experimentally verified by performing measurements on short channel devices. The model was calibrated from measurements on a long channel device which was present on the same silicon chip. Results are presented for the subthreshold leakage current as a function of substrate bias, polysilicon gate length, diffusion depth and surface state density.     

Improving the reverse recovery of power mosfet integral diodes by electron irradiation

This paper demonstrates that controlled electron irradiation of silicon power MOSFET devices can be used significantly improve the reverse recovery characteristics of their integral reverse conducting diodes without adversely affecting the MOSFET characteristics. By using 3 MeV electron irradiation at room temperature it was found that the reverse recovery charge in the integral diode could be continuously reduced in a well controlled manner from over 500 nC to less than 100 nC without any significant increase in the forward voltage drop of the integral diode under typical operating peak currents. The reverse recovery time was also observed to decrease from 3 microseconds to less than 200 nsec when the radiation dose was increased from 0 to 16 Megarads. The damage produced in gate oxide of the MOSFET due to the electron radiation damage was found to cause an undersirable decrease in the gate threshold voltage. This resulted in excessive channel leakage current flow in the MOSFET at zero gate bias. It was found that this channel leakage current was substantially reduced by annealling the devices at 140°C without influencing the integral diode reverse recovery speed. Thus, the electron irradiation technique was found to be effective in controlling the integral diode reverse recovery characteristics without any degradation of the power MOSFET characteristics.     

Analog switch device using a MOS structure

The development and performance of an analog switch device is presented. The device is based in a metal–oxide–semiconductor (MOS) structure to control the current flow between two terminals, called drain and source. This current is controlled modulating the space charge region width of the MOS structure. Applying a gate voltage the SCR width is increased to a value larger than the theoretical one, this is due to the leakage current existence through the oxide. This oxide characteristic was obtained depositing the film by Atmospheric Pressure Chemical Vapor Deposition (APCVD) at 125 °C. The theoretical and experimental results are presented.