共查询到20条相似文献,搜索用时 31 毫秒
1.
Kuan-Wei Lee Jung-Sheng Huang Yu-Lin Lu Fang-Ming Lee Hsien-Cheng Lin Tsu-Yi Wu Yeong-Her Wang 《Solid-state electronics》2012
The study explored titanium dioxide (TiO2) on aluminum gallium arsenide (AlGaAs) prepared by liquid phase deposition (LPD) at 40 °C. The leakage current density was about 8.4 × 10?6 A/cm2 at 1 MV/cm. The interface trap density (Dit) and the flat-band voltage shift (ΔVFB) were 2.3 × 1012 cm?2 eV?1 and 1.2 V, respectively. After rapid thermal annealing (RTA) in the ambient N2 at 350 °C for 1 min, the leakage current density, Dit, and ΔVFB were improved to 2.4 × 10?6 A/cm2 at 1 MV/cm, 7.3 × 1011 cm?2 eV?1, and 1.0 V, respectively. Finally, the study demonstrates the application to the AlGaAs/InGaAs metal–oxide–semiconductor pseudomorphic high-electron-mobility transistor (MOS-PHEMT). The results indicate the potential of the proposed device with a LPD-TiO2 gate oxide for power application. 相似文献
2.
We examined the effects of post-annealing in forming-gas ambient on the spin-on-dielectric (SOD)-buffered passivation as well as the conventional plasma-enhanced chemical vapor deposition (PECVD) Si3N4 passivation structure in association with the quantitative analysis of defects at the passivation interfaces of AlGaN/GaN high electron mobility transistors (HEMTs). Before the annealing, the interface state densities (Dit) of the PECVD Si3N4 are one-order higher (1012–1013 cm−2 eV−1) than those of the SOD SiOx (1011–1012 cm−2 eV−1) as derived from C–V characterization. Clear reduction in Dit from the PECVD Si3N4 is extracted to a level of 1011–1012 cm−2 eV−1 with a stronger absorption from Si–N peak in Fourier transform infrared spectroscopy spectra after the post-annealing. On the other hand, negligible difference in Dit value is obtained from the SOD SiOx. In this paper we propose that much lower measurement levels (~156 mA/mm) before the annealing and substantial recovery (~13% increase) after the annealing in maximum drain current density of the AlGaN/GaN HEMTs with Si3N4 passivations are due to the original higher density before the annealing and greater reduction in Dit of the PECVD Si3N4 after the annealing. Significant reduction after the annealing in gate–drain leakage current (from ~10−3 to ~10−5 A, 100-μm gate width) of the HEMTs with the Si3N4 passivation is also supposed to be attributed to the reduction of Dit. 相似文献
3.
Cu2ZnSnS4 (CZTS) is low cost and constitutes non-toxic materials abundant in the earth crust. Environment friendly solar cell absorber layers were fabricated by a thermal co-evaporation technique. Elemental composition of the film was stated by energy dispersive spectroscopy (EDS). Some optical and electrical properties such as absorption of light, absorption coefficient, optical band gap charge carrier density, sheet resistance and mobility were extracted. Optical band gap was found to be as 1.44 eV, besides, charge carrier density, resistivity and mobility were found as 2.14×1019 cm−3, 8.41×10−4 Ω cm and 3.45×102 cm2 V−1 s−1, respectively. In this study Ag/CZTS/n-Si Schottky diode was fabricated and basic diode parameters including barrier height, ideality factor, and series resistance were concluded using current–voltage and capacitance–voltage measurements. Barrier height and ideality factor values were found from the measurements as 0.81 eV and 4.76, respectively, for Ag/CZTS/n-Si contact. 相似文献
4.
Umut Aydemir İlke Taşçıoğlu Şemsettin Altındal İbrahim Uslu 《Materials Science in Semiconductor Processing》2013,16(6):1865-1872
We have fabricated Au/n-Si and Au/PVA:Zn/n-Si Schottky barrier diodes (SBDs) to investigate the effect of organic interfacial layer on the main electrical characteristics. Zn doped poly(vinyl alcohol) (PVA:Zn) was successfully deposited on n-Si substrate by using the electrospinning system and surface morphology of PVA:Zn was presented by SEM images. The current–voltage (I–V) characteristics of these SBDs have been investigated at room temperature. The experimental results show that interfacial layer enhances the device performance in terms of ideality factor (n), zero-bias barrier height (ΦB0), series resistance (Rs), and shunt resistance (Rsh) with values of 1.38, 0.75 eV, 97.64 Ω, and 203 MΩ whereas those of Au/n-Si SBD are found as 1.65, 0.62 eV, 164.15 Ω and 0.597 MΩ, respectively. Also, this interfacial layer at metal/semiconductor (M/S) interface leads to a decrease in the magnitude of leakage current and density of interface states (Nss). The values of Nss range from 1.36×1012 at Ec—0.569 eV to 1.35×1013 eV?1 cm?2 at Ec—0.387 eV for Au/PVA:Zn/n-Si SBD and 3.34×1012 at Ec—0.560 eV to 1.35×1013 eV?1 cm?2 at Ec—0.424 eV for Au/n-Si SBD. The analysis of experimental results reveals that the existence of PVA:Zn interfacial layer improves the performance of such devices. 相似文献
5.
C. Özaydın K. Akkılıç S. İlhan Ş. Rüzgar Ö. Güllü H. Temel 《Materials Science in Semiconductor Processing》2013,16(4):1125-1130
We demonstrate that a copper(II) organic complex can control the electrical characteristics of conventional Au/n-Si metal–semiconductor (MS) contacts. We investigated the electronic and photovoltaic properties of a Cu(II) complex/n-Si heterojunction diode. The ideality factor n and barrier height Φb of the diode were 2.22 and 0.736 eV, respectively. An ideality factor greater than unity indicates that the diode exhibits non-ideal current–voltage behavior. This behavior results from the effect of series resistance and the presence of an interfacial layer. The series resistance and barrier height determined using Norde’s method were 6.7 kΩ and 0.77 eV, respectively. The device showed photovoltaic behavior, with a maximum open-circuit voltage of 0.24 V and a short circuit current of 1.7 μA under light of 8 mW/cm2. 相似文献
6.
《Materials Science in Semiconductor Processing》2007,10(2-3):61-67
In this study, titanium dioxide (TiO2) films were grown on polycrystalline silicon by liquid phase deposition (LPD) with ammonium hexafluoro-titanate and boric acid as sources. The film structure is amorphous as examined by X-ray diffraction (XRD). A uniform composition of LPD-TiO2 was observed by SIMS examination. The leakage current density of an Al/LPD-TiO2/poly-Si/p-type Si metal–oxide–semiconductor (MOS) structure is 1.9 A/cm2 at the negative electric field of 0.7 MV/cm. The dielectric constant is 29.5 after O2 annealing at 450 °C. The leakage current densities can be improved effectively with a thermal oxidized SiO2 added at the interface of LPD-TiO2/poly-Si. The leakage current density can reach 3.1×10−4 A/cm2 at the negative electric field of 0.7 MV/cm and the dielectric constant is 9.8. 相似文献
7.
The electrical characteristics of Al/strained Si-on-insulator (sSOI) Schottky diode have been investigated using current–voltage (I–V) and capacitance–voltage (C–V) measurements in the wide temperature range of 200–400 K in steps of 25 K. It was found that the barrier height (0.57–0.80 eV) calculated from the I–V characteristics increased and the ideality factor (1.97–1.28) decreased with increasing temperature. The barrier heights determined from the C–V measurements were higher than those extracted from the I–V measurements, associated with the formation of an inhomogeneous Schottky barrier at the interface. The series resistance estimated from the forward I–V characteristics using Cheung and Norde methods decreased with increasing temperature, implying its strong temperature dependence. The observed variation in barrier height and ideality factor could be attributed to the inhomogeneities in Schottky barrier, explained by assuming Gaussian distribution of barrier heights. The temperature-dependent I–V characteristics showed a double Gaussian distribution with mean barrier heights of 0.83 and 1.19 eV and standard deviations of 0.10 and 0.16 eV at 200–275 and 300–400 K, respectively. From the modified Richardson plot, the modified Richardson constant were calculated to be 21.8 and 29.4 A cm−2 K−2 at 200–275 and 300–400 K, respectively, which were comparable to the theoretical value for p-type sSOI (31.6 A cm−2 K−2). 相似文献
8.
A. Chawanda K.T. Roro F.D. Auret W. Mtangi C. Nyamhere J. Nel L. Leach 《Materials Science in Semiconductor Processing》2010,13(5-6):371-375
We have studied the experimental linear relationship between barrier heights and ideality factors for palladium (Pd) on bulk-grown (1 1 1) Sb-doped n-type germanium (Ge) metal-semiconductor structures with a doping density of about 2.5×1015 cm?3. The Pd Schottky contacts were fabricated by vacuum resistive evaporation. The electrical analysis of the contacts was investigated by means of current–voltage (I–V) and capacitance–voltage (C–V) measurements at a temperature of 296 K. The effective barrier heights from I–V characteristics varied from 0.492 to 0.550 eV, the ideality factor n varied from 1.140 to 1.950, and from reverse bias capacitance–voltage (C?2–V) characteristics the barrier height varied from 0.427 to 0.509 eV. The lateral homogenous barrier height value of 0.558 eV for the contacts was obtained from the linear relationship between experimental barrier heights and ideality factors. Furthermore the experimental barrier height distribution obtained from I–V and (C?2?V) characteristics were fitted by Gaussian distribution function, and their mean values were found to be 0.529 and 0.463 eV, respectively. 相似文献
9.
L. Shen H.W. Du H. Ding J. Tang Z.Q. Ma 《Materials Science in Semiconductor Processing》2010,13(5-6):339-343
The discrepancy of rectifying characteristics in n-ZnO:Al/p-Si heterojunctions from diode to diode was demonstrated by region dependent dark I–V characteristics, where the junction is laterally cut to sequentially decrease the area. Further investigation shows that the junction (2.1×2.1 cm2) with the barrier height Φ=0.693 eV consists of one part (2.1×1.4 cm2) with Φ=0.695 eV and the other part (2.1×0.7 cm2) with Φ=0.686 eV. It is found that reverse currents saturate with different values of 3.6×10?3, 2.5×10?3 and 1.58×10?3 A for the light I–V curves of the three junctions with the same areas. To explain this peculiarity, the probable reason is discussed in terms of carrier transportation through the spatially fluctuating barrier. 相似文献
10.
All RF sputtering-deposited Pt/SiO2/n-type indium gallium nitride (n-InGaN) metal–oxide–semiconductor (MOS) diodes were investigated before and after annealing at 400 °C. By scanning electron microscopy (SEM), the thickness of Pt, SiO2, n-InGaN layer was measured to be ~250, 70, and 800 nm, respectively. AFM results also show that the grains become a little bigger after annealing, the surface topography of the as-deposited film was smoother with the rms roughness of 1.67 nm and had the slight increase of 1.92 nm for annealed sample. Electrical properties of MOS diodes have been determined by using the current–voltage (I–V) and capacitance–voltage (C–V) measurements. The results showed that Schottky barrier height (SBH) increased slightly to 0.69 eV (I–V) and 0.82 eV (C–V) after annealing at 400 °C for 15 min in N2 ambient, compared to that of 0.67 eV (I–V) and 0.79 eV (C–V) for the as-deposited sample. There was the considerable improvement in the leakage current, dropped from 6.5×10−7 A for the as-deposited to 1.4×10−7 A for the 400 °C-annealed one. The annealed MOS Schottky diode had shown the higher SBH, lower leakage current, smaller ideality factor (n), and denser microstructure. In addition to the SBH, n, and series resistance (Rs) determined by Cheungs׳ and Norde methods, other parameters for MOS diodes tested at room temperature were also calculated by C–V measurement. 相似文献
11.
Thin films of nickel phthalocyanine (NiPc) were prepared by thermal evaporation and the effects of annealing temperature on the structural and optical properties of the samples were studied using different analytical methods. Structural analysis showed that the grain size and crystallinity of NiPc films improved as annealing temperature increased from 25 to 150 °C. Also, maximum grain size (71.3 nm) was obtained at 150 °C annealing temperature. In addition, NiPc films annealed at 150 °C had a very smooth surface with an RMS roughness of 0.41 nm. Optical analysis indicated that band gap energy of films at different annealing temperatures varied in the range of 3.22–3.28 eV. Schottky diode solar cells with a structure of ITO/PEDOT:PSS/NiPc/Al were fabricated. Measurement of the dark current density–voltage (J–V) characteristics of diodes showed that the current density of films annealed at 150 °C for a given bias was greater than that of other films. Furthermore, the films revealed the highest rectification ratio (23.1) and lowest barrier height (0.84 eV) demonstrating, respectively, 23% and 11% increase compared with those of the deposited NiPc films. Meanwhile, photoconversion behavior of films annealed at 150 °C under illumination showed the highest short circuit current density (0.070 mA/cm2) and open circuit voltage of (0.55 V). 相似文献
12.
We studied the electrical properties of organic photovoltaic (OPV) devices based on poly (3-hexylthiophene) and fullerene derivative [6, 6]-Phenyl-C70-butyric acid methyl ester nanocomposite (P3HT:PC70BM) as a function of the annealing temperature. Thermal annealing enables crystallization of the polymer and diffusion of the PC70BM molecules. Diode parameters, such as the barrier height ϕb and the ideality factor n were calculated. They were found to be depend strongly on the annealing temperature. This dependence is attributed to surface states, inhomogeneity in the material and series resistance. Best OPV devices had a short circuit current density of 3.35 mA/cm2, an open circuit voltage of 0.68 V, a fill factor of 0.45, and a power conversion efficiency of 2.2%, by applying a thermal annealing temperature of 150 °C for 10 min. 相似文献
13.
D.E. Yıldız Ş. Altındal Z. Tekeli M. Özer 《Materials Science in Semiconductor Processing》2010,13(1):34-40
We have fabricated two types of Schottky barrier(SBDs),Au/SnO2/n-Si (MIS1) and Al/SnO2/p-Si (MIS2), to investigate the surface (Nss) and series resistance (Rs) effect on main electrical parameters such as zero-bias barrier height (ΦBo) and ideality factor (n) for these SBDs. The forward and reverse bias current–voltage (I–V) characteristics of them were measured at 200 and 295 K, and experimental results were compared with each other. At temperatures of 200 and 295 K, ΦBo, n, Nss and Rs for MIS1 Schottky diodes (SDs) ranged from 0.393 to 0.585 eV, 5.70 to 4.75, 5.42×1013 to 4.27×1013 eV?1 cm?2 and 514 to 388 Ω, respectively, whereas for MIS2 they ranged from 0.377 to 0.556 eV, 3.58 to 2.1, 1.25×1014 to 3.30×1014 eV?1 cm?2 and 312 to 290 Ω, respectively. The values of n for two types of SBDs are rather than unity and this behavior has been attributed to the particular distribution of Nss and interfacial insulator layer at the metal/semiconductor interface. In addition, the temperature dependence energy density distribution profiles of Nss for both MIS1 and MIS2 SBDs were obtained from the forward bias I–V characteristics by taking into account the bias dependence of effective barrier height (Φe) and Rs. Experimental results show that both Nss and Rs values should be taken into account in the forward bias I–V characteristics. It has been concluded that the p-type SBD (MIS2) shows a lower barrier height (BH), lower Rs, n and Nss compared to n-type SBD (MIS1), which results in higher current at both 200 and 295 K. 相似文献
14.
Choon-Woo Nahm 《Materials Science in Semiconductor Processing》2013,16(3):778-785
The effects of sintering temperature on the microstructure, electrical properties, and dielectric characteristics of ZnOV2O5MnO2Nb2O5Er2O3 semiconducting varistors have been studied. With increase in sintering temperature the average grain size increased (4.5–9.5 μm) and the density decreased (5.56–5.45 g/cm3). The breakdown field decreased with an increase in the sintering temperature (6214–982 V/cm). The samples sintered at 900 °C exhibited remarkably high nonlinear coefficient (50). The donor concentration increased with an increase in the sintering temperature (0.60×1018–1.04×1018 cm?3) and the barrier height exhibited the maximum value (1.15 eV) at 900 °C. As the sintering temperature increased, the apparent dielectric constant increased by more than four-fold. 相似文献
15.
A Mo/n-type 6H-SiC/Ni Schottky barrier diode (SBD) was fabricated by sputtering Mo metal on n-type 6H-SiC semiconductor. Before the formation of Mo/n-type 6H-SiC SBD, an ohmic contact was formed by thermal evaporation of Ni on n-type 6H-SiC and annealing at 950 °C for 10 min. It was seen that the structure had excellent rectification. The electrical parameters were extracted using its current–voltage (I–V) and capacitance–voltage (C–V) measurements carried out at room temperature. Very high (1.10 eV) barrier height and 1.635 ideality factor values were reported for Mo/n-type 6H-SiC using ln I–V plot. The barrier height and series resistance values of the diode were also calculated as 1.413 eV and 69 Ω from Norde׳s functions, respectively. Furthermore, 1.938 eV barrier height value of Mo/n-type 6H-SiC SBD calculated from C–V measurements was larger than the one obtained from I–V data. 相似文献
16.
《Materials Science in Semiconductor Processing》2012,15(4):386-392
We report fabrication and electrical characterization of GaAs based metal-interfacial layer-semiconductor (MIS) device with poly[2-methoxy-5-(2/-ethyl-hexyloxy)-1,4-phenylene vinylene] (MEH-PPV), as an interfacial layer. MEH-PPV raises the barrier height in Al/MEH-PPV/p-GaAs MIS device as high as to 0.87 eV. A Capacitance-Voltage (C–V) characteristic exhibits a low hysteresis voltage with an interface states density of 1.69×1011 cm−2 eV−1. Moreover, a high transition frequency (fc) of about 50 kHz was observed in the accumulation mode. The photovoltaic response of Al/MEH-PPV/p-GaAs device was measured under the air masses (AM) 1.0 and 1.5. The open circuit voltage (VOC), short circuit current (ISC), fill factor and the efficiency of the Al/MEH-PPV/p-GaAs device were found to be 1.10 V, 0.52 mA, 0.65, and 5.92%, respectively, under AM 1.0 condition. 相似文献
17.
18.
A. Shanmugavel K. Srinivasan K.R. Murali 《Materials Science in Semiconductor Processing》2013,16(6):1665-1671
Copper indium sulpho selenide films of different composition were deposited by the pulse plating technique at 50% duty cycle (15 s ON and 15 s OFF). X-ray diffraction studies indicated the formation of single phase chalcopyrite copper indium sulpho selenide films. Transmission Electron Microscope studies indicated that the grain size increased from 10 nm–40 nm as the selenium content increased. The band gap of the films was in the range of 0.95 eV–1.44 eV. Room temperature resistivity of the films is in the range of 16.0 Ω cm–33.0 Ω cm. Films of different composition used in photoelectrochemical cells have exhibited photo output. Films of composition, CuInS0.9Se0.1 have exhibited maximum output, a VOC of 0.74 V, JSC of 18.50 mA cm?2, ff of 0.75 and efficiency of 11.40% for 60 mW cm?2 illumination. 相似文献
19.
In the paper, SnOx thin films were deposited by reactive magnetron sputtering from a tin target in O2 containing working gas. The evolution from Sn-containing SnO to tetravalent SnO2 films was investigated. The films could be classified into three groups according to their optical band gaps, which are Eg<2.5 eV, Eg=3.0–3.3 eV and Eg>3.7 eV. The electric measurements show that high conductivity can be obtained much easier in SnO2 than in SnO films. A high electron mobility of 15.7 cm2 V−1 s−1, a carrier concentration of 1.43×1020 cm−3 and a resistivity of 2.8×10−3 Ω cm have been achieved in amorphous SnO2 films. Films with the optical band gap of 3.0–3.3 eV remain amorphous though the substrate temperature is as high as 300 °C, which implies that °btaining high mobility in p-type SnO is more challenging in contrast to n-type SnO2 films. 相似文献
20.
C.P. Chen T.D. Lin Y.J. Lee Y.C. Chang M. Hong J. Kwo 《Solid-state electronics》2008,52(10):1615-1618
A self-aligned process for fabricating inversion n-channel metal–oxide–semiconductor field-effect-transistors (MOSFET’s) of strained In0.2Ga0.8As on GaAs using TiN as gate metal and Ga2O3(Gd2O3) as high κ gate dielectric has been developed. A MOSFET with a 4 μm gate length and a 100 μm gate width exhibits a drain current of 1.5 mA/mm at Vg = 4 V and Vd = 2 V, a low gate leakage of <10?7 A/cm2 at 1 MV/cm, an extrinsic transconductance of 1.7 mS/mm at Vg = 3 V, Vd = 2 V, and an on/off ratio of ~105 in drain current. For comparison, a TiN/Ga2O3(Gd2O3)/In0.2Ga0.8As MOS diode after rapid thermal annealing (RTA) to high temperatures of 750 °C exhibits excellent electrical and structural performances: a low leakage current density of 10?8–10?9 A/cm2, well-behaved capacitance–voltage (C–V) characteristics giving a high dielectric constant of ~16 and a low interfacial density of state of ~(2~6) × 1011 cm?2 eV?1, and an atomically sharp smooth Ga2O3(Gd2O3)/In0.2Ga0.8As interface. 相似文献