光MOS固体继电器抗电离辐射研究

分析了光MOS固体继电器在电离辐照条件下的失效模式,并针对组成器件的不同元器件提出了抗辐射的设计方案。采取了包括优化材料、合理设计器件结层厚度、选用抗辐射能力强的钝化膜等工艺技术制作样品,并通过试验对比确认了抗辐射方案的有效性,结果表明,器件抗辐照能力大于30krad（Si）,能够满足对星用光MOS固体继电器抗辐射能力的要求。     

Zero-voltage-ripple rectifiers and DC/DC resonant converters

Class E zero-voltage-ripple (ZVR) rectifiers are introduced. The proposed circuits offer a new means of a significant improvement in suppressing the output voltage ripple compared with their predecessors. Therefore, the size of the output filter can be considerably reduced, the rI_rms² conduction power loss in the equivalent series resistance of the filter capacitor can be lowered, aluminum or tantalum electrolytic capacitors may be entirely eliminated, filter capacitors with low capacitances and thereby high self-resonant frequencies can be used, and a faster dynamic response becomes achievable. ZVR is accomplished by reducing the AC component of the current at the input of the output filter. Class E² and Class D-E ZVR resonant DC/DC power converters are derived using the Class E ZVR rectifiers. An experimental prototype of a Class E² 30 W/500 kHz DC/DC converter was built and tested. Its output voltage ripple was as much as 20 times lower than that of the corresponding conventional converter. The new converters are suitable for noise-sensitive high-output-current applications     

New zero voltage switching DC converter with flying capacitors

A new soft switching converter is presented for medium power applications. Two full-bridge converters are connected in series at high voltage side in order to limit the voltage stress of power switches at V_in/2. Therefore, power metal–oxide–semiconductor field-effect transistors (MOSFETs) with 600 V voltage rating can be adopted for 1200 V input voltage applications. In order to balance two input split capacitor voltages in every switching cycle, two flying capacitors are connected on the AC side of two full-bridge converters. Phase-shift pulse-width modulation (PS-PWM) is adopted to regulate the output voltage. Based on the resonant behaviour by the output capacitance of MOSFETs and the resonant inductance, active MOSFETs can be turned on under zero voltage switching (ZVS) during the transition interval. Thus, the switching losses of power MOSFETs are reduced. Two full-bridge converters are used in the proposed circuit to share load current and reduce the current stress of passive and active components. The circuit analysis and design example of the prototype circuit are provided in detail and the performance of the proposed converter is verified by the experiments.     

变电站直流系统中交流侵入问题分析

直流系统是变电站电网建设的重要内容,确保直流系统的稳定运行,能实现变电站整体的有效监测,为继电保护、控制和信号传输提供支撑。现阶段,交流侵入是变电站直流系统运行的主要问题。因此,在阐述交流侵入类型的基础上,就变电站直流系统中交流侵入的影响展开分析,并指出直流系统中交流侵入的应对策略。期望这有利于控制交流侵入问题,进而保证直流系统运行质量,实现变电站电网系统的现代化控制与管理。     

稳压直流电源用铝电解电容器主要失效模式及解决措施

小型稳压直流电源用铝电解电容器上机后有两种规格的电容器失效率高 ,且主要失效模式为开路。开路的根本原因是电容器高度超过允许安装高度。提出了从使用方法和生产工艺方面的解决措施     

Diode-clamped multilevel converters: a practicable way to balance DC-link voltages

The converter topologies identified as diode-clamped multilevel (DCM) or, equivalently, as multipoint clamped (MPC), are rarely used in industrial applications, owing to some serious drawbacks involving mainly the stacked bank of capacitors that constitutes their multilevel DC link. The balance of the capacitor voltages is not possible in all operating conditions when the MPC converter possesses a passive front end. On the other hand, in AC/DC/AC power conversion, the back-to-back connection of a multilevel rectifier with a multilevel inverter allows the balance of the DC-link capacitor voltages and, at the same time, it offers the power-factor-correction capability at the mains AC input. An effective balancing strategy suitable for MPC conversion systems with any number of DC-link capacitors is presented here. The strategy has been carefully studied to optimize the converter efficiency. The simulation results related to a high-power conversion system (up to 10 MW) characterized by four intermediate DC-link capacitors are shown.     

On the use of current control scheme for switched-capacitor DC/DCconverters

This paper presents an investigation into the use of a current control scheme (CCS) and a comparison with a classical switching scheme for switched-capacitor (SC) step-down DC/DC converters. With the CCS, capacitors are charged with near-constant current, controlled by the gate-source voltage of MOSFETs. By paralleling two SC cells, the converter input current becomes continuous, resulting in much reduced conducted electromagnetic interference with other circuits fed by the same power supply. All MOSFETs are operated for half of the switching period, in order to improve the regulation capability. Static and dynamic behaviors of the converter with the CCS are predicted and confirmed in an experimental 36 W 12 V/9 V prototype     

Zero-voltage DC/DC converter with asymmetric pulse-width modulation for DC micro-grid system

This paper presents a zero-voltage switching DC/DC converter for DC micro-grid system applications. The proposed circuit includes three half-bridge circuit cells connected in primary-series and secondary-parallel in order to lessen the voltage rating of power switches and current rating of rectifier diodes. Thus, low voltage stress of power MOSFETs can be adopted for high-voltage input applications with high switching frequency operation. In order to achieve low switching losses and high circuit efficiency, asymmetric pulse-width modulation is used to turn on power switches at zero voltage. Flying capacitors are used between each circuit cell to automatically balance input split voltages. Therefore, the voltage stress of each power switch is limited at V_in/3. Finally, a prototype is constructed and experiments are provided to demonstrate the circuit performance.     

SEGR- and SEB-hardened structure with DSPSOI in power MOSFETs

Single event irradiation-hardened power MOSFET is the most important device for DC/DC converter in space environment application.Single event gate rupture (SEGR) and single event burnout (SEB),which will degrade the running safety and reliability of spacecraft,are the two typical failure modes in power MOSFETs.In this paper,based on recombination mechanism of interface between oxide and silicon,a novel hardened power MOSFETs structure for SEGR and SEB is proposed.The structure comprises double stagger partial silicon-on-insulator (DSPSOI) layers.Results show that the safety operation area (SOA) of a 130 V N-channel power MOSFET in single event irradiation environment is enhanced by up to 50％ when the linear-energy-transfer value of heavy ion is a constant of 98 MeV.cm2/mg in the whole incident track,and the other parameters are almost maintained at the same value.Thus this novel structure can be widely used in designing single event irradiation-hardened power MOSFETs.     

ANDREI-a minicomputer nonlinear analysis program for integrated circuits

A circuit analysis program, ANDREI, has been developed which can be run on a 32K 16-bit word minicomputer with a disk unit. A novel virtual storage scheme is used to save internal memory required by large arrays. The nonlinear DC and transient and small-signal AC analyses of circuits up to 150 nodes and 150 elements can be performed in the present version. Semiconductor device models for diodes, bipolar junction transistors, junction- and MOSFETs are built in. ANDREI runs presently on a 32K VARIAN 73 minicomputer.     

An electromigration failure model for interconnects under pulsedand bidirectional current stressing

An electromigration failure model which can be used to project the electromigration lifetime under pulsed DC and AC current stressing has been reported. The experimental results indicate that different metallization systems (Al-2%Si, Al4%Cu/TiW, and Cu) show similar failure behaviors, which can be explained and predicted by this model. The pulsed DC lifetime is found to be longer than DC lifetime, and the AC lifetime is found to be very much longer. This recognition can provide significant relief to circuit designs involving metals carrying pulsed DC and AC currents, and allow a more aggressive design to improve circuit density and speed     

Mechanisms for hot-carrier-induced degradation inreoxidized-nitrided-oxide n-MOSFET's under combined AC/DC stressing

Hot-carrier-induced degradation behavior of reoxidized-nitrided-oxide (RNO) n-MOSFETs under combined AC/DC stressing was extensively studied and compared with conventional-oxide (OX) MOSFETs. A degradation mechanism is proposed in which trapped holes in stressed gate oxide are neutralized by an ensuing hot-electron injection, leaving lots of neutral electron traps in the gate oxide, with no significant generation of interface states. The degradation behavior of threshold voltage, subthreshold gate-voltage swing, and charge-pumping current during a series of AC/DC stressing supports this proposed mechanism. RNO device degradation during AC stressing arises mainly from the charge trapping in gate oxide rather than the generation of interface states due to the hardening of the Si-SiO₂ interface by nitridation/reoxidation steps     

提取神经电信号的单片集成CMOS前置放大器的仿真研究

提出一种用于提取神经电信号的新型单片集成CMOS前置放大器.在放大器输入端引入的交流耦合电容可以消除存在于电极-电解液之间的电极极化电压,栅源电压为负值的二极管连接的nMOS晶体管能够作为大电阻,并且占用很小芯片面积,可以通过此大电阻为前置放大器提供直流偏置,同时不影响输入阻抗值.通过对输入级进行理论噪声分析,确定了放大器中的各个器件参数.仿真结果表明,由于采用电容负反馈结构,此放大器的交流增益为38.8dB,无直流增益,在0.1Hz～1kHz频率范围内,总输入等效噪声为277nVrms.     

输入电流接近正弦波的整流器在风力发电中的应用

基于最基本的解决方法，提出了由电感器，电容器和二极管所组成的三相低谐波二极管整流器的拓扑结构。其中的电感器和电容器与三相二极管整流桥一起作用以改善网侧的电流波形。基于这一拓扑结构，本文提出了一种维持电流很小的交／直变流器和一种在风力发电中应用的可四象限运行的频率变化器。     

Determining constant voltage lifetimes for silicon nitride capacitors in a GaAs IC process by a step stress method

The lifetimes of metal–insulator–metal (MIM) capacitors are predicted from voltage step stress data. Capacitor areas of 400, 5625 and 11,250 μm² are investigated. The reliability of capacitors subjected to a single or triple DC pulse prior to a breakdown voltage ramp test is predicted at use conditions (5 V). The method of maximum likelihood is employed in this analysis. With this approach, it is found that the effect of capacitor area on the linear field acceleration parameter, γ, is not statistically significant. Also, it is demonstrated that either a single or a triple DC pulse seriously reduces both the MTTF and γ. Further, the triple DC pulse can change the failure distribution from lognormal to Weibull. The data are also fitted to the reciprocal field model and the predicted failure times under use conditions are too large to be physically reasonable, favoring the linear field model. A graphical method is suggested for discerning between the lognormal and Weibull distributions.This study makes extensive use of statistical methods. One of our goals in this paper is to make the reliability community aware of these powerful techniques so that they may become more widespread.     

The coupled inductor filter: analysis and design for AC systems

Coupled inductors have been used in specific DC-to-DC converters to provide ripple-current steering. Switching ripple currents may be preferentially directed away from a source or a load. This paper shows that general purpose filters can be produced using coupled inductors and capacitors. These are equally applicable to AC and DC applications. A transfer function is developed for a filter based on a coupled inductor and capacitor. The resulting filter is third order and is significantly more effective than an inductor. The sensitivity of the filter to errors in the turns ratio is examined. Finally, results from an experimental power factor correction circuit are presented     

Applications of the pulsed current-voltage (I-V) and capacitance-voltage (C-V) techniques for high-resistive gates in MOSFETs

Most modern semiconductor laboratories are equipped with scanning electron or atomic force microscopes based nanoprobing systems for electrical measurement of advanced technology node devices. These nanoprobing systems use a scanning electron or an atomic force microscope in their design to image and make electrical connection to the nanoscale contacts on these devices to perform DC electrical tests and examine their electric properties. While the conventional sweep DC I-V curves can reveal most failures in MOSFETs (metal-oxide-semiconductor field-effect-transistors), DC I-V tests have been found to be insufficient for identifying high-resistive gate faults. New techniques based on the pulsed I-V and high-frequency C-V measurements have been recently developed for detecting these high-resistive gate defects in these devices. In this paper, several test samples were manufactured and later measured using both the pulsed I-V and C-V methods to confirm their applicability. Finally, several real resistive gate device failure cases were examined using these same methods.     

Impacts of the recovery phenomena on the worst-case of damage in DC/AC stressed ultra-thin NO gate-oxide MOSFETs

Permanent damage induced by Channel Hot-Carrier (CHC) injections have been distinguished from the charge–discharge of near-interface traps in ultra-thin gate-oxide (1.6 nm) MOSFETs. It is shown that usual DC accelerating techniques mostly devoted to CHC damage at large voltage conditions cannot be used alone for low supply voltage (V_DD = 1V) MOSFETs. This arises from the charging of slow traps which induces a worst-case of damage which is relaxing in different ways depending on the discharging bias and cold phases. This is particularly more severe under hole injections in P-channel than under electron injections in N-channel MOSFETs in relation to the smaller mobility of holes and to the gate-oxide nitridation which induces deep traps from the oxide valence band. The true effects of the distinct damage and relaxations are further analysed using AC stresses which are required for the worst-case determination in advanced logic circuits. This is further evidenced by the determination of the effective quasi-static time factors dependent on the alternated damaging, discharging, and relaxing periods involved in ultra-thin gate-oxide MOSFETs operating at low voltage.     

Electromigration reliability of tungsten and aluminum vias andimprovements under AC current stress

The reliability with respect to electromigration failure of tungsten and aluminum vias under DC, pulse-DC, and AC stressing has been studied using Kelvin test structures. The results indicate that although W-plug vias can eliminate the step coverage problem, this metallization system is not ideal because the intermetallic contact represents an undesirable flux divergence location for electromigration. Al vias are more reliable than W-plug vias with respect to electromigration failure. The unidirectional 50% duty factor pulse-DC lifetime is found to be twice the DC lifetime in the low-frequency region (<200 Hz) and four times the DC lifetime in the normal frequency region (> 10 kHz). The via lifetimes under bidirectional stressing current are found to be orders of magnitude longer than DC lifetimes under the same stressing current density for both W and Al vias. All the observations are in agreement with a vacancy relaxation model     

The Investigation on Single Event Function Failure for DC/DC Converters with Three Single Terminal Topological Structures

Heavy ion radiation experiments have been done to DC/DC converters with different topological structures for space applications.The test results were analyzed about the function failure of three topological structures caused by single event effects.The relationship between the function failure and the input supply voltage,the output load current and the topological structure of the module were discussed.Based on the analysis of the variation relationship among the source/drain terminal voltage of MOSFETs and the input voltage and the output load,the sensitivity factors associated with the function failure caused by single event effects were discussed.A new analysis on single event function failure of DC/DC converter based on different topologies has been presented,which can be applied to radiation hardened design and space application.