Enhanced Transmission in a Fiber-Coupled Au Stripe Waveguide System

We experimentally demonstrated the enhanced transmission in a fiber-coupled Au stripe waveguide system using a linearly tapered (LT) structure at a telecommunication wavelength of 1.55 $mu{hbox {m}}$. The LT structure consists of two 100- $mu{hbox {m}}$-long tapered regions connecting various widths of input and output waveguides with a waist region. The lowest insertion loss of the 1-cm-long LT-Au stripe waveguide is $sim$4.3 dB, when it has 6-$mu{hbox {m}}$ -wide input and output waveguides and a 4- $mu{hbox {m}}$-wide waist waveguide. The insertion loss is reduced by $sim$ 2 dB compared to the 4-$mu{hbox {m}}$-wide and 1-cm-long straight Au stripe waveguide, which is achieved by decreasing the coupling loss. The losses of the LT region, which has a tapered angle of less than 0.3$^{circ}$ between the input–output waveguides and the waist waveguide, are smaller than 0.4 dB. We showed that the insertion loss of the Au stripe waveguide can be reduced by introducing the LT structure, which can also provide efficient mode conversion.      

10-GHz and 20-GHz Channel Spacing High-Resolution AWGs on InP

This letter reports on 10-GHz and 20-GHz channel-spacing arrayed waveguide gratings (AWGs) based on InP technology. The dimensions of the AWGs are 6.8$,times,$8.2 mm$^{2}$ and 5.0$,times,$6.0 mm$^{2}$, respectively, and the devices show crosstalk levels of $-$12 dB for the 10-GHz and $-$17 dB for the 20-GHz AWG without any compensation for the phase errors in the arrayed waveguides. The root-mean-square phase errors for the center arrayed waveguides were characterized by using an optical vector network analyzer, and are 18 $^{circ}$ for the 10-GHz AWG and 28$^{circ}$ for the 10-GHz AWG.      

An Analytical Method to Extract the Physical Parameters of a Solar Cell From Four Points on the Illuminated $J{-}V$ Curve

For a variety of solar cells, it is shown that the single exponential $J{-}V$ model parameters, namely—ideality factor $eta$ , parasitic series resistance $R_{s}$, parasitic shunt resistance $R_{rm sh}$, dark current $J_{0}$, and photogenerated current $J_{rm ph}$ can be extracted simultaneously from just four simple measurements of the bias points corresponding to $V_{rm oc}$, $sim!hbox{0.6}V_{rm oc}$, $J_{rm sc}$, and $sim! hbox{0.6}J_{rm sc}$ on the illuminated $J{-}V$ curve, using closed-form expressions. The extraction method avoids the measurements of the peak power point and any $dJ/dV$ (i.e., slope). The method is based on the power law $J{-}V$ model proposed recently by us.      

InGaAs/GaAs 0.98- $mu{hbox {m}}$ Low-Divergence Central-Lobe Semiconductor Lasers With $delta$ -Doped Resonant Tunneling Quantum Wells

In this paper, we describe a new structure design for producing low-threshold, high-efficiency, and high-brightness 0.98-$mu{hbox {m}}$ lasers. In this structure, we incorporated a self-discriminating weak optical confinement asymmetrical waveguide coupled to passive waveguides, and an active region based on three InGaAs quantum wells (QWs) coupled to Te n-type $delta$-doping. Optimized coupling between the $delta$-doping and the three QWs, together with waveguide optimization and doping profile optimization, yields $J_{rm th}=98 {hbox {A/cm}}^{2}$ per QW, ${T}_{0}=80;^{circ}hbox{C}$, and a far-field central lobe angle of $sim 10^{circ}$.      

Near-Stoichiometric Ti : LiNbO$_{3}$ Strip Waveguides Fabricated by Standard Ti Diffusion and Post-VTE

We report near-stoichiometric (NS) Ti : LiNbO$_{3}$ waveguides fabricated by indiffusion of 4-, 5-, 6-, 7- $mu{hbox {m}}$-wide 120-nm-thick Ti-strips at 1060 $^{circ}hbox{C}$ for 10 h into a congruent $hbox{LiNbO}_{3}$ (i.e., standard Ti diffusion procedure) and post-vapour-transport-equilibration (VTE) treatment at 1100 $^{circ}hbox{C}$ for 5 h. These waveguides are NS and single-mode at 1.5 $mu{hbox {m}}$, and have a loss of 1.0/0.8 dB/cm for the TM/TE mode. In the width/depth direction of the waveguide, the mode field follows a Gauss/Hermite–Gauss profile, and the Ti profile follows a sum of two error functions/a Gauss function. The post-VTE resulted in increase of diffusion width/depth by 2.0/1.0 $mu{hbox {m}}$. A two-dimensional refractive index profile in the guiding layer is suggested.      

Compact Microracetrack Resonator Devices Based on Small SU-8 Polymer Strip Waveguides

Compact microracetrack resonator (MRR) devices are presented with small SU-8 polymer strip waveguides. The SU-8 strip waveguide has an SU-8 polymer core $(n {sim} 1.573)$ , a SiO$_{2}$ buffer $(n {sim} 1.445)$, and an air cladding. The fabricated straight waveguide has a low propagation loss of about 0.1 dB/mm. With such a high index-contrast optical waveguide, a compact MRR with a small bending radius ( $sim$150 $mu$m) are designed and fabricated. The measured spectral responses of the through/drop ports show a $Q$-factor of 8000.      

A 10:1 Unequal Wilkinson Power Divider Using Coupled Lines With Two Shorts

A novel unequal Wilkinson power divider is presented. A coupled-line section with two shorts is proposed to realize the high characteristic impedance line, which cannot be implemented by conventional microstrip fabrication technique due to fabrication limitation. The proposed coupled-line structure is compatible with single layer integration and can be easily designed based on an even-odd mode analysis. As a design example, a 10:1 Wilkinson power divider at 2 GHz is fabricated and measured. The measured $-10~{rm dB}$ bandwidth of $S_{11}$ is about 16%, and the isolation $S_{32}$ is better than $-20~{rm dB}$ . The measured amplitude balance between output port 2 and port 3 is between $-10.20~{rm dB}$ and $-9.52~{rm dB}$, and the corresponding phase difference is between 0$^{circ}$ and 4.6$^{circ}$.      

A 3–10 GHz CMOS UWB Low-Noise Amplifier With ESD Protection Circuits

A low-power fully integrated low-noise amplifier (LNA) with an on-chip electrostatic-static discharge (ESD) protection circuit for ultra-wide band (UWB) applications is presented. With the use of a common-gate scheme with a ${rm g}_{rm m}$ -boosted technique, a simple input matching network, low noise figure (NF), and low power consumption can be achieved. Through the combination of an input matching network, an ESD clamp circuit has been designed for the proposed LNA circuit to enhance system robustness. The measured results show that the fabricated LNA can be operated over the full UWB bandwidth of 3.0 to 10.35 GHz. The input return loss $({rm S}_{11})$ and output return loss $({rm S}_{22})$ are less than ${-}8.3$ dB and ${-}9$ dB, respectively. The measured power gain $({rm S}_{21})$ is $11 pm 1.5$ dB, and the measured minimum NF is 3.3 dB at 4 GHz. The dc power dissipation is 7.2 mW from a 1.2 V supply. The chip area, including testing pads, is 1.05 mm$,times,$ 0.73 mm.      

Low-Threshold Strained Quantum-Well GaSb-Based Lasers Emitting in the 2.5- to 2.7-$mu$ m Wavelength Range

GaInAsSb–GaSb strained quantum-well (QW) ridge waveguide diode lasers emitting in the wavelength range from 2.51 to 2.72 $ mu{hbox {m}}$ have been grown by molecular beam epitaxy. The devices show ultralow threshold current densities of 44 $hbox{A}/{hbox {cm}}^{2}$ (${L}rightarrow infty $) for a single QW device at 2.51 $ mu{hbox {m}}$, which is the lowest reported value in continuous-wave operation near room temperature (15 $^{circ}hbox{C}$) at this wavelength. The devices have an internal loss of 3 ${hbox {cm}}^{-1}$ and a characteristic temperature of 42 K. By using broader QWs, wavelengths up to 2.72 $mu{hbox {m}}$ could be achieved.      

CMOS Avalanche Photodiode Embedded in a Phase-Shift Laser Rangefinder

This paper presents the design and the characterization of a CMOS avalanche photodiode (APD) working as an optoelectronic mixer. The $hbox{P}^{+}hbox{N}$ photodiode has been implemented in a commercial 0.35-$muhbox{m}$ CMOS technology after optimization with SILVACO. The surface of the active region is $ hbox{3.78} cdot hbox{10}^{-3} hbox{cm}^{2}$. An efficient guard-ring structure has been created using the lateral diffusion of two n-well regions separated by a gap of 1.2 $mu hbox{m}$. When biased at $-$2 V, the best responsitivity $S_{lambda ,{rm APD}} = hbox{0.11} hbox{A/W}$ is obtained at $lambda = hbox{500} hbox{nm}$. This value can easily be improved by using an antireflection coating. At $lambda = hbox{472} hbox{nm}$, the internal gain is about 75 at $-$6 V and 157 at $-$7 V. When biased at $-$6 V, the APD achieves a dark current of 128 $muhbox{A} cdot hbox{mm}^{-2}$ and an excess noise factor $F = hbox{20}$ . Then, the APD is successfully used as an optoelectronic mixer to improve the signal-to-noise ratio of a low-voltage embedded phase-shift laser rangefinder.      

$N times N$ Cyclic-Frequency Router With Improved Performance Based on Arrayed-Waveguide Grating

We have developed an $N times N$ cyclic-frequency router with improved performance by employing two types of modified configuration; a uniform-loss and cyclic-frequency (ULCF) arrayed-waveguide grating (AWG) and an interconnected multiple AWG. We have demonstrated a compact 50-GHz-spacing 64 $,times,$64 ULCF-AWG router with low and uniform insertion losses of 5.4–6.8 dB and frequency deviations from the grid of less than $pm {8}~{rm GHz}$. We have also demonstrated a 100-GHz-spacing 8$,times,$8 interconnected multiple-AWG router with a practical configuration, very low and uniform insertion losses of 2.3–3.4 dB, and frequency deviations from the grid of less than $pm {6}~{rm GHz}$. We discuss the suitable or realizable scale $N$ of the two types of routers by comparison with a conventional AWG router in terms of optical and dimensional performance and productivity.      

Characterization and Modeling of RF-Performance $(f_{T})$ Fluctuation in MOSFETs

The fluctuation of RF performance (particularly for $f_{T}$ : cutoff frequency) in the transistors fabricated by 90-nm CMOS technology has been investigated. The modeling for $f_{T}$ fluctuation is well fitted with the measurement data within approximately 1% error. Low-$V_{t}$ transistors (fabricated by lower doping concentration in the channel) show higher $f_{T}$ fluctuation than normal transistors. Such a higher $f_{T}$ fluctuation results from $C_{rm gg}$ (total gate capacitance) variation rather than $g_{m}$ variation. More detailed analysis shows that $C_{rm gs} + C_{rm gb}$ (charges in the channel and the bulk) are predominant factors over $C_{rm gd}$ (charges in LDD/halo region) to determine $C_{rm gg}$ fluctuation.      

Tunable Linear MOS Resistors Using Quasi-Floating-Gate Techniques

A family of tunable MOS resistors based on quasi-floating-gate (QFG) transistors biased in the triode region is analyzed in this paper. From the study results, a new device that outperforms previous implementations, is presented. By means of a capacitive divider, the ac component of the drain-to-source voltage scaled with a factor $alphaleq 1$ is added to the gate-to-source voltage leading to a cancellation of the nonlinear terms. The effect of $alpha$ on resistor linearity is analytically studied. Simulation results are also provided for different technologies. Finally, a complete transconductor has been built which preserves the linearity of the MOS resistor. Three versions of the transconductor have been fabricated for different values of $alpha$ ($alpha=$ 0, 0.5, and 1) in a 0.5 $mu{hbox {m}}$ CMOS technology with $pm$1.65-V supply voltage. Experimental results show (for $alpha=1$ ) a THD of $-$ 57 dB $({rm HD}2=-70 {hbox {dB}})$ at 1 MHz for 2-V peak-to-peak differential input signal with a nominal ac-transconductance of 200 $muhbox{A/V}$ and a power consumption of 3.2 mW.      

Experimental Demonstration of Deeply-Etched SiO$_{2}$ Ridge Optical Waveguides and Devices

Deeply-etched ${hbox{SiO}}_{2}$ optical ridge waveguides are fabricated and characterized. A detailed discussion of the fabrication process (especially for the deep etching process) is presented. The measured propagation losses for the fabricated waveguides with different core widths range from $0.33sim {hbox {0.81}}~{hbox {dB}}/{hbox {mm}}$. The loss is mainly caused by the scattering due to the sidewall roughness. The losses in bending sections are also characterized, which show the possibility of realizing a small bending radius (several tens of microns). 1 $,times {rm N}$ ( ${rm N}=2$, 4, 8) multimode interference couplers based on the deeply-etched ${hbox{SiO}}_{2}$ ridge waveguide are also fabricated and show fairly good performances.      

17 GHz RF Front-Ends for Low-Power Wireless Sensor Networks

A 17 GHz low-power radio transceiver front-end implemented in a 0.25 $mu{hbox {m}}$ SiGe:C BiCMOS technology is described. Operating at data rates up to 10 Mbit/s with a reduced transceiver turn-on time of 2 $mu{hbox {s}}$, gives an overall energy consumption of 1.75 nJ/bit for the receiver and 1.6 nJ/bit for the transmitter. The measured conversion gain of the receiver chain is 25–30 dB into a 50 $Omega$ load at 10 MHz IF, and noise figure is 12 $pm$0.5 dB across the band from 10 to 200 MHz. The 1-dB compression point at the receiver input is $-$37 dBm and ${hbox{IIP}}_{3}$ is $-$25 dBm. The maximum saturated output power from the on-chip transmit amplifier is $-$1.4 dBm. Power consumption is 17.5 mW in receiver mode, and 16 mW in transmit mode, both operating from a 2.5 V supply. In standby, the transceiver supply current is less than 1 $mu{hbox {A}}$.      

Linear Systems, Sparse Solutions, and Sudoku

In this paper, we show that Sudoku puzzles can be formulated and solved as a sparse linear system of equations. We begin by showing that the Sudoku ruleset can be expressed as an underdetermined linear system: ${mmb{Ax}}={mmb b}$, where ${mmb A}$ is of size $mtimes n$ and $n>m$. We then prove that the Sudoku solution is the sparsest solution of ${mmb{Ax}}={mmb b}$, which can be obtained by $l_{0}$ norm minimization, i.e. $minlimits_{mmb x}Vert{mmb x}Vert_{0}$ s.t. ${mmb{Ax}}={mmb b}$. Instead of this minimization problem, inspired by the sparse representation literature, we solve the much simpler linear programming problem of minimizing the $l_{1}$ norm of ${mmb x}$, i.e. $minlimits_{mmb x}Vert{mmb x}Vert_{1}$ s.t. ${mmb{Ax}}={mmb b}$, and show numerically that this approach solves representative Sudoku puzzles.      

Breakdown Enhancement of AlGaN/GaN HEMTs on 4-in Silicon by Improving the GaN Quality on Thick Buffer Layers

We have achieved a 9- $muhbox{m}$-thick AlGaN/GaN high-electron mobility transistor (HEMT) epilayer on silicon using thick buffer layers with reduced dislocation density $(D_{D})$. The crack-free 9- $muhbox{m}$-thick epilayer included 2- $muhbox{m}$ i-GaN and 7- $ muhbox{m}$ buffer. The HEMTs fabricated on these devices showed a maximum drain–current density of 625 mA/mm, transconductance of 190 mS/mm, and a high three-terminal OFF breakdown of 403 V for device dimensions of $L_{g}/W_{g}/L_{rm gd} = hbox{1.5/15/3} muhbox{m}$ . Without using a gate field plate, this is the highest $BV$ reported on an AlGaN/GaN HEMT on silicon for a short $L_{rm gd}$ of 3 $muhbox{m}$. A very high $BV$ of 1813 V across 10- $mu hbox{m}$ ohmic gap was achieved for i-GaN grown on thick buffers. As the thickness of buffer layers increased, the decreased $D_{D}$ of GaN and increased resistance between surface electrode and substrate yielded a high breakdown.      

Temperature-Insensitive Dual-Comb Filter Based on Multimode Interference Ti : LiNbO $_{3}$ Waveguide

A temperature-insensitive dual-comb filter has been demonstrated for the first time by multimode interference based on a Ti : LiNbO$_{3}$ channel waveguide. The phase difference between comb filters was about 180 $^{circ}$. We only observed less than ${pm}$0.125-nm variation of the center wavelength of the filter during temperature change from 20 $^{circ}$C to 50 $^{circ}$C. The measured extinction ratio and channel spacing of the comb filter were about ${-}$25 dB and 3.2 THz, respectively.      

First Internal Spacers' Introduction in Record High $I_{rm ON}/I_{rm OFF} hbox{TiN/HfO}_{2}$ Gate Multichannel MOSFET Satisfying Both High-Performance and Low Standby Power Requirements

For the first time, internal spacers have been introduced in multichannel CMOSFET (MCFET) structures, featuring a decrease of the intrinsic $CV/I$ delay by 39%. The process steps introduced for this new MCFET technological option are studied and optimized in order to achieve excellent $I_{rm ON}/I_{rm OFF}$ characteristics (NMOS: 2.33 $hbox{mA}/muhbox{m}$ at 27 $hbox{pA}/muhbox{m}$ and PMOS: 1.52 $hbox{mA}/muhbox{m}$ at 38 $hbox{pA}/muhbox{m}$). A gate capacitance $C_{rm gg}$ reduction of 32% is measured, thanks to $S$-parameter extraction. Moreover, a significant improvement of the analogical figure of merit is measured compared with optimized fully depleted silicon-on-insulator planar reference; the voltage gain $A_{rm VI}(= g_{m}/g_{rm ds})$ is improved by 92%.      

Demonstration of Tunneling FETs Based on Highly Scalable Vertical Silicon Nanowires

This letter demonstrates a vertical silicon-nanowire (SiNW)-based tunneling field-effect transistor (TFET) using CMOS-compatible technology. With a $hbox{Si} hbox{p}^{+}{-}hbox{i}{-} hbox{n}^{+}$ tunneling junction, the TFET with a gate length of $sim$200 nm exhibits good subthreshold swing of $sim$ 70 mV/dec, superior drain-induced-barrier-lowering of $sim$ 17 mV/V, and excellent $I_{rm on} {-} I_{rm off}$ ratio of $sim!!hbox{10}^{7}$ with a low $I_{rm off} (sim!!hbox{7} hbox{pA}/muhbox{m})$. The obtained 53 $muhbox{A}/muhbox{m} I_{rm on}$ can be further enhanced with heterostructures at the tunneling interface. The vertical SiNW-based TFET is proposed to be an excellent candidate for ultralow power and high-density applications.