A Power-Efficient Configurable Low-Complexity MIMO Detector

In this paper, we propose a power-efficient configurable multiple-input–multiple-output (MIMO) detector, supporting QPSK, 16-QAM, and 64-QAM with low complexity. The approach divides a large MIMO detector into two subsystems: a core detector and a residual detector. The core detector, a low-cost 2$,times,$ 2 V-BLAST with ML detector, is used to detect the first two significant outputs. This detector not only efficiently increases the reliability of the entire MIMO detector through its ML performance in mitigating error propagation but also reduces the computational complexity by its search space reduction capability to decrease the computation from $O(C^2)$ to $O(C)$ ( $C$ is the constellation size). The residual detector is an ordered successive interference cancellation (OSIC) detector that detects the rest outputs. The results of bit-error-rate simulations demonstrate that the proposed detector significantly outperforms the OSIC detector. Furthermore, two complete ASIC implementations fabricated by 0.13- ${rm mu}{rm m}$ 1P8M CMOS technology are presented. We show that the proposed detector, which is configurable from 2$,times,$2 to 6$,times,$4 MIMO configurations, has the lowest complexity compared to other fabricated works with 64-QAM demodulation. Moreover, the measured normalized power efficiency of 3.8 Mb/s/mW is shown to be the most power-efficient design compared with the designs of other fabricated works.      

An Analytical Method to Extract the Physical Parameters of a Solar Cell From Four Points on the Illuminated $J{-}V$ Curve

For a variety of solar cells, it is shown that the single exponential $J{-}V$ model parameters, namely—ideality factor $eta$ , parasitic series resistance $R_{s}$, parasitic shunt resistance $R_{rm sh}$, dark current $J_{0}$, and photogenerated current $J_{rm ph}$ can be extracted simultaneously from just four simple measurements of the bias points corresponding to $V_{rm oc}$, $sim!hbox{0.6}V_{rm oc}$, $J_{rm sc}$, and $sim! hbox{0.6}J_{rm sc}$ on the illuminated $J{-}V$ curve, using closed-form expressions. The extraction method avoids the measurements of the peak power point and any $dJ/dV$ (i.e., slope). The method is based on the power law $J{-}V$ model proposed recently by us.      

A Dedicated Two-Channel Phased-Array Receiver Coil for High-Resolution MRI of the Rat Knee Cartilage at 7 T

In the field of small animal studies, the array coil imaging has become increasingly important. In this paper, a dedicated two-channel array coil operating at 300 MHz (7 T) for high-resolution MRI (HR-MRI) of the rat knee cartilage is presented. The average gain in signal-to-noise ratio (SNR) compared to a 15-mm multipurpose surface coil was 2.2. This SNR gain was used to improve the spatial resolution of 3-D acquisitions by decreasing the voxel size from 59$,times,$59 $,times,$156 $mu$m $^3$ to 51$,times,$51 $,times,$94 $mu$ m$^3$ without time penalty. Also, a set of two array coils was used to perform a simultaneous acquisition of both knee joints of a rat, maintaining the same scanning time without SNR or spatial resolution degradation compared to the single knee joint acquisition. This two-channel array coil is a key element to perform HR-MRI and extract cartilage morphological parameters such as thickness and volume.      

Virus Spread in Networks

The influence of the network characteristics on the virus spread is analyzed in a new—the $N$ -intertwined Markov chain—model, whose only approximation lies in the application of mean field theory. The mean field approximation is quantified in detail. The $N$ -intertwined model has been compared with the exact $2^{N}$-state Markov model and with previously proposed “homogeneous” or “local” models. The sharp epidemic threshold $tau_{c}$ , which is a consequence of mean field theory, is rigorously shown to be equal to $tau_{c}=1/(lambda_{max}(A))$ , where $lambda_{max}(A)$ is the largest eigenvalue—the spectral radius—of the adjacency matrix $A$ . A continued fraction expansion of the steady-state infection probability at node $j$ is presented as well as several upper bounds.      

A 74.8 mW Soft-Output Detector IC for 8 8 Spatial-Multiplexing MIMO Communications

In this paper, VLSI implementation of a configurable, soft-output MIMO detector is presented. The proposed chip can support up to 8 $, times ,$8 64-QAM spatial multiplexing MIMO communications, which surpasses all reported MIMO detector ICs in antenna number and modulation order. Moreover, this chip provides configurable antenna number from 2$,times,$ 2 up to 8$,times,$ 8 and modulation order from QPSK to 64-QAM. Its outputs include bit-wise log likelihood ratios (LLRs) and a candidate list, making it compatible with powerful soft-input channel decoders and iterative decoding system. The MIMO detector adopts a novel sphere decoding algorithm with high decoding efficiency and superior error rate performance, called modified best-first with fast descent (MBF-FD). Moreover, a low-power pipelined quad-dual-heap (quad-DEAP) circuit for efficient node pool management and several circuit techniques are implemented in this chip. When this chip is configured as 4$, times ,$4 64-QAM and 8$, times ,$ 8 64-QAM soft-output MIMO detectors, it achieves average throughputs of 431.8 Mbps and 428.8 Mbps with only 58.2 mW and 74.8 mW respective power consumption and reaches 10$^{-5}$ coded bit error rate (BER) at signal-to-noise ratio (SNR) of 24.2 dB and 22.6 dB, respectively.      

A Relationship Between Phase Delay and Attenuation Due to Rain and Its Applications to Satellite and Deep-Space Tracking

We present and discuss two main results concerning the relationship between phase delay due to rain and rain attenuation, useful in calculations concerning high precision tracking of satellites and deep-space spacecrafts using interferometry techniques. We have found these two results with the Synthetic Storm Technique [SST] applied to a large data bank of rain rate time series collected at three sites in Italy. The first result concerns a formula that provides the extra signal phase delay $tau$ (picoseconds) due to rain as a function of rain attenuation $A$ (dB), frequency $f$ (GHz) and slant path elevation angle $theta$ (degrees), given by $tau = (860.4 - 4.82 theta)f^{- 1.71}A^{0.73}$, for $20^{circ} leq theta ≪ 44^{circ}$, and by $tau = 648.3f^{- 1.71}A^{0.73}$, for $44^{circ} leq theta leq 90^{circ}$ . The formula allows estimating the phase delay due to rain attenuation, with overall average (normalized) error ${-}3hbox{%}$, standard deviation 11.1%, root-mean square 11.5% for 20$^{circ}$ slant paths. The second result concerns a method to predict phase delay from the probability distribution of rain rate (SST probability model), very useful when only the probability distribution of rain rate is known.      

10-GHz and 20-GHz Channel Spacing High-Resolution AWGs on InP

This letter reports on 10-GHz and 20-GHz channel-spacing arrayed waveguide gratings (AWGs) based on InP technology. The dimensions of the AWGs are 6.8$,times,$8.2 mm$^{2}$ and 5.0$,times,$6.0 mm$^{2}$, respectively, and the devices show crosstalk levels of $-$12 dB for the 10-GHz and $-$17 dB for the 20-GHz AWG without any compensation for the phase errors in the arrayed waveguides. The root-mean-square phase errors for the center arrayed waveguides were characterized by using an optical vector network analyzer, and are 18 $^{circ}$ for the 10-GHz AWG and 28$^{circ}$ for the 10-GHz AWG.      

$hbox{TiN/ZrO}_{2}$/Ti/Al Metal–Insulator–Metal Capacitors With Subnanometer CET Using ALD-Deposited $hbox{ZrO}_{2}$ for DRAM Applications

We provide the first report of the structural and electrical properties of $hbox{TiN/ZrO}_{2}$/Ti/Al metal–insulator–metal capacitor structures, where the $hbox{ZrO}_{2}$ thin film (7–8 nm) is deposited by ALD using the new zirconium precursor ZrD-04, also known as Bis(methylcyclopentadienyl) methoxymethyl. Measured capacitance–voltage ($C$– $V$) and current–voltage ( $I$–$V$) characteristics are reported for premetallization rapid thermal annealing (RTP) in $hbox{N}_{2}$ for 60 s at 400 $^{circ}hbox{C}$, 500 $^{circ}hbox{C}$, or 600 $^{ circ}hbox{C}$. For the RTP at 400 $^{circ}hbox{C}$ , we find very low leakage current densities on the order of nanoamperes per square centimeter at a gate voltage of 1 V and low capacitance equivalent thickness values of $sim$ 0.9 nm at a gate voltage of 0 V. The dielectric constant of $ hbox{ZrO}_{2}$ is 31 $pm$ 2 after RTP treatment at 400 $^{circ}hbox{C}$.      

Characterization and Modeling of RF-Performance $(f_{T})$ Fluctuation in MOSFETs

The fluctuation of RF performance (particularly for $f_{T}$ : cutoff frequency) in the transistors fabricated by 90-nm CMOS technology has been investigated. The modeling for $f_{T}$ fluctuation is well fitted with the measurement data within approximately 1% error. Low-$V_{t}$ transistors (fabricated by lower doping concentration in the channel) show higher $f_{T}$ fluctuation than normal transistors. Such a higher $f_{T}$ fluctuation results from $C_{rm gg}$ (total gate capacitance) variation rather than $g_{m}$ variation. More detailed analysis shows that $C_{rm gs} + C_{rm gb}$ (charges in the channel and the bulk) are predominant factors over $C_{rm gd}$ (charges in LDD/halo region) to determine $C_{rm gg}$ fluctuation.      

Equivalent Circuit Model for the Gate Leakage Current in Broken Down $hbox{HfO}_{2}/hbox{TaN/TiN}$ Gate Stacks

We propose an equivalent circuit model for the post-breakdown (BD) current–voltage ( $I$–$V$) characteristics in $hbox{HfO}_{2}/hbox{TaN/TiN}$ gate stacks in n-MOSFETs. The model consists of two opposite-biased diodes with series resistances and a shunt leakage path. The circuit admits analytical solution using the Lambert $W$-function and is tested for both negative and positive gate biases in the voltage range of $-$1.5 to $+$1.5 V. We also show the versatility of the proposed approach to deal with the post-BD $I$– $V$ when source and drain contacts are grounded or floating and analyze the obtained results in terms of the charge available for conduction.      

Performance Improvement of N-Type $hbox{TiO}_{x}$ Active-Channel TFTs Grown by Low-Temperature Plasma-Enhanced ALD

We report on performance improvement of $n$-type oxide–semiconductor thin-film transistors (TFTs) based on $hbox{TiO}_{x}$ active channels grown at 250 $^{circ}hbox{C}$ by plasma-enhanced atomic layer deposition. TFTs with as-grown $hbox{TiO}_{x}$ films exhibited the saturation mobility $(mu_{rm sat})$ as high as 3.2 $hbox{cm}^{2}/hbox{V}cdothbox{s}$ but suffered from the low on–off ratio $(I_{rm ON}/I_{rm OFF})$ of $hbox{2.0} times hbox{10}^{2}$. $hbox{N}_{2}hbox{O}$ plasma treatment was then attempted to improve $I_{rm ON}/I_{rm OFF}$. Upon treatment, the $hbox{TiO}_{x}$ TFTs exhibited $I_{rm ON}/I_{rm OFF}$ of $hbox{4.7} times hbox{10}^{5}$ and $mu_{rm sat}$ of 1.64 $hbox{cm}^{2}/hbox{V}cdothbox{s}$, showing a much improved performance balance and, thus, demonstrating their potentials for a wide variety of applications such as backplane technology in active-matrix displays and radio-frequency identification tags.      

Negative Bias Temperature Instability Dominated Degradation of Metal-Induced Laterally Crystallized p-Type Polycrystalline Silicon Thin-Film Transistors

Device degradation of solution-based metal-induced laterally crystallized p-type polycrystalline silicon (poly-Si) thin-film transistors (TFTs) is studied under dc bias stresses. While typical negative bias temperature instability (NBTI) or electron injection (EI) is observed under $-V_{g}$ or $-V_{d}$ only stress, respectively, no typical hot carrier (HC) degradation can be identified under high $-V_{d}$ stress combined with either low or high $-V_{g}$ stress. Instead, mixed NBTI and EI degradation is observed under combined low $-V_{g}$ and $-V_{d}$ stresses; and combined degradation of NBTI and HC occurs under high $-V_{d}$ and moderate $-V_{g}$ stresses. NBTI is the dominant mechanism in both cases. Grain boundary (GB) trap generation is found to correlate with the NBTI degradation with the same time exponent, suggesting the key role of GB trap generation in poly-Si TFTs' degradation.      

Magnetic-Field Sensitivity Enhancement by Magnetoelectric Sensor Arrays

We have investigated an array of magnetoelectric (ME) detection sensor units and an equivalent scheme by which to model their magnetic-field detection sensitivity. The signal response, noise level, and signal-to-noise ratio (SNR) of an array of $m$ units connected in parallel and serial modes have been analyzed. Our research shows that ME arrays in parallel increase the signal and noise currents by factors of $m$ and $sqrt{m}$ , respectively, while ME arrays in series do not increase the signal current but reduce the noise by $sqrt{m}$. Accordingly, we predict and experimentally confirm that the SNR increases by a factor of $sqrt{m}$, for both serial and parallel modes.      

A 10:1 Unequal Wilkinson Power Divider Using Coupled Lines With Two Shorts

A novel unequal Wilkinson power divider is presented. A coupled-line section with two shorts is proposed to realize the high characteristic impedance line, which cannot be implemented by conventional microstrip fabrication technique due to fabrication limitation. The proposed coupled-line structure is compatible with single layer integration and can be easily designed based on an even-odd mode analysis. As a design example, a 10:1 Wilkinson power divider at 2 GHz is fabricated and measured. The measured $-10~{rm dB}$ bandwidth of $S_{11}$ is about 16%, and the isolation $S_{32}$ is better than $-20~{rm dB}$ . The measured amplitude balance between output port 2 and port 3 is between $-10.20~{rm dB}$ and $-9.52~{rm dB}$, and the corresponding phase difference is between 0$^{circ}$ and 4.6$^{circ}$.      

Extraction Efficiency Enhancement of GaN-Based Light-Emitting Diodes by Microhole Array and Roughened Surface Oxide

The light-output power of GaN-based light-emitting diodes (LEDs) was enhanced by microhole array pattern and roughened $hbox{GaO}_{x}$ film grown on the exposed surface. The $hbox{GaO}_{x}$ film was grown by photoelectrochemical (PEC) oxidation via $hbox{H}_{2}hbox{O}$ and formed a naturally rough oxide surface and $hbox{GaO}_{x}/hbox{GaN}$ interface. Compared with that of conventional broad-area LEDs, the output power of the microhole array LED and the surface-oxidized microhole array LED increased by 1.38 and 1.82 times at 20-mA forward current, respectively. The results show that the microhole array pattern with the roughened surface oxide method could significantly enhance light extraction efficiency and be a candidate for manufacturing high-efficient low-cost GaN-based LEDs.      

Photosensitive Inverter and Ring Oscillator With Pseudodepletion Mode Load for LCD Applications

Photosensitive inverters and ring oscillators (ROs) with pseudodepletion mode loads (PDMLs) were integrated in LCD panels using conventional mass production processes. The delay time $(t_{rm pd})$ of five-stage ROs with PDML reduced from 204.3 $mu hbox{s}$ under dark to 16.3 $muhbox{s}$ under backlight illumination of 20 000 lx. The oscillation frequency exhibited a power-law dependence $(f_{rm osc} infty hbox{IL}^{gamma})$ on the backlight illuminance with the extracted fitting parameter $gamma = hbox{0.447}$ at room temperature.      

Linear Systems, Sparse Solutions, and Sudoku

In this paper, we show that Sudoku puzzles can be formulated and solved as a sparse linear system of equations. We begin by showing that the Sudoku ruleset can be expressed as an underdetermined linear system: ${mmb{Ax}}={mmb b}$, where ${mmb A}$ is of size $mtimes n$ and $n>m$. We then prove that the Sudoku solution is the sparsest solution of ${mmb{Ax}}={mmb b}$, which can be obtained by $l_{0}$ norm minimization, i.e. $minlimits_{mmb x}Vert{mmb x}Vert_{0}$ s.t. ${mmb{Ax}}={mmb b}$. Instead of this minimization problem, inspired by the sparse representation literature, we solve the much simpler linear programming problem of minimizing the $l_{1}$ norm of ${mmb x}$, i.e. $minlimits_{mmb x}Vert{mmb x}Vert_{1}$ s.t. ${mmb{Ax}}={mmb b}$, and show numerically that this approach solves representative Sudoku puzzles.      

The Observable Part of a Network

The union of all shortest path trees $G_{cup {rm spt}}$ is the maximally observable part of a network when traffic follows shortest paths. Overlay networks such as peer to peer networks or virtual private networks can be regarded as a subgraph of $G_{cup {rm spt}}$. We investigate properties of $G_{cup {rm spt}}$ in different underlying topologies with regular i.i.d. link weights. In particular, we show that the overlay $G_{cup {rm spt}}$ in an ErdÖs–RÉnyi random graph $G_{p}left (Nright)$ is a connected $G_{p_{c}}left (Nright)$ where $p_{c}sim {{ log N}over { N}}$ is the critical link density, an observation with potential for ad-hoc networks.      

Cubic-Structured $hbox{HfO}_{2}$ With Optimized Doping of Lanthanum for Higher Dielectric Constant

It is demonstrated that $hbox{HfO}_{2}$ films can have much higher dielectric-constant values than the usual reported value of 20–24 by optimized incorporation of lanthanum element and crystallization to cubic structure. When $hbox{HfO}_{2}$ with 8% La is crystallized into cubic structure, the film exhibits the $kappa$ value of $sim$ 38 which is the highest among ever reported $hbox{HfO}_{2}$ -based high-$kappa$ dielectrics. The increased $kappa$ value of $ hbox{HfO}_{2}$ with 8% La enables the leakage current to be reduced more than one order of magnitude lower, compared to amorphous-phase $hbox{HfO}_{2}$ under the same electric field. The dependence of film thickness and annealing temperature on the cubic crystallization is also reported.      

Positive Bias Temperature Instability (PBTI) Characteristics of Contact-Etch-Stop-Layer-Induced Local-Tensile-Strained $hbox{HfO}_{2}$ nMOSFET

The positive bias temperature instability (PBTI) characteristics of contact-etch-stop-layer (CESL)-strained $hbox{HfO}_{2}$ nMOSFET are thoroughly investigated. For the first time, the effects of CESL on an $hbox{HfO}_{2}$ dielectric are investigated for PBTI characteristics. A roughly 50% reduction of $V_{rm TH}$ shift can be achieved for the 300-nm CESL $hbox{HfO}_{2}$ nMOSFET after 1000-s PBTI stressing without obvious $ hbox{HfO}_{2}/hbox{Si}$ interface degradation, as demonstrated by the negligible charge pumping current increase ($≪$ 4%). In addition, the $hbox{HfO}_{2}$ film of CESL devices has a deeper trapping level (0.83 eV), indicating that most of the shallow traps (0.75 eV) in as-deposited $ hbox{HfO}_{2}$ film can be eliminated for CESL devices.