Electrical and optical properties of ZnTe-GaSb heterojunctions

Heterojunctions between ZnTe and GaSb is produced by the interface-alloy technique with the use of movable quartz tube loaded in a furnace instead of a strip-heater. X-ray measurement shows that the recrystallized GaSb is monocrystalline and oriented parallel to the ZnTe substrate with (111) as the growth direction. Photoresponse for p-p ZnTe-GaSb heterojunctions decreases exponentially with decreasing incident photon energy for hν < 2·18 eV at room temperature. This behavior is explained by a model of linearly-graded bandgap region of the order of 500 Å long, which was first proposed for GaAs-InSb heterojunction by Hinkley and Rediker. The photocurrent is produced by hot holes generated by absorbed photons in the graded-gap region which traverse this region with a mean free path of about 40 Å. Space-charge-limited current observed in I–V characteristics of p-p ZnTe-GaSb heterojunctions is explained by Lampert theory. The thickness of semi-insulating region is estimated at about 1 to 3 μm from the capacitance measurements without d.c. bias. This thickness is much larger than the graded bandgap region. Capacitance depends strongly on both forward d.c. bias voltage and a.c. frequency, but is almost independent of reverse bias voltage. The results of capacitance measurements for forward bias are qualitatively interpreted in terms of a change in the trapped charge density in the semi-insulating region. A significant discrepancy between the theory and experimental results exists in the region of trap-free limit.     

Electrical characteristics of Pd Schottky contacts on ZnO films

The electrical characteristics of Pd Schottky contacts on ZnO films have been investigated by current-voltage (I–V) and capacitance–voltage (C–V) measurements at different temperatures. ZnO films of two thicknesses (400 nm and 1000 nm) were grown by DC-magnetron sputtering on n-Si substrates. The basic structural, optical and electrical properties of these films are also reported. We compared the two Schottky diodes by means of characteristic parameters, such as rectification ratio, ideality factor (η), barrier height (Φ_b) and series resistance and obtained better results for the 1000 nm-ZnO Schottky diodes. We also discussed the dependence of I‐V characteristics on temperature and the two distinct linear regions observed at low temperatures are attributed to the existence of two different inhomogeneous barrier heights. From I–V plots in a log-log scale we found that the dominant current-transport mechanism at large forward bias is space-charge limited current (SCLC) controlled by the presence of traps within the ZnO bandgap. The existence of such traps (deep states or interface states) is demonstrated by frequency-dependent capacitance and deep-level transient spectroscopy (DLTS) measurements.     

Interface Electron Traps as a Source of Anomalous Capacitance in AlGaN/GaN Heterostructures

We studied by modeling and simulation how deep traps at the AlGaN/GaN heterostructure interface influence the shape of capacitance–voltage (C–V) curves of the heterostructure. Assuming donor and acceptor type of traps, we found differences in the C–V curves for sharp energy interface states or continuously distributed states with the same total concentration for the acceptor-type interface states. The background doping concentration of GaN had only a marginal influence on the shape of the C–V curves. We observed that an anomalous capacitance peak occurred for the continuous distribution of traps in the bandgap; a similar peak had been observed in experiment. We also saw that the capacitance curves shifted slightly to the right or to the left depending on the GaN doping concentration. A remarkable difference was found between the capacitance curves for the structures with the sharp acceptor trap level and continuous distribution of traps. For donor-type interface states, we found practically no influence on C–V curves since they remain populated and charge neutral during the measurement.     

Fabrication and electrical properties of Al/aniline green/n-Si/AuSb structure

The current–voltage (I–V), capacitance–voltage (C–V) and capacitance–frequency (C–f) characteristics of Al/aniline green(AG)/n-Si/AuSb structure were investigated at room temperature. A modified Norde's function combined with conventional forward I–V method was used to extract the parameters including barrier height (BH) and the series resistance. The barrier height and series resistance obtained from Norde's function was compared with those from Cheung functions, and it was seen that there was a good agreement between the BH values and series resistances from both methods. The C–V characteristics were performed at 10 and 500 kHz frequencies, and C–f characteristics were performed 0.0, +0.4 and −0.4 V.     

Frequency and voltage dependency of interface states and series resistance in Al/SiO2/p-Si MOS structure

The capacitance–voltage (C–V) and conductance–voltage (G/ω–V) characteristics of Al/SiO₂/p-Si metal-oxide-semiconductor (MOS) Schottky diodes have been measured in the voltage range from ?3 to +3 V and frequency range from 5 KHz to 1 MHz at room temperature. It is found that both C and G/ω of the MOS capacitor are very sensitive to frequency. The fairly large frequency dispersion of C–V and G/ω–V characteristics can be interpreted in terms of the particular distribution of interface states at SiO₂/Si interface and the effect of series resistance. At relatively low frequencies, the interface states can follow an alternating current (AC) signal that contributes to excess capacitance and conductance. This leads to an anomalous peak of C–V curve in the depletion and accumulation regions. In addition, a peak at approximately ?0.2 V appears in the R_s–V profiles at low frequency. The peak values of the capacitance and conductance decrease with increasing frequency. The density distribution profile of interface state density (N_ss) obtained from C_HF–C_LF capacitance measurement also shows a peak in the depletion region.     

An analytic model for high-electron-mobility transistors

A new analytic model is developed for the output I–V characteristics and microwave-signal parameters of High Electron Mobility Transistors (HEMTs). In this model, the empirical formula suggested by Giblin et al. is used to approach the behavior of electron drift velocity vs electric field. The resulting I–V curves are in excellent agreement with experimental data. In order to predict the microwave performance of these devices, this model is also used to calculate the small-signal parameters, transconductance and gate capacitance, which are then used to estimate f_T, the frequency of unity current gain.     

Current–voltage and capacitance–voltage characteristics of Al Schottky contacts to strained Si-on-insulator in the wide temperature range

The electrical characteristics of Al/strained Si-on-insulator (sSOI) Schottky diode have been investigated using current–voltage (I–V) and capacitance–voltage (C–V) measurements in the wide temperature range of 200–400 K in steps of 25 K. It was found that the barrier height (0.57–0.80 eV) calculated from the I–V characteristics increased and the ideality factor (1.97–1.28) decreased with increasing temperature. The barrier heights determined from the C–V measurements were higher than those extracted from the I–V measurements, associated with the formation of an inhomogeneous Schottky barrier at the interface. The series resistance estimated from the forward I–V characteristics using Cheung and Norde methods decreased with increasing temperature, implying its strong temperature dependence. The observed variation in barrier height and ideality factor could be attributed to the inhomogeneities in Schottky barrier, explained by assuming Gaussian distribution of barrier heights. The temperature-dependent I–V characteristics showed a double Gaussian distribution with mean barrier heights of 0.83 and 1.19 eV and standard deviations of 0.10 and 0.16 eV at 200–275 and 300–400 K, respectively. From the modified Richardson plot, the modified Richardson constant were calculated to be 21.8 and 29.4 A cm⁻² K⁻² at 200–275 and 300–400 K, respectively, which were comparable to the theoretical value for p-type sSOI (31.6 A cm⁻² K⁻²).     

Theoretical calculations of Debye length,built-in potential and depletion layer width versus dopant density in a heavily doped p-n junction diode

Theoretical calculations of Debye length, built-in potential, depletion layer width and capacitance as a function of dopant density in a heavily doped p-n junction diode are described in this paper. The heavy doping effects such as carrier degeneracy, dopant density-dependent dielectric constant and bandgap narrowing are accounted for by using the empirical approximation for the reduced Fermi-energy given by[1] and the dopant density dependent dielectric constant given by[2], as well as the bandgap narrowing model proposed by[3]. The results show that: (1) bandgap narrowing and carrier degeneracy have important effects on the junction built-in potential; (2) carrier degeneracy and dopant density-dependent dielectric constant are important to Debye length for the abrupt junction case, and (3) the dopant density-dependent dielectric constant is a key parameter which strongly affects the values of depletion layer width and depletion capacitance. These findings are important for modeling of heavily doped p-n junction devices in the VLSI applications.     

Temperature dependent electrical and dielectric properties of a metal/Dy2O3/n-GaAs (MOS) structure

This paper describes the structural properties, electrical and dielectric characteristics of thin Dy₂O₃ layer deposited on the n-GaAs substrate by electron beam deposition under ultra vacuum. Structural and morphological characterizations are investigated by atomic force microscopy (AFM) and X-ray diffraction measurements (XRD). The XRD shows that the elaborated Dy₂O₃ oxide has a cubic structure. The electrical and dielectric properties of Co/Au/Dy₂O₃/n-GaAs structure were studied in the temperature range of 80–500 K. The conductance and capacitance measurements were performed as a function of bias voltage and frequency. The dielectric constant (ε′), dielectric loss (ε″) and dielectric loss tangent (tanδ) of the structure are obtained from capacitance–voltage (C–V) and conductance–voltage (G/ω–V) measurements. These parameters are found to be strong functions of temperature and bias voltage. A strong negative capacitance (NC) phenomenon has been observed in C–V; hence ε′–V plots for each temperature value take negative values. The following behavior of the C and ε′ in the forward bias region has been explained with the minority-carrier injection and relaxation theory. From DC conductance study, electronic conduction is found to be dominated by thermally activated hopping at high temperature. Activation energy is deduced from the variation of conductance with temperature. The interface state density (N_ss) of the structure is of the order 1.13×10¹³ eV⁻¹ cm⁻².     

PdInP Schottky diode hydrogen sensors

PdInP Schottky diodes are shown to be very sensitive and reproducible detectors of hydrogen. Absorption or desorption of hydrogen by Pd causes large changes in the diode C–V or I–V characteristics. Fourfold increase in capacitance is observed on exposing the device to forming gas. We present data on sensitivity of these devices, their transient response and detection mechanism.     

Modeling the equivalent oxide thickness of Surrounding Gate SOI devices with high-κ insulators

In this work, the behavior of the gate insulator capacitance of different Surrounding Gate SOI devices with square and circular cross-sections has been studied. It is shown that the equivalent oxide thickness used for planar devices is not valid for devices with bidimensional confinement. For this kind of devices, new expressions for the gate insulator capacitance and equivalent oxide thickness are obtained using an approximate model of metal–insulator–metal capacitors. These expressions depend not only on the dielectric constant but also on the geometry of the device under consideration since for non-planar devices geometry plays an important role in the behavior of the C–V characteristics. The new expressions are validated by numerical simulations of these Multiple-Gate (MuG) devices that take into account quantum effects.     

Fabrication,structural and electrical characterization of AlNi2Si based heterojunction grown by LPE

This work elucidates the applicability for Liquid-Phase Epitaxy (LPE) to grow epilayers of AlNi₂Si on single crystalline Si with a good crystalline quality and low series resistance. Surface morphology and crystalline structural characteristics of the heterojunction were characterized by scanning electron microscopy (SEM) and X-ray diffraction (XRD), respectively. Temperature dependence of the current–voltage (I–V) characteristics is studied to elucidate the predominant conduction mechanism in the temperature range 305–370 K. Heterojunction parameters such as ideality factor, series resistance, barrier height show temperature dependence in the desired temperature range. Cheung functions are applied for determination the heterojunction parameters and compared with each other. Temperature dependence of capacitance–voltage (C–V) characteristics was considered. The built-in potential, net carrier concentration, maximum barrier height, maximum barrier field and the width of the depletion region obtained from the C–V measurements were studied as a function of temperature.     

Current spreading effects in fully printed p-channel organic thin film transistors with Schottky source–drain contacts

Contact effects have been analyzed, by using numerical simulations, in fully printed p-channel OTFTs based on a pentacene derivative as organic semiconductor and with Au source/drain contacts. Considering source–drain Schottky contacts, with a barrier height of 0.46 eV, device characteristics can be perfectly reproduced. From the detailed analysis of the current density we have shown that current spreading occurs at the source contact, thus influencing the effective contact resistance. At low V_ds and for a given V_gs, the current is mainly injected from an extended source contact region and current spreading remains basically constant for increasing V_ds. However, by increasing V_ds the depletion layer of the Schottky contact expands and reaches the insulator–semiconductor interface, causing the pinch-off of the channel at the source end (V_dsat1). For V_ds > V_dsat1 the current injected from the edge of the source contact rapidly increases while the current injected from the remaining part of the source contact basically saturates. Current spreading shows a V_gs-dependence, since the contact injection area depends on the channel resistance and also barrier lowering of the Schottky source contact depends upon V_gs. The injected current from the edge of the source contact can be reproduced using the conventional diode current expression, assuming a constant value for the zero barrier lowering saturation current and considering a V_gs-dependent barrier lowering. The presented analysis clarifies the V_gs-dependence of the contact current–voltage characteristics and points out that the I–V contact characteristics cannot directly be related to a single diode characteristics. Indeed, the contact characteristics result from the combination of two rather different regimes: at low V_ds the current is injected from an extended source contact region with a current spreading related to V_gs, while for V_ds above the pinch-off of the channel at source end, the current is injected primarily from the edge of the source contact and is strongly enhanced by the barrier lowering.     

Investigations on electrical characteristics and reliability properties of MOS capacitors using HfAlOx on n-GaAs substrates

Radio frequency sputtering system is employed to fabricate metal oxide semiconductor (MOS) capacitors using an ultra-thin layer of HfAlO_x dielectric deposited on n-GaAs substrates with and without a Si interface control layer incorporated in between the dielectric and the semiconductor. Measurements are performed to obtain capacitance voltage (C–V) and current voltage (I–V) characteristics for GaAs/Si/HfAlO_x and GaAs/HfAlO_x capacitors under different constant voltage and constant current stress conditions. The variation of different electrical parameters such as change in interface trap density, hysteresis voltage with various values of constant voltage stress and the dependence of flat band voltage, fractional change in gate leakage current density, etc. with stress time are extracted from the C–V and I–V data for capacitors with and without a Si interlayer. Further the trap charge density and the movement of trap centroid are investigated for various injected influences. The dielectric breakdown and reliability properties of the dielectric films are studied using constant voltage stressing. A high time-dependent dielectric breakdown (TDDB, t_bd ? 1350 s) is observed for HfAlO_x gate dielectric with a silicon inter-layer under the high constant voltage stress at 8 V. Compared to capacitors without a Si interlayer, MOS capacitors with a Si interlayer exhibit improved electrical and breakdown characteristics, and excellent interface and reliability properties.     

On current spreading in solar cells: a two-parameter tube model

The phenomenon of current spreading is essential for concentrator solar cells since it limits the conversion efficiency at high sunlight-concentration ratios. A model, which describes the regularities of the above phenomenon, is proposed and developed. The model uses a stylized representation of current lines and, respectively, of current tubes; it includes two resistive parameters accounting for the variable lateral (horizontal) component and the constant vertical component of the resistance of each tube. In the model the fact that the thickness of the spreading region is much less than the distance between the contact grid strips is taken into account. The calculated current—voltage (I–V) characteristics of a solar cell in the resistive and a nonresistive cases are obtained. The spreading-resistance I–V characteristic obtained by the voltage subtraction of these characteristics is nonlinear and depends on the photogenerated current. Thus, the equivalent electrical circuit of a solar cell includes a lumped nonlinear resistance, which depends parametrically on the photogenerated current. The comparison of experimental and calculated I–V characteristics by the example of Ge, GaAs, and GaInP solar cells is performed and both resistive parameters of the model are determined. The model describes correctly the regularities of spreading in single-junction solar cells and can be extended to multijunction solar cells.     

InAs-based heterostructure barrier varactor diodes with In0.3Al0.7As0.4Sb0.6 as the barrier material

InAs-based heterostructure barrier varactor (HBV) diodes with In_0.3Al_0.7As_0.4Sb_0.6 as the barrier material are demonstrated. Current–voltage and capacitance–voltage characteristics, as well as S-parameters, of HBV diodes with varying barrier thicknesses are examined. Maximum capacitance values and maximum-to-minimum capacitance ratios greater than those predicted by traditional HBV models were measured. The HBVs’ unconventional behavior in terms of charge accumulation layers adjacent to the wide bandgap barrier is discussed.     

Frenkel thermal-field effect in MnGaInS<Subscript>4</Subscript> layered single crystals

The I–V characteristics are investigated in the region of high electric fields in MnGaInS₄ single crystals. It is shown that the current in the nonlinear portion of the I–V characteristic is caused by the Frenkel thermal-field effect. The permittivity, trap concentration, and potential-well shape are determined.     

Analysis of sit I–V characteristics by two-dimensional simulation

The I–V characteristics of Static Induction Transistor operating in the transition region are studied using a two-dimensional simulation. This simulation takes both electron and hole continuity into account, including temperature dependence. From the result of this simulation, the transition region is physically interpreted by introducing two new concepts; effective channel width and saddle potential pinning. In the transition region, the effective channel width changes distinctively and electron concentration at the saddle point is saturated by the saddle potential pinning, resulting in the gradual change in the drain current. By extrapolating these concepts into the exponential region, the I–V characteristics are comprehensively interpreted. Furthermore, the temperature coefficient of the drain current which is inverted two times is interpreted consistently by these concepts.     

Determination of the interface properties of Ni-silicided strained-Si/SiGe heterostructure Schottky diodes using capacitance–voltage technique

Capacitance–voltage (C–V) profiling has been used to study the interface properties and apparent doping profile of NiSi/strained-Si heterostructure Schottky diodes. The interface states have been characterized using the capacitance–voltage (C–V) and capacitance–frequency (C–f) techniques for diodes annealed at 400 and 600 °C. Based on the depletion approximation and interfacial layer with interface states, an equivalent circuit model has been developed to explain the anomalous C–V characteristics observed in case of silicided-Schottky diodes. Self-consistent analytical expressions, developed from the proposed equivalent circuit, have been used to simulate the experimental C–V characteristics using both the MATHCAD and SEMICAD device simulation tool. An excellent agreement has been obtained between the experimental and simulated C–V characteristics, which strongly support the validity of the proposed model.     

Electrical and photoelectrical characterization of an organic–inorganic heterojunction based on quinoline yellow dye

An organic–inorganic contact was fabricated by forming a thin film of quinoline yellow dye (QY) on a p-Si wafer and evaporating Al metal on the film. The current–voltage (I–V) and capacitance–voltage (C–V) measurements of Al/QY/p-Si heterostructure were applied in dark and room temperature to calculate the characteristic parameters of diode like ideality factor, barrier height and series resistance. Ideality factor and barrier height values were found as 1.23 and 0.87 eV from I–V data, respectively. The series resistance value of the device was determined as 1.8 kΩ by using modified Norde function. The C–V measurements were carried out at different frequencies and it was seen that capacitance value decreased with increasing frequency. Interface state density distribution was calculated by means of I–V measurement. In addition the optical absorption of thin QY film on glass was measured and optical band gap of the film was found as 2.73 eV. Furthermore, I–V measurements of Al/QY/p-Si/Al were taken under illumination between 40 and 100 mW/cm². It was observed that reverse bias current of the device increased with light intensity. Thus, the heterojunction had a strong response to the light and it can be suitable for electrical and optoelectronic applications like a photodiode.