A 3–8 GHz Low-Noise CMOS Amplifier

A wideband CMOS low-noise amplifier (LNA) is proposed by using the concept of mutual coupling technique implemented through a symmetric center-tap inductor. A frequency widening network is designed with a center-tap inductor at the input and the output of an LNA to achieve bandwidth extension with a single stage amplifier. The proposed wideband low noise amplifier is implemented in the 0.18 mum CMOS technology. This design obtains a bandwidth of 3-8 GHz with a power consumption of 3.77 mW from a 1.8 V supply.     

A Low-Power Linear SiGe BiCMOS Low-Noise Amplifier for Millimeter-Wave Active Imaging

This letter presents a low-power linear and wideband two-stage millimeter-wave low-noise amplifier (LNA) fabricated in a low-cost 0.18 $mu{rm m}$ SiGe BiCMOS technology. Design techniques utilized to optimize the gain and NF and to achieve high linearity and wideband at W-band are addressed. The LNA achieves a peak power gain of 14.5 dB at 77 GHz with a 3 dB bandwidth of 14.5 GHz from 69 to 83.5 GHz. The measured NF is 6.9 dB at 77 GHz and is lower than 8 dB from 64 to 81 GHz. Both input and output return losses are better than 11 dB and 17 dB at 77 GHz, respectively. The measured input 1 dB compression point is $-$11.4 dBm at 77 GHz with low power consumption of only 37 mW.      

23～47GHz 宽带BiCMOS 低噪声放大器设计

针对不同国家标准对5G 高频段的不同频率需求,设计了一款超宽带低噪声放大器,频率覆盖23～47GHz。采用T 型电感并联峰化技术,实现对传统电感并联峰化机构的带宽扩展,在相同功耗下,带宽可大幅提升。该放大器采用0.13 μm BiCMOS 工艺设计实现,芯片面积0.42 mm×0.85 mm。测试结果表明,该低噪放在频率23～47GHz 范围内,增益大于22 dB,S11 和S22 均小于- 7dB,噪声系数2.6～3.8 dB,输入1 dB 压缩点大于-15 dBm,在1.2 V电源电压下,芯片整体功耗仅12 mW。     

A 3–10 GHz CMOS UWB Low-Noise Amplifier With ESD Protection Circuits

A low-power fully integrated low-noise amplifier (LNA) with an on-chip electrostatic-static discharge (ESD) protection circuit for ultra-wide band (UWB) applications is presented. With the use of a common-gate scheme with a ${rm g}_{rm m}$ -boosted technique, a simple input matching network, low noise figure (NF), and low power consumption can be achieved. Through the combination of an input matching network, an ESD clamp circuit has been designed for the proposed LNA circuit to enhance system robustness. The measured results show that the fabricated LNA can be operated over the full UWB bandwidth of 3.0 to 10.35 GHz. The input return loss $({rm S}_{11})$ and output return loss $({rm S}_{22})$ are less than ${-}8.3$ dB and ${-}9$ dB, respectively. The measured power gain $({rm S}_{21})$ is $11 pm 1.5$ dB, and the measured minimum NF is 3.3 dB at 4 GHz. The dc power dissipation is 7.2 mW from a 1.2 V supply. The chip area, including testing pads, is 1.05 mm$,times,$ 0.73 mm.      

A 36–80 GHz High Gain Millimeter-Wave Double-Balanced Active Frequency Doubler in SiGe BiCMOS

This letter presents a high conversion gain double-balanced active frequency doubler operating from 36 to 80 GHz. The circuit was fabricated in a 200 GHz ${rm f}_{rm T}$ and ${rm f}_{max}$ 0.18 $mu$m SiGe BiCMOS process. The frequency doubler achieves a peak conversion gain of 10.2 dB at 66 GHz. The maximum output power is 1.7 dBm at 66 GHz and ${-}3.9$ dBm at 80 GHz. The maximum fundamental suppression of 36 dB is observed at 60 GHz and is better than 20 dB from 36 to 80 GHz. The frequency doubler draws 41.6 mA from a nominal 3.3 V supply. The chip area of the active frequency doubler is 640 $mu$m $,times,$424 $mu$m (0.272 mm $^{2}$) including the pads. To the best of authors' knowledge, this active frequency doubler has demonstrated the highest operating frequency with highest conversion gain and output power among all other silicon-based active frequency doublers reported to date.      

一种2.4 GHz全集成SiGe BiCMOS功率放大器

针对2.4 GHz 802.11 b/g无线局域网(WLAN)的应用,该文设计了一种单片全集成的射频功率放大器(PA)。由于在自适应偏置电路中采用异质结晶体管(HBT)和电容构成的简单结构提高PA的线性度,因此不增加PA的直流功耗、插损和芯片面积。在基极偏置的DC通路中采用电阻负反馈实现温度稳定功能,有效避免热崩溃的同时不引起射频损耗。采用了GRACE 0.18mSiGe BiCMOS 工艺流片,芯片面积为1.56 mm2,实现了包括所有偏置电路和匹配电路的片上全集成。测试结果表明,在2.4-2.5 GHz工作频段,PA的小信号S21增益达23 dB,输入回波损耗S11小于-15 dB。PA的 1 dB 输出压缩点的线性输出功率为19.6 dBm,功率附加效率为20%,功率增益为22 dB。     

一种SiGe BiCMOS 140 GHz高增益功率放大器

基于IHP 130 nm SiGe BiCMOS工艺,设计了一种中心频率为140 GHz 的三级Cascode结构的功率放大器。该放大器由两个驱动级和一个输出功率级组成,输入、输出和级间匹配均采用微带线实现。设计中,选用最佳尺寸的晶体管,通过分析得到最佳偏置电流和最佳偏置电压,从而获得最大的电压摆幅,以提高输出功率。仿真结果表明,在120~160 GHz的工作频带中,该放大器的最高增益为28 dB,饱和输出功率为16.2 dBm, 功率附加效率为20%,功耗为220 mW。     

一种新型2.4 GHz SiGe BiCMOS低噪声放大器

基于窄带低噪声放大器理论,设计了一种2.4 GHz,具有低功耗、低噪声和良好匹配性等优点的新型BiFET结构SiGe BiCMOS低噪声放大器。采用TSMC 0.35μm SiGe BiCMOS工艺库,利用SpectreRF软件的仿真结果显示,该电路具有2.27 dB低噪声系数,11.5 dB正向增益;2 V工作电压下,其功耗仅为6.1 mW。研究结果表明,该低噪声放大器在射频蓝牙系统中具有一定的应用前景。     

A 23–37 GHz Miniature MMIC Subharmonic Mixer

A novel configuration of subharmonic mixer using an anti-parallel diode pair is presented for operating over the 23-37 GHz band. The monolithic microwave integrated circuit is implemented by GaAs 0.15 mum PHEMT technology with the compact size of 0.85 times 0.85 mm². This mixer employs a directional coupler, LC low-pass filter, and a short stub for isolating three ports corresponding to radio frequency (RF), local oscillation (LO) input, and intermediate frequency (IF) output ports. The directional coupler also provides impedance transformation between the diode pair, RF, and LO ports. This makes the subharmonic mixer more compact and flexible. The best conversion loss of the subharmonic mixer is 9.4 dB, and the LO-to-RF and LO-to-IF isolations are better than 22 and 31 dB, respectively.     

A 340–380 GHz Integrated CB-CPW-to-Waveguide Transition for Sub Millimeter-Wave MMIC Packaging

In this letter, a rectangular waveguide to conductor backed-coplanar waveguide electromagnetic transition suitable of operating at sub-millimeter wave frequencies is demonstrated. The dipole based transition is fabricated using InP monolithic microwave integrated circuit technology. The compact transition eliminates wire-bonding problems (return loss and insertion loss) and is suitable for direct integration of sub-millimeter wave monolithic integrated circuits. Measured transition loss of $sim$ 1 dB has been achieved in the frequency range of 340 to 380 GHz.      

6-18GHz高增益宽带限幅放大器

本文介绍了一种具有高输出信噪比和温度补偿功能的高增益宽带限幅放大器的设计方法。该放大器由多片PHEMT工艺制作的单片集成电路构成，其主要特点是可在6～18GHz频率范围内、满足高输出信噪比的要求下实现对-60～-7dBm输入信号的限幅功能，并在-40～70℃的温度范围内提供稳定的增益输出，输出功率为13～17dBm，噪声系数小于4dB。     

A Packaged and ESD-Protected Inductorless 0.1–8 GHz Wideband CMOS LNA

In this letter, an inductorless 0.1-8 GHz wideband CMOS differential low noise amplifier (LNA) based on a modified resistive feedback topology is proposed. Without using any passive inductors, the modified resistive feedback technique implemented with a parallel R-C feedback, an active inductor load, and neutralization capacitors achieves high gain, low noise, and good return loss over a wide bandwidth. To ensure the robustness in the system integration, electro-static discharge diodes are added to the radio frequency pads. The LNA was fabricated using a digital 90 nm CMOS technology. It achieves a 3 dB bandwidth of 8 GHz with a 16 dB voltage gain, noise figures from 3.4 dB to 5.8 dB across the whole band, and an input third-order intermodulation product (IIP3) of -9 dBm. The active area of the chip is 0.034 mm². The chip was packaged and tested on an FR4 PCB using the chip-on-board approach.     

基于SiGe BiCMOS技术的低功耗23G VCO

A 23 GHz voltage controlled oscillator(VCO) with very low power consumption is presented.This paper presents the design and measurement of an integrated millimeter wave VCO.This VCO employs an on-chip inductor and MOS varactor to form a high Q resonator.The VCO RFIC was implemented in a 0.18μm 120 GHz f_t SiGe hetero-junction bipolar transistor(HBT) BiCMOS technology.The VCO oscillation frequency is around 23 GHz,targeting at the ultra wideband(UWB) and short range radar applications.The core of the VCO circuit consumes 1 mA current from a 2.5 V power supply and the VCO phase noise was measured at around -94 dBc/Hz at a 1 MHz frequency offset.The FOM of the VCO is -177 dBc/Hz.     

一个4~12GHz混合集成宽带功率放大器

设计研制了一个4-12GHz的宽带混合集成平衡功率放大器电路，该平衡放大器由一个4指的微带兰格耦合器实现，其输出连续波饱和功率在中心频率为8GHz时达到29.5dBm,在4-12GHz频率范围内增益达到8.5dB,增益平坦度为＋/-0.6dB。     

120 nm SiGe BiCMOS 90~100 GHz低噪声放大器

基于IBM8HP 120 nm SiGe BiCMOS工艺,分析了晶体管的最小噪声系数和最大可用增益特性。采用两级Cascode放大器级联结构,研制出一种频带为90~100 GHz的低噪声放大器(LNA)。详细分析了Cascode放大器潜在的自激可能性,采用串联小电阻的方式消除不稳定性。与电磁仿真软件Sonnet联合仿真,结果表明,在频带内,放大器的输入反射系数S11<-18 dB,输出反射系数S22<-12 dB;在94 GHz处,噪声系数为8 dB,增益为14.75 dB,输出1 dB压缩点功率为-7.9 dBm;在1.8 V供电电压下,整个电路的功耗为14.42 mW。该放大器具有低噪声、低功耗的特点。     

A 1.5-V 2–9.6-GHz Inductorless Low-Noise Amplifier in 0.13-μm CMOS

This paper presents an inductorless low-noise amplifier (LNA) design for an ultra-wideband (UWB) receiver front-end. A current-reuse gain-enhanced noise canceling architecture is proposed, and the properties and limitations of the gain-enhancement stage are discussed. Capacitive peaking is employed to improve the gain flatness and -3-dB bandwidth, at the cost of absolute gain value. The LNA circuit is fabricated in a 0.13-mum triple-well CMOS technology. Measurement result shows that a small-signal gain of 11 dB and a -3-dB bandwidth of 2-9.6 GHz are obtained. Over the -3-dB bandwidth, the input return loss is less than -8.3 dB, and the noise figure is 3.6-4.8 dB. The LNA consumes 19 mW from a low supply voltage of 1.5 V. It is shown that the LNA designed without on-chip inductors achieves comparable performances with inductor-based designs. The silicon area is reduced significantly in the inductorless design, the LNA core occupies only 0.05 mm², which is among the smallest reported designs.     

A Compact Wideband CMOS Low-Noise Amplifier Using Shunt Resistive-Feedback and Series Inductive-Peaking Techniques

A wideband low-noise amplifier (LNA) with shunt resistive-feedback and series inductive-peaking is proposed for wideband input matching, broadband power gain and flat noise figure (NF) response. The proposed wideband LNA is implemented in 0.18-mum CMOS technology. Measured results show that power gain is greater than 10 dB and input return loss is below -10 dB from 2 to 11.5 GHz. The IIP3 is about +3 dBm, and the NF ranges from 3.1 to 4.1 dB over the band of interest. An excellent agreement between the simulated and measured results is found and attributed to less number of passive components needed in this circuit compared with previous designs. Besides, the ratio of figure-of- merit to chip size is as high as 190 (mW^-1 /mm² ) which is the best results among all previous reported CMOS-based wideband LNA.     

A 1.2 V Reactive-Feedback 3.1–10.6 GHz Low-Noise Amplifier in 0.13 μm CMOS

A 15.1 dB gain, 2.1 dB (min.) noise figure low-noise amplifier (LNA) fabricated in 0.13 mum CMOS operates across the entire 3.1-10.6 GHz ultrawideband (UWB). Noise figure variation over the band is limited to 0.43 dB. Reactive (transformer) feedback reduces the noise figure, stabilizes the gain, and sets the terminal impedances over the desired bandwidth. It also provides a means of separating ESD protection circuitry from the RF input path. Bias current-reuse limits power consumption of the 0.87mm² IC to 9 mW from a 1.2 V supply. Comparable measured results are presented from both packaged and wafer probed test samples     

A 30–100 GHz Wideband Sub-Harmonic Active Mixer in 90 nm CMOS Technology

This letter presents a 30–100 GHz wideband and compact fully integrated sub-harmonic Gilbert-cell mixer using 90 nm standard CMOS technology. The sub-harmonic pumped scheme with advantages of high port isolation and low local oscillation frequency operation is selected in millimeter-wave mixer design. A distributed transconductance stage and a high impedance compensation line are introduced to achieve the flatness of conversion gain over broad bandwidth. The CMOS sub-harmonic Gilbert-cell mixer exhibits ${-}{hbox{1.5}} pm {hbox{1.5}}$ dB measured conversion gain from 30 to 100 GHz with a compact chip size of 0.35 mm$^{2}$. The OP$_{1 {rm dB}}$ of the mixer is ${-}$ 10.4 dBm and ${-}$9.6 dBm at 77 and 94 GHz, respectively. To the best of our knowledge, the monolithic microwave integrated circuit is the first CMOS Gilbert-cell mixer operating up to 100 GHz.      

6～20GHz宽带低噪声中功率放大器

本文介绍了６～２０ＧＨｚ微波宽带低噪声、中功率放大器的研制工作。采用微波宽带匹配和ＣＡＤ技术, 研制出了符合整机要求的放大器。主要性能指标： 工作频率６～２０ＧＨｚ, １ｄＢ压缩输出功率≥１８ｄＢｍ , 增益≥２８ｄＢ, 输入输出驻波比≤２．０∶１, 噪声系数≤４．０ｄＢ, 增益平坦度≤±２．０ｄＢ