PDP制作中的热压成型工艺研究

等离子体显示器与电路的连接是用热压连接带连接的,热压连接和屏是用各向异性导电膜采用热压成型技术进行连接。由于等离子体显示器引线宽度和间距小,电极线数量多,给热压引线带来了许多困难。本文叙述了各向异性导电膜结构和原理,以各向异性导电膜的选择原则作了概括性说明,同时对热压设备作了简介,最后对各向异性导电膜的热压工艺进行了较深入的研究,开发出了二次成型工艺,并成功地应用于21英寸等离子体显示器的研制中。     

缩短批次式清洗周期的策略

在总的构成先进的90nm器件工艺步骤中,晶圆清洗工艺占了近15%.性能和处理量优势是在清洗中继续采用批次式处理方式的主要原因.但是,对周期时间的关注推动了单晶圆清洗工艺的开发.在本工作中,介绍了批次式处理周期时间的改善,提供了一种保持性能和处理量,同时又能实现清洗工艺生产力增长的可选方法.     

热压焊接工艺优化研究

热压焊接是连接柔性电路板和刚性电路板的一种焊接工艺,作为微电子表面组装技术领域的新兴制造工艺和重要组成部分,稳定和高效的热压焊接工艺无疑是保证产品良好品质的重要环节。通过统计分析热压焊接的主要失效模式,并从材料、工艺参数及设备进行实验比对和实验设计(DOE)找出各主要失效模式的影响因素及其之间的相互关系,确定最佳工艺参数。     

复合材料热压罐固化温度参数分析和控制

热压罐是用于对胶接结构（如夹层结构制品、组合件的胶接装配等）或复合材料构件进行加热、加压的特种关键工艺设备。本文通过对热压罐设备动态参数分析和工艺实验，结合复合材料固化工艺，研究了控制复合材料构件固化过程的方法和措施，提出了实用的面向固化对象的热压罐固化成型温度控制方法。     

一种新型节能机械蒸汽再压缩装置

正国内外目前主要采取反渗透膜工艺及蒸发工艺处理高浓度含盐、含重属污水,以达到国家排放标准和中水回用。但由于反渗透膜的特性对进水水质的要求较高、处理量出水低于70%,浓缩液量大,且随着运营时间的延续处理量逐渐减少,反渗透膜就需及时更换,在一定程度上制约了膜的使用及处理污水的能力。传统的单效及多效蒸发技术及目前在推广使用的机械蒸汽再压缩技术(MVR)由于采用金属材料,其结垢、腐蚀等原因也限制了其使用范围。重庆市三耕储节能环保科技有限公司通过对国内外相关资料的分析,通过实验,自主开发出了一种用于热交换的高分子换热膜,应用于MVR设备的制造并取得了成功,获得国家多项新型实用专利证书。MVR是蒸汽机械再压缩技术(mechanical vapor recompression)的简称。mvr是重新利用它自身产生的二次蒸汽的能量,从而减     

新芯片

SOC平台技术诞生新标准 开发者：GLOBALFOUNDRIES和ARM 在MWC2010上,系统芯片（SoC）平台技术又得到了进一步提升,GLOBALFOUNDRIES和ARM推出的新芯片制造平台预计将使计算性能提高40％,功耗减少30％,待机电池寿命延长一倍。新平台包含了双方在GLOBALFOUNDRJES的两个工艺变量方面的合作：一是28nm超低功耗（SLP）工艺,用于移动和消费应用：另一个是28nm高性能（HP）工艺,用于需要最高性能的应用。     

铝连线在高端DRAM和FLASH互连金属连线的应用

铝连线工艺作为一种相对成熟的技术以其稳定的工艺，相对低廉的性价比和成熟的技术在超大规模集成电路中得到了广泛的应用。随着芯片集成度不断提高的要求．铜工艺给硅芯片的互连材料带了很大的变化．它以它的低电阻（低30％）在逻辑芯片的的高端应用上（130纳米及以下）优势明显。然而对更在乎制造成本的DRAM和FLASH而言．即使是在110纳米及以下．不断发展更新的铝工艺仍然是很有竞争力的。     

新型超纯Stat—Loy复合材料，为半导体行业带来“洁净”塑料解决方案

随着消费者对电子产品在功率和功能方面的要求日益严苛,半导体行业不断努力尝试在现有的集成电路（亦称芯片）上加入更多的功能。新一代芯片制造是采用氩氟（ArF）激光技术的光刻工艺。然而,由于在防护容器（光罩／掩模板）中尚未普遍使用达到“洁净”标准的塑料,导致ArF激光技术在IC制造工艺中的应用一再拖延。为攻克这一难关并满足客户需求,沙伯基础创新塑料的LNP。特种复合材料部开发了超纯透明（UPT）Stat—Loy^＊63000CT系列复合材料。UPT Stat—Loy复合材料可用于晶圆防护设备,预防因释气所造成的毁损,因而导致晶片污染、     

加速激光加工技术在我国汽车工业中的应用

加速激光加工技术在我国汽车工业中的应用陈秀娥（中科院上海光机所）一、前吉激光加工技术经过二十多年的研究、开发和应用实践，正以自己独特的优势，逐步取代传统加工工艺，并解决用传统加工工艺不能或不好解决的问题。越来越受到工业界的接受和青睐，并正在与其他学科...     

纳米压印技术

传统光学光刻技术的高成本促使科学家去开发新的非光学方法,以取代集成电路工厂目前所用的工艺.另外,微机电系统(MEMS)的成功启发科学家借用MEMS中的相关技术,将其使用到纳米科技中去,这是得到纳米结构的一种有效途经.纳米压印在过去的几年里受到了高度重视,因为它成功地证明了它有成本低、分辨率高的潜力.纳米压印技术主要包括热压印、紫外压印(含步进-闪光压印)和微接触印刷等.本文详细讨论纳米压印材料的制备及常用的三种工艺的工艺步骤和它们各自的优缺点.并对这三种工艺进行了比较.最后列举了一些典型应用,如微镜、金属氧化物半导体场效应管、光栅等.     

高密度封装进展之五——采用无源元件和有源元件埋入技术实现的模块内系统封装

介绍了将无源元件和有源元件埋置于基板内部的三维封装模块SIMPACT。其利用热固性树脂和无机填料构成的复合材料,在不造成元件损伤的前提下,能在多层基板的任意层内三维埋入元件,由此构成一个封装内具有系统功能的小型模块。     

分层异构网络中基于进化博弈的小区附着机制

相比传统的宏蜂窝网络,分层异构网络是实现系统容量增强的一种很有前景的技术。尽管如此,由于家庭基站与宏基站同频部署,且它们被随机部署,异构网络中的干扰可能会更强。为了提升网络吞吐量,本文研究了一种新型的基于进化博弈的小区附着算法,为最小化小区间干扰,提高网络吞吐量提供了理论参考。     

Stencil mask ion implantation technology

The ion implantation process is important for the development or manufacturing of semiconductor devices, because ion implantation conditions directly influence some characteristics of semiconductor devices. Recently, we developed a new implantation technology, stencil mask ion implantation technology (SMIT). In the SMIT system, the stencil mask acts like a resist mask, and ions passing through the mask holes are implanted into selected regions of the Si substrate chip by chip. Use of SMIT has several advantages, notably lower manufacturing cost and shorter process time than in the case of conventional processing, because no photolithography process (including deposition and stripping of resist) is required. We have already demonstrated an application of SMIT to transistor fabrication, using various implanted dose conditions for the same wafer. Threshold voltage values can be controlled as effectively by implanted doses as they can by conventional implantation, and the dose dependence of the threshold voltage could be obtained from one wafer to which various implantation conditions are applied. Using SMIT, implantation conditions can be changed chip by chip without additional processes. This flexibility of implantation conditions is another advantage of SMIT. In this paper, we propose stencil mask ion implantation technology and show some fundamental results obtained by applying SMIT     

基于DEM技术的塑料毛细管电泳芯片加工工艺

传统的毛细管电泳芯片基体材料以硅和玻璃为主，成本较高，且不适合于生化领域。而以聚合物作为基片材料，由于材料成本较低，且微复制方法成本也很低，因此可望在商业上取得广泛的应用。采用DEM技术，利用感应偶合等离子体（ICP）刻蚀设备进行硅的刻蚀，然后从硅片直接进行微电铸，得到金属模具后，再利用微复制工艺，最终得到的毛细管电泳芯片基片，该技术工艺简单，可实现大批量低成本生产，预期将有广阔的应用前景。     

Optimized BS assignment and resource allocation in cooperative OFDM networks

Cooperative transmission (CT) and orthogonal frequency division multiple (OFDM) are promising technologies for extending coverage and increasing throughput in broadband wireless access (BWA) networks. Therefore, we propose a novel BWA network architecture, that can set up inter-cell collaboration using physical layer cooperative transmissions among distributed wired access networks with a powerful coordination capability at the central office. However, conventional base station (BS) assignment and resource allocation schemes cannot be used directly because a user can be serviced by more than one BS with cooperative transmission technology. This study proposes a novel framework of BS assignment and resource allocation in a cooperative OFDM network. We provide three approaches of resource allocation for minimizing bandwidth usage, minimizing transmission power consumption, and balancing resource costs respectively. An optimized resource allocation scheme can be implemented by flexibly choosing one of these approaches based on network load. The simulation results show the efficiency of the proposed mathematical formulations and linearization approach of our scheme. The performance benefit of CT technology on the bandwidth saving is demonstrated by comparing the new BS assignment and resource allocation scheme with conventional non-cooperative transmission.     

VNE-AFS：基于人工鱼群的网络虚拟化映射算法

虚拟网络资源映射是云计算研究领域的一个难点问题。以降低底层网络映射开销为目标,提出一种基于人工鱼群的网络虚拟化映射算法VNE-AFS。根据虚拟网络请求对底层网络节点和链路的约束关系建立二进制组合优化模型,并利用人工鱼群算法实现虚拟网络资源向底层网络资源的近似最优映射。实验结果表明,与现有的虚拟网络映射算法相比,该算法有效地降低了底层网络的开销和求解时间,提高了虚拟网络映射的成功率、平均收益和资源利用率。     

Development of a very large-area ultraviolet imprint lithography process

We propose a very large-area ultraviolet imprint lithography process as a promising alternative to expensive conventional optical lithography for the production of display panels. This process uses a large-area hard stamp in a low vacuum environment. The hard quartz stamp is used to achieve high overlay accuracy, and the vacuum environment is required to ensure that air bubble defects do not occur during imprinting. We demonstrate that the quartz stamp with microscale patterns can be used for imprinting 18-in. diagonal substrates via single-step UV imprint in a low vacuum environment to obtain a practical residual layer thickness (RLT) for micro pattern transfer to the substrate. Numerical analysis is performed to clarify the physical phenomena underlying imprint process.     

Optimal <Emphasis Type="Italic">M</Emphasis>-PAM Spread-Spectrum Data Embedding with Precoding

We consider M-level pulse amplitude modulation (M-PAM) spread-spectrum (SS) data embedding in transform domain host data. The process of data embedding can be viewed as delivering information through the channel including additive interference from host that is known to the embedder. We first utilize the knowledge of second-order statistics of host to design optimal carrier that maximizes the signal-to-interference-plus-noise ratio at the decoder end. Then, inspired by Tomlinson–Harashima precoding used in communication systems, a symbol-by-symbol precoding scheme is developed for M-PAM SS embedding to alleviate the impact of the interference which is explicitly known to embedder. For any given embedding carrier and host data, we aim at designing precoding algorithm to minimize the receiver bit error rate (BER) with any given host distortion budget, and conversely minimize the distortion at any target BER. Experimental studies demonstrate that the proposed precoded SS embedding approach can significantly improve BER performance over conventional SS embedding schemes.     

Efficient routing for wireless mesh networks using a backup path

Wireless mesh networks (WMNs) have a proven record in providing viable solutions for some of the fundamental issues in wireless networks such as capacity and range limitations. WMN infrastructure includes clusters of mobile ad‐hoc networks connected through a fixed backbone of mesh routers. The mesh network can be constrained severely because of various reasons, which could result in performance degradation such as a drop in throughput or long delays. Solutions to this problem often focus on multipath or multichannel extensions to the existing ad‐hoc routing protocols. In this paper, we propose a novel solution by introducing an alternative path to the mesh backbone that traverses the mobile ad‐hoc networks part of the WMN. The new routing solution allows the mobile nodes (MNs) to establish direct communication among peers without going through the backbone. The proposed alternative ad‐hoc path is used only when the mesh backbone is severely constrained. We also propose, for the first time in WMNs, using MNs with two interfaces, one used in the mesh backbone communication and the other engaged in the ad‐hoc network. A scheme is presented for making the MN aware of link quality measures by providing throughput values to the ad‐hoc on‐demand distance vector protocol. We use piggybacking on route reply messages in ad‐hoc on‐demand distance vector to avoid incurring additional costs. We implemented our solution in an OPNET simulator and evaluated its performance under a variety of conditions. Simulation results show that the alternative ad‐hoc path provides higher throughput and lower delays. Delay analysis show that the throughput improvement does not impose additional costs. Copyright © 2012 John Wiley & Sons, Ltd.     

New high-density multilayer technology on PCB

Demand has recently increased for very high-density packaging substrates for high-pin-count area array chips. Our new high-density multilayer technology on printed circuit board (PCB), named deposited substrate on laminate (DSOL) satisfies this demand. An important feature of the DSOL is dielectric fabrication, which uses a new photosensitive material; an aromatic fluorene unit bonded epoxy acrylate resin. The fluorene based resin has interesting properties such as good electrical properties, low curing temperature (160°C) for a heat-resistant resin (glass transition temperature, T_g=230°C), low coefficient of the thermal expansion (40 ppm), and excellent via hole resolution. Very fine and high-aspect-ratio (>1.0) via holes were formed through exactly the same process steps as those used for a conventional photosensitive epoxy resin; baking, exposure, and development with an aqueous alkaline solution. Another important feature is the technology, that patterns fine-pitch Cu conductors using a semi-additive process with a sputtering method. The DSOL made 40 μM very fine pitch Cu conductors on large laminates (330 mm×400 mm) possible, because this process was composed of flash wet etching of only 0.3 μm thick sputtered thin-films. We have successfully developed a high-density packaging substrate for high-pin-count (4000 pins) area array application specific integrated circuit (ASIC) chips