无坑洞n-3C-SiC/p-Si(100)的LPCVD外延生长及其异质结构特性

在MBE/CVD高真空系统上,利用低压化学气相淀积(LPCVD)方法在直径为50mm的单晶Si(100)衬底上生长出了高取向无坑洞的晶态立方相碳化硅(3C-SiC)外延材料,利用反射高能电子衍射(RHEED)和扫描电镜(SEM)技术详细研究了Si衬底的碳化过程和碳化层的表面形貌,获得了制备无坑洞3C-SiC/Si的优化碳化条件,采用霍尔(Hall)测试等技术研究了外延材料的电学特性,研究了n-3C-SiC/p-Si异质结的I-V、C-V特性及I-V特性对温度的依赖关系.室温下n-3C-SiC/p-Si异质结二极管的最大反向击穿电压达到220V,该n-3C-SiC/p-Si异质结构可用于制备宽带隙发射极SiC/Si HBTs器件.     

射频磁控溅射法制备AZO/p-Si异质结及其性能研究

利用射频磁控溅射法,在p-Si衬底上生长了Al掺杂的ZnO(AZO)薄膜,并进而制备了AZO/p-Si异质结。X射线衍射仪、紫外-可见光分光光度计、四探针测试仪和霍尔效应测试仪测量表明,AZO薄膜具有良好的结晶质量、光学和电学特性。暗态下的I-V测试表明,AZO/p-Si异质结具有较好的整流特性,反向饱和电流为1.29×10-6A,±2V处的正向和反向电流之比为229.41,计算得出异质结的理想因子为2.28。在标准光照下AZO/p-Si异质结呈现出明显的光生伏特效应,这种异质结太阳电池具有2.51%的光电转换效率。     

快热退火对Co/n-Poly-SiGe肖特基结I-V-T特性的影响

采用射频磁控溅射法在n-Si(100)衬底上沉积Si1-xGex薄膜,俄歇电子谱(AES)测定Si1-xGex薄膜的Ge含量约为17%。对薄膜进行高温磷扩散掺杂,制得n-poly-Si0.83Ge0.17。在n-poly-Si0.83Ge0.17薄膜上溅射一层Co膜,制成Co/n-poly-Si0.83Ge0.17/n-Si肖特基结样品。在300～600℃范围内,对样品做快热退火。对不同退火温度下的样品做I-V-T测试。研究发现,测试温度升高,不同退火温度样品的肖特基势垒高度(SBH)的差别变小,500℃退火的样品,表观SBH最小。总体上,SBH随测试温度的升高而变大,理想因子的变化趋势则与之相反。基于SBH的不均匀分布建模,对实验结果给出了较为合理的解释。     

磁控溅射制备纳米晶GZO/CdS双层膜及GZO/CdS/p-Si异质结光伏器件的研究

采用磁控溅射制备Ga掺杂ZnO (GZO)/CdS双层膜在p型晶硅衬底上以形成GZO/CdS/p-Si异质结器件。纳米晶GZO/CdS双层膜的微结构、光学及电学特性,通过XRD、SEM、XPS、紫外-可见光分光光度计和霍尔效应测试系统表征。GZO/CdS/p-Si异质结J-V曲线显示良好的整流特性。在±3 V时,整流比IF/IR(IF和IR分别表示正向和反向电流)已达到21。结果表明纳米晶GZO/CdS/p-Si异质结具有好的二极管特性,在反向偏压下获得高光电流密度。纳米晶GZO/CdS/p-Si异质结显示明显的光伏特性。由于CdS晶格常数在GZO和晶Si之间,它能作为一个介于GZO和晶Si之间的缓冲层,能有效地减少GZO和p-Si之间的界面态。因此,我们获得了GZO/CdS/p-Si异质结明显光伏特性。     

（英）磁控溅射制备纳米晶GZO/CdS双层膜及GZO/CdS/p-Si异质结光伏器件的研究

本文中,采用磁控溅射制备Ga掺杂ZnO (GZO)/CdS双层膜在p型晶硅衬底上以形成GZO/CdS/p-Si异质结器件。纳米晶GZO/CdS双层膜的微结构、光学及电学特性,通过XRD、SEM、XPS、紫外-可见光分光光度计和霍尔效应测试系统表征。GZO/CdS/p-Si异质结J-V曲线显示良好的整流特性。在±3V时,整流比IF/IR(IF和IR分别表示正向和反向电流)已达到21。结果表明纳米晶GZO/CdS/p-Si异质结具有好的二极管特性,在反向偏压下获得高光电流密度。纳米晶GZO/CdS/p-Si异质结显示明显的光伏特性。由于CdS晶格常数在GZO和晶Si之间,它能作为一个介于GZO和晶Si之间的缓冲层,能有效地减少GZO和p-Si之间的界面态。因此,我们获得了GZO/CdS/p-Si异质结明显光伏特性。     

pn结对微机械p/n多晶Si热电堆性能的影响

为了研究pn结对微机械p/n多晶Si热电堆性能的影响,设计了两种结构的热电堆器件,采取不同的退火条件,对其结构进行了研究。实验结果表明,工艺过程中形成的pn结会使得热电堆的电阻变大,信号变小,退火条件决定了热电堆器件能否正常工作。因此,在设计热电堆时应该尽量避免pn结,可以采用p-Si/n-Si分离结构予以解决。     

p-CuAlO2/(n-, p-)Si异质结的制备与电学性质

采用化学溶液法在n型和p型Si衬底上成功制备了单相CuAlO2薄膜。薄膜的电导率-温度曲线显示,薄膜在200K-300K温度范围内呈热激活导电模式,激活能约为0.3eV。电流-电压特性测试显示,p-CuAlO2/n-Si异质结具有明显的整流特性,开启电压约为1.6V,在±3V处的整流率约为35,而p-CuAlO2/p-Si同型异质结表现出类似肖特基结的电学性质,由于p-CuAlO2导电性远低于p-Si衬底,正向电流受空间电荷限制。     

ZnO/p-Si异质结构的电学输运特性

采用等离子体浸没离子注入沉积方法,在p型Si衬底上制备了具有整流特性的、非故意掺杂的以及掺氮的ZnO/p-Si异质结.非故意掺杂的ZnO薄膜为n型(电子浓度为1019cm-3数量级),掺氮的ZnO薄膜为高阻(电阻率为105Ω·cm数量级).非故意掺杂的ZnO/p-Si异质结在正向偏压下,当偏压大于0.4V,电流遵循欧姆定律.然而对于掺氮的ZnO/p-Si样品,当偏压小于1.0V时,电流表现为欧姆特性,当偏压大于2.5V时,电流密度与电压的平方成正比的关系.分别用Anderson模型和空间电荷限制电流模型对非故意掺杂和掺氮的ZnO/p-Si异质结二极管的电流输运特性进行了解释.     

衬底温度对AlN/ZnO复合薄膜结构形貌的影响

采用直流反应磁控溅射法在ZnO/Si基片上制备了良好(002)(c轴)取向的AlN薄膜,利用XRD、AFM对不同衬底温度下制备的AlN薄膜的结构、形貌进行了分析表征.结果表明,在一定湿度范围内(450～650℃),随着衬底温度的升高,晶粒逐渐长大,沉积速率增大,表面粗糙度先减小后增大;AlN(002)择优取向呈改善趋势,取向度先增大后减小,600℃时达到最佳.     

n-Si/p-CuI异质结的制备及其光电特性研究

采用成本低廉的连续离子层沉积法通过在n型Si衬底上沉积γ相的多晶结构的CuI薄膜而制备了CuI/n-Si异质结。并通过测试其光照下的I-V、C-V特性对其光电特性、载流子输运特性及导电机理进行了研究。研究表明CuI/n-Si异质结存在良好的整流特性,由于在CuI/nSi异质结界面处的导带补偿与价带补偿相差较大,在正向电压、无光照下,导电机理为空间电荷限制电流导电,此时空穴电流主导;在光照下,异质结表现出良好的光电响应,因此可以广泛应用在光电探测和太阳电池等领域。     

ITO/PTCDA/p-Si薄膜器件的表面和界面特性研究

界面态对于薄膜器件的性能具有非常重要的影响。有米用真空蒸发和溅射沉积的方法制备了ITO／PTCDA／p—Si薄膜器件,并采用X射线光电子能谱（xPs）和Ar^＋溅射技术对其表面和界面电子态进行了研究。结果表明,在ITO／PTCDA／pSi薄膜器件的界面,不仅ITO与PTCDA薄膜之间存在扩散,PTCDA与Si衬底材料之间也存在扩散现象。此外,每种原子的XPS谱表现出一定的化学位移,并以Cls和Ols谱的化学位移最为显著。     

LP-MOCVD法制作n-ZnO/p-Si异质结及其电致发光研究

采用低压-金属有机化学气相沉积法(LP-MOCVD)在(100)p-Si衬底上制备未掺杂n型ZnO薄膜,并制作了相应的n-ZnO/p-Si异质结器件.通过X射线衍射(XRD)、光致发光(PL)光谱和霍尔测试分别研究了所制备薄膜的结构、光学和电学特性.得到具有较高质量的n型ZnO薄膜.在室温条件下,测得了该类异质结器件正向注入电流下可见光和近红外区域的电致发光(EL).     

Au/BIT/PZT/BIT/p-Si(100)存储器

利用准分子激光原位淀积方法制备了BIT／PZT／BIT，PZT／BIT和BIT层状铁电薄膜，获得了电流密度－电压（I－V）回线和极化强度P－V电滞回线。在这三种结构中，Au/BIT/PZT/BIT/p-Si(100）结构的界面电位降、内建电压及频率效应是最小的。在电压转变电VT、饱和极化强度Ps及矫顽场Vc之间有三种关系，他们与I－V回线及P－V回线的关系相匹配，这种匹配关系使得以I－V回线操作的存储器将能够非挥发和非破坏读出及具有保持力。     

Adjustment of NiSi/n-Si SBH by post-silicide of dopant segregation process

The post-silicide of dopant segregation process for adjusting NiSi/n-Si SBH (Schottky barrier height) is described. Adopting the analysis of the I-V characteristic curve and extrapolating the SBH of NiSi/n-Si Schottky junction diodes (NiSi/n-Si SJDs), the effects of different of process parameters dopant segregation, including segre gation anneal temperature and dopant implant dose, on the properties of the NiSi/n-Si SJDs have been studied, and the corresponding mechanisms are discussed.     

Post-Silicide杂质分凝工艺调节NiSi/n-Si肖特基势垒高度

The post-silicide of dopant segregation process for adjusting NiSi/n-Si SBH（Schottky barrier height）is described.Adopting the analysis of the I–V characteristic curve and extrapolating the SBH of NiSi/n-Si Schottky junction diodes（NiSi/n-Si SJDs）,the effects of different of process parameters dopant segregation,including segregation anneal temperature and dopant implant dose,on the properties of the NiSi/n-Si SJDs have been studied,and the corresponding mechanisms are discussed.     

The determination of the interface-state density distribution from the capacitance-frequency measurements in Au/n-Si schottky barrier diodes

The Au/n-Si Schottky barrier diodes (SBDs) with 200-μm (sample D200) and 400-μm (sample D400) bulk thicknesses have been fabricated. The ideality factor and the barrier height have been calculated from the forward-bias current-voltage (I-V) characteristics of D200 and D400 SBDs. The energy distribution of the interface states and relaxation time are found from the capacitance-frequency (C-f) characteristics. The density of interface state and relaxation times have a (nearly constant) slow exponential rise with bias in the range of E_c −0.77 and E_c −0.47 eV from the midgap toward the bottom of the conductance band. Furthermore, the energy distribution of the interface states obtained from C-f characteristics has been compared with that obtained from the forward-bias I-V characteristics.     

硅基氧化锌薄膜中的发光和复合中心

报道了用MOCVD方法制备的硅基ZnO薄膜中的中性施主-价带D0h发光.ZnO/p-Si结构经空气中700 ℃退火1h,然后进行X射线衍射(XRD)、光致发光(PL)谱和I-V特性测量.实验得到不同载气流量制备的样品都具有整流特性.深能级瞬态谱(DLTS)测量探测到各样品中存在两个施主深能级E1和E2.相应的室温PL谱测量显示样品近带边发射包含不同的发光线.利用高斯拟合方法,样品S2a的PL谱分解为三条发光线b,c和d,其中发光线b可归结为ZnO中的激子发射;DLTS测量得到的施主能级E1与发光线c和d的局域态电离能Ed相关,为D0h中心.此外,实验揭示E2能级的相对隙态密度与PL谱的发光强度成反比,表明深能级E2具有复合中心性质.     

Current transport mechanisms and deep level transient spectroscopy of Au/n-Si Schottky barrier diodes

The temperature-dependent electrical characteristics of the Au/n-Si Schottky diodes have been studied in the temperature range of 40-300 K. Current density-voltage (J-V) characteristics of these diodes have been analyzed on the basis of thermionic emission theory with Gaussian distribution model of barrier height. The basic diode parameters such as rectification ratio, ideality factor and barrier height were extracted. Under a reverse bias, the conduction process at low voltage is determined by Schottky emission over a potential barrier but at higher voltage the Poole Frenkel effect is observed. The capacitance-voltage (C-V) features of the Au/n-Si Schottky diodes were characterized in the high frequency of 1 MHz. The barrier heights values obtained from the J-V and C-V characteristics have been compared. It has been seen that the barrier height value obtained from the C-V measurements is higher than that obtained from the J-V measurements at various temperatures. Possible explanations for this discrepancy are presented. Deep level transient spectroscopy (DLTS) has been used to investigate deep levels in Au/n-Si. Three electron trap centers, having different emission rates and activation energies, have been observed. It is argued that the origin of these defects is of intrinsic nature. A correlation between C-V and DLTS measurements is investigated.