AC characterization of organic thin-film transistors with asymmetric gate-to-source and gate-to-drain overlaps

This paper presents S-parameter characterization and a corresponding physics-based small-signal equivalent circuit for organic thin-film transistors (OTFTs). Furthermore, the impact of misalignment between the source/drain contacts and the patterned gate on the dynamic TFT performance is explored and a simple method to estimate the misalignment from the measured S-parameters is proposed. An excellent fit between theoretical and experimental S-parameters is demonstrated. For this study, OTFTs based on the air-stable organic semiconductor dinaphtho[2,3-b:2′,3′-f]thieno[3,2-b]thiophene (DNTT) having a channel length of 1 μm and a gate-to-contact overlap of 5 or 20 μm and being operated at a supply voltage of 3 V are utilized. The intentional asymmetry between gate-to-source and gate-to-drain overlaps is precisely controlled by the use of high-resolution silicon stencil masks.     

CW oscillation characteristics of GaAs Schottky-barrier gate field-effect transistors

The CW oscillation characteristics of GaAs Schottky-barrier gate FET's have been examined at 10 GHz. The maximum output power of 41.2 mW and the maximum efficiency of 15.6 percent have been obtained for the GaAs FET with a gate length of 1.5 µm and an electrode width of 300 µm. The experimental results have shown that the GaAs FET possesses promising features for an oscillator application as well as an amplifier application.     

Noise behavior of GaAs field-effect transistors with short gate lengths

The noise behavior of the GaAs Schottky-barrier gate field-effect transistor has been investigated theoretically and experimentally. It has been found that an additional noise source has to be taken into account in GaAs FET's biased in the pinchoff region: the intervalley scattering noise. This noise source has been investigated and a new transistor noise model is proposed. Measured and calculated noise figures show good agreement in the frequency range 2-10 GHz. It is shown that the influence of the intervalley scattering noise can be reduced by reducing the channel thickness, and that such devices show excellent gain and noise properties in the X band.     

Medium-power GaAs field-effect transistors

Results on medium-power GaAs m.e.s.f.e.t.s. are described. Output powers as high as 300 mW at 9 GHz at 1 dB gain compression with a linear gain of 5.2 dB and drain efficiency of 30% have been obtained with single-cell m.e.s.f.e.t.s. At 4 GHz, a power output of 665 mW at 1 dB gain compression, a linear gain of 8 dB and a drain efficiency of 44.5% were realised with a 3-cell m.e.s.f.e.t. Two-tone intermodulation characteristics at 4 GHz are also described. A major innovation has been the use of a high-resistivity chromium-doped epitaxial GaAs buffer layer to isolate the device active region from the bulk-grown substrate.     

Novel microwave GaAs field-effect transistors

A technology is described for the fabrication of Schottky-barrier f.e.t.s with electrodes on either or both sides of a submicrometre thick single-crystal layer of GaAs. Preliminary d.c. and microwave results are given together with possible advantages of these novel f.e.t. structures.     

A novel GaAs FET with double camel-like gate structure

Extremely high potential barrier height and gate turn-on voltage of a novel GaAs field-effect transistor with n/sup +//p/sup +//n/sup +//p/sup +//n double camel-like gate structure are demonstrated. The maximum electric field and potential barrier height of the double camel-like gate are substantially enhanced by the addition of another n/sup +//p/sup +/ layers in gate region, as compared with the conventional n/sup +//p/sup +//n single camel-like gate. For a 1/spl times/100 /spl mu/m/sup 2/ device, a potential barrier height up to 2.741 V is obtained. Experimentally, a high gate turn-on voltage up to +4.9 V is achieved because two reverse-biased junctions of the double camel-like gate absorb part of positive gate voltage. In addition, the transistor action shows a maximum saturation current of 730 mA/mm and an extrinsic transconductance of 166 mS/mm.     

Gallium arsenide self-aligned gate field-effect transistors

A technique is described for automatically aligning the gate contact of a gallium arsenide microwave-frequency Schottky-barrier field-effect transistor between the source and drain contacts. This technique consists of etching part of the epitaxial gallium arsenide layer from beneath the edge of the source and drain contacts and using the resulting overhang as an evaporation mask for the gate contact metal. Microwave measurements were made on a device fabricated in this manner with a 4-µ gate length. Maximum available gain measurements yield 16 dB at 2 GHz falling off at 6 dB/octave to a cutoff frequency of 11 GHz.     

Reliability of power GaAs field-effect transistors

The first report on a comprehensive study of the reliability of power GaAs FET's with aluminum gates and silicon-nitride passivation is presented. A total of 265 standard 6-mm-wide devices has been aged under dc-bias conditions with and without RF drive at channel temperatures of 250, 210, and 175°C. One-million device-hours have been accumulated with no catastrophic failure. A very conservative estimate predicts that the failure rate for burnout at a maximum channel temperature in normal operation of 110°C would be below 100 FIT's. Degradation in the electrical parameters has been very slow even at 250°C channel temperature. It is estimated that the failure rate for gradual degradation at 110°C would be well below 100 FIT's and most likely lower than 10 FIT's. No deterioration in the properties of gates and ohmic contacts have been observed. Diagnostic characterization has revealed that gradual degradation in the sample devices is caused by deterioration in the channel material. There has been no noticeable difference in gradual degradation between devices aged with and without RF drive at the same channel temperature for more than 3000 h. The present study has already demonstrated that the power GaAs FET's used as the samples are very reliable.     

Influence of nonuniform field distribution on frequency limits of GaAs field-effect transistors

A simple model which describes well the nonequilibrium electron transport in GaAs using the fit to the equilibrium Monte Carlo data is suggested. In the frame of this model, the cutoff-frequency/gate-length curves are calculated for uniform and nonuniform channel field distribution in GaAs f.e.t.s. The results show that the nonhomogeneity of the electric field in the channel can considerably decrease (by 30%) the maximal frequency of GaAs f.e.t.s.     

GaAs field-effect transistors with ion-implanted channels

Schottky-barrier-gate n channel depletion-mode field-effect transistors have been fabricated in GaAs by the use of sulphurion implantation directly into semi-insulating Cr-doped substrates to produce the channel. This technique eliminates the need for the growth of a thin epitaxial layer, as is usually done, and results in better uniformity of device characteristics over the wafer area. Performance of these devices at 1 to 12 GHz is described, and low-frequency characteristics are given.     

Ion-implanted microwave field-effect transistors in GaAs

Microwave field effect transistors have been fabricated in gallium arsenide by using sulfur ion implantation directly into semi insulating Cr doped substrates to produce the channel region, eliminating the need for growth of an epitaxial layer. This implantation method has been used to produce 0·25 μm thick, n-type layers with uniform thickness and carrier concentration, and carrier mobility ranging from 2410 to 3620 cm²/V sec in different samples. Because of the uniformity, FET's fabricated in these layers have exhibited reproducibility of transconductance and pinchoff voltage from device to device on a wafer to better than ±10 per cent. Cr doped GaAs of commonly available quality was found to be satisfactory for FET fabrication, although minimum Cr compensation is desirable to obtain highest mobility. S parameter measurements of microwave characteristics indicated a projected f_max = 20 GHz but transducer gain cutoff occurred at approximately 7 GHz because of impedance mismatch and package parasitics.     

Microwave field-effect transistors from sulphur-implanted GaAs

Sulphur implanation into semi-insulating Cr doped GaAs has been used to fabricate MESFETs with 1.5 μm gatelength showing microwave gain equivalent to epitaxial FETs (MAG = 9 dB at 10 GHz) but higher noise. Room temperature implantation of S at an energy of 30 keV and a dose of 5 × 10¹² cm^?2, sputtered SiO₂ and Si₃N₄ as encapsulants and heat treatments from 820 to 900°C have been used. Electrical activation was found to depend critically on the substrate material. Si₃N₄-encapsulation gave slightly higher electrical activation than SiO₂.     

Epitaxial GaAs p-n junction field-effect transistors

Structure and fabrication of single-gate GaAs p-n junction field-effect transistors is described. The devices employ n-type GaAs layers grown epitaxially on semi-insulating substrates of GaAs. Experimental devices indicate a cutoff frequency of approximately 2 GHz. Optimized device geometries promise operation at microwave frequencies as amplifiers and oscillators. Negative resistance oscillations above a field of approximately 3 × 10³V/cm have been observed.     

Subthreshold slope for insulated gate field-effect transistors

An explicit expression has been derived for the subthreshold slope of an insulated gate field-effect transistor. This expression is used to explore the influence of surface band-bending, gate insulator thickness, substrate doping, substrate bias, and temperature.     

Frequency limits of GaAs and InP field-effect transistors

Monte Carlo calculations of electron transport in InP and GaAs short-channel field-effect transisters (FET's) show that a significant departure from the equilibrium velocity-field curve occurs in these devices. On the basis of these calculations, InP FET's should have high-frequency performance superior to that of GaAs FET's only for effective channel lengths in excess of 1.5 µ.     

Ga0.47In0.53As field-effect transistors with a lattice-mismatched reduced leakage current GaAs gate

A lattice-mismatched GaAs gate Ga0.47In0.47As field-effect transistor (LMG-FET) with significantly reduced reverse gate leakage current is reported. The mechanism responsible for this reduction by over two orders of magnitude over previous work has been identified; it is attributed to the confinement of misfit dislocations originating at the GaAs/InGaAs interface. The LMG-FET had a gate leakage current of 0.48 ?A at ? V, and an extrinsic DC transconductance of 104 mS/ mm for a 1.4 ?m gate length and 240 ?m gate width. Further refinements in crystal growth should lead to even lower values of leakage current, making this technology attractive for high-speed logic, as well as lightwave optoelectronic integration.     

GaAs field-effect transistors by selective sulphur-ion implantation

GaAs field-effect transistors without a mesa structure have been fabricated by selective sulphur-ion implantation into Cr-doped GaAs substrates. The transconductance was 16 mS and the maximum oscillation frequency was 30 GHz.