Dynamic spectra of 1.3-µm InGaAsP lasers under pseudorandom word modulation

The dynamic spectra of 1.3-μm InGaAsP lasers were studied under low-duty-cycle pulse modulation and under 180- and 432-Mbit/s psendorandnm pulse modulation. The average dynamic spectra of these lasers differ from their dc-bias spectra, and also show variation betweeh low-duty-cycle pulse modulation and pseudorandom pulse modulation due to local heating effect. Under pseudorandom word modulation, no distinctive pulse-to-pulse variation in average dynamic spectra was observed. Transient damping times of the individual longitudinal mode of the average dynamic spectra of 2-4 ns were observed in the turn-on stage. Carrier buildup and decay of the side modes are the cause of these spectral transient responses. Essentially, the same average dynamic spectra were observed at 180 and at 432 Mbit/s where the time slot is less than the transient damping time in the turn-on stage. This suggests that the transient damping time of the individual longitudinal mode in the turn-off stage is much faster than that in the turn-on stage when the laser is biased below threshold. This result is supported by simple calculations from the rate equations which show that when the laser is biased below threshold, the transient damping time in the turn-off stage can be an order of magnitude faster than that in the turn-on stage.     

金属氧化物半导体控制晶闸管的di/dt优化

金属氧化物半导体控制晶闸管(MCT)相比于绝缘栅双极型晶体管(IGBT)具有高电流密度、低导通压降和快速开启等优势,在高压脉冲功率领域具有广阔的应用前景.作为脉冲功率开关,MCT开启过程对输出脉冲信号质量有很大影响.采用理论分析并结合仿真优化重点研究了MCT开启瞬态特性.通过对MCT开启过程进行详细地理论分析推导,给出了MCT开启过程中阳极电流和上升时间的表达式.结合Sentaurus TCAD仿真优化,将MCT开启过程中电流上升速率(di/dt)由40 kA/s提升至80 kA/s,极大地改善了器件开启瞬态特性.最后,总结提出了提高器件开启瞬间di/dt的设计途径.     

The roles of traps in the energy loss for aged organic solar cells: A transient photovoltage study

By investigating the turn-on and turn-off photovoltage dynamics as a function of aging time, we reported the roles of traps on the energy loss in organic solar cells composing of copper phthalocyanine (CuPc)/fullerene (C60). Illuminating the device with square pulses of light, a peak of transient photovoltage after turn-on was observed after device degradation. After turn-off, the transient photovoltage first goes to the negative before settling back to zero, which is the result of electron trapping in the C60 layer before being neutralized by re-injected holes. Furthermore, by adding a tris (8-hydroxyquinolinato) aluminum buffer to prevent the traps from propagating into C60 layer, the peak after turn-on is greatly suppressed and the negative peak after turn-off vanishes, supporting the trapped electrons in the C60 layer play the critical role in the appearance of peak of the transient photovoltage.     

ESD circuit model based protection network optimisation for extended-voltage NMOS drivers

New snapback circuit models for drain extended MOS (DEMOS) and complementary DEMOS-SCR structures used for ESD protection in high-voltage tolerant applications have been developed. The models were experimentally validated in a standard 0.35 μm CMOS process which requires 20 V compatible structures. It is shown that the new ESD models provide accurate representation of the structure breakdown, turn-on behaviour into conductivity modulation mode and dV/dt triggering effect, both in static and ESD transient conditions. A major application of this model is for initial ESD optimisation of complex mixed voltage analog circuits.     

Transverse-leaky-mode characteristics of ARROW VCSELs

Transverse-leaky-mode characteristics of antiresonant-reflecting-optical-waveguide (ARROW) vertical-cavity surface-emitting lasers (VCSELs) are studied. It is found that the suppression of high-order transverse leaky modes in ARROW VCSELs can be deteriorated by the influence of spatial hole burning and thermal lensing effects. On the other hand, a new design rule is proposed to deduce the optimum dimensions of ARROW so that the suppression of high-order transverse leaky modes can be enhanced. Furthermore, the turn-on transient response of ARROW VCSELs is investigated. It is found that the radiation loss has significant influence on the built-up time of the first-order transverse leaky mode.     

Two-dimensional analysis of a BiNMOS transistor operating at 77 Kusing a modified PISCES program

The authors present a detailed two-dimensional numerical simulation study on the steady-state and turn-on transient behavior of a BiNMOS device operating at 77 K using PISCES-2B with modified low-temperature models. It is shown that the switching speed of the BiNMOS device, which is designed for operation at room temperature, is degraded for low-temperature operation. The BiNMOS device structure and the low-temperature device models for the two-dimensional (2D) device simulator are described, following by the steady-state and the transient analysis of the BiNMOS device. The turn-on transient performance of the BiNMOS device shows that, at 77 K, the switching time, which is determined by the load-related delay and the intrinsic delay of the bipolar device, increases about 45% from its 300 K value for an output load of 0.1 pF/μm     

Lateral Current Confinement Determines Silicon Avalanche Transistor Operation in Short-Pulsing Mode

The transient in a Si bipolar junction transistor was investigated in high-current short-pulsing ( 2 ns) mode both experimentally and numerically. A comparison of measured and simulated waveforms clearly showed that only a small fraction of the perimeter of the emitter-base interface (in the lateral direction) takes part in the switching transient when a capacitor of relatively small value (80 pF) is discharged across the transistor to obtain a current pulse of a few nanoseconds in duration. A good agreement was found between measurements and simulations in the 2-D numerical model when the effective operating perimeter was used as a parameter in the model. The results allowed reliable analyses of the thermal regime to be performed. Possible reasons for the significant current confinement in short-pulsing mode and relatively homogeneous transistor switching with longer current pulses are discussed, and a mechanism of fast lateral turn-on spread is assumed. One conclusion of practical importance is that a short-pulsing relatively high-current mode could not be realized without current confinement in the lateral direction.     

Single-stage single-switch input-current-shaping technique withreduced switching loss

In this paper, a new single-stage, single-switch input-current-shaping (S⁴ICS) technique which features substantially reduced turn-on switching loss of the switch in a S⁴ ICS flyback topology is described. In the proposed technique, the turn-on switching loss due to the discharging of the output capacitance of the switch is reduced by turning on the switch when its voltage is minimum. To achieve the turn-on loss reduction for a wide range of line and load conditions, the flyback transformer is continuously operated at the boundary of the continuous conduction mode (CCM) and discontinuous conduction mode (DCM) by employing a variable-frequency control. The performance of the new S⁴ICS flyback technique was evaluated on a 70-W (20-V/3.5-A) experimental prototype     

A method for the measurement of the turn-on condition in MOS transistors

Metal-oxide-silicon (MOS) integrated circuits usually consist of MOS transistors and interconnections. Both, interconnections and MOS transistors are built up of diffused regions in the bulk substrate and conductive strips (metal or polycrystalline silicon) on top of the oxide. For proper electrical operation the interconnection paths should not exhibit MOS transistor effects, i.e. should not induce inversion layers at the silicon-silicon dioxide interface. Furthermore from a designer's point of view it will be desired that some transistors operate in the saturated mode and others in the non-saturated mode. This implies that a method for the determination of the turn-on of channel conduction is highly desirable for designers of MOS integrated circuits. Using a straightforward definition of turn-on, a fast and simple measurement method will be presented for the determination of the relation between gate voltage and diffused region voltage for MOST structures in the turn-on condition.     

Embedding a feedforward controller into the IGBT gate driver for turn-on transient improvement

This paper proposes an active gate drive method based on a feedforward control for turn-on condition in IGBTs. The transient improvement with minimum undesirable effect on the efficiency is the main objective of this research. The new gate driver (GD) improves the trade-off between switching loss and device stress at the turn-on condition, without getting feedback from the output. The operation principle and implementation of the controller in the GD are presented. The effect of the proposed GD on the transient behaviour, efficiency, junction temperature and electromagnetic interference (EMI) during turn-on switching is evaluated by both simulation and experimental tests. The new GD is evaluated under hard switching condition and various frequencies. Advantages and disadvantages of the method have been discussed.     

开关电源模糊PID控制器的设计与仿真

针对开关电源Buck变换器在非线性控制传统的PID调节控制的不足,提出了一种新的模糊控制和PID控制相结合的方法。以Buck电路为例并通过Matlab中的Simulink进行了仿真实验。实验结果证明,模糊PID控制有超调小、响应快、抵御外界扰动能力强的优点。     

The dV/dt capability of MOS-gated thyristors

In this paper, a detailed study of the dV/dt capability of MOS-gated thyristors is performed. It is shown that in addition to the conventional mode of dV/dt-induced turn-on in thyristors, termed the intrinsic mode, there exists another distinct mode of dV/dt-induced turn-on, peculiar to the MOS-gated thyristor structure, which the authors term the extrinsic dV/dt mode. The effective dV/dt capability is determined by both modes and is degraded by the presence of an external gate-cathode resistance and parasitic gate-anode capacitance. The existence of these two modes of dV/dt-induced turn-on is demonstrated experimentally, and the effect of device parameters on the dV/dt capability is studied     

Electrical and optical speed measurements on the siliconheterostructure switch

This paper examines transient effects in the silicon heterostructure switch caused by electrical and optical stimuli. The previous work by others is extended to include the effects of external load and input pulse width conditions. For electrical drive pulses, the turn-on time has three components, being (1) capacitive rise time, (2) turn-on delay time, and (3) feedback regenerative time, being typically 7.5 μs, 3.3 μs, and 50 μs respectively. Optical switching is seen to be quite different in outcome compared to the electrical type. The results overall advance appreciation of the device's capabilities, and compare well with other investigations     

Transverse-mode competition effects observed in the numericalsimulation of transients in gain-guided semiconductor laser arrays

A numerical analysis of transient turn-on in a gain-guided semiconductor laser array is presented. The self-consistent approach, valid in the strong-coupling limit, treats the array as a single waveguide laser with a transversely varying refractive index. The program first solves for the modes of this system without considering stimulated emission. The overall modal gain is then inserted into the rate equations in order to calculate a photon density; this results in a new spatial gain distribution, which in turn causes changes to the modal intensity profiles. This analysis is used to find both steady-state results and instabilities which result from mode competition. The approach is to solve instantaneous eigenvalue equations     

Transient characteristics of latch-up in bulk CMOS

Transient characteristics of the latch-up turn-on process in bulk CMOS are investigated. A measurement technique that evaluates the threshold trigger pulse current of latch-up and also observes latch-up turn-on transient waveforms is established. Through the comparison between experimental data and precise circuit simulation results, the main factors that determine transient latch-up characteristics are clarified as the base-emitter diffusion capacitors.     

A theoretical analysis of the transient intensity noise ofsemiconductor lasers

The nonstationary intensity noise of a high-speed modulated semiconductor laser is investigated. The analysis is based on a rate equation method with Langevin fluctuation sources. The variance and the autocorrelation function of the intensity noise are calculated analytically with a state-space approach. The time-variant statistical properties of the intensity noise are evaluated numerically for the turn-on transient. The numerical calculation indicates that the difference between intensity noise and photon number fluctuations during the turn-on transient can be neglected. It a shown that is significant part of the nonstationary intensity noise can be described as timing jitter of the relaxation oscillations     

Turn-on characteristics of polycrystalline silicon TFT's-impact ofhydrogenation and channel length

Experimental measurements and two-dimensional (2-D) numerical simulation have been used to investigate the impart of the polycrystalline silicon (poly-Si) density of states (DOS) and channel dimensions on the transient response of poly-Si thin-film transistors (TFTs). TFTs exposed to different hydrogenation times were used to investigate the effect of the poly-Si DOS. The experimental results show that TFT turn-on time increases with increasing channel length and decreases with increasing hydrogenation time. For the first time, transient simulations were carried out using “best fit” poly-Si DOS distributions which were extracted numerically from DC transfer characteristics. The resulting simulations show excellent agreement with the experimental data. Degradation in the transient characteristic is thereby correlated with an increase In the poly-Si DOS     

Gate-controlled field-effect diodes and silicon-controlled rectifier for charged-device model ESD protection in advanced SOI technology

Silicon-controlled rectifier (SCR) devices are used as local clamping ESD devices. However, conventional designs suffer from slow turn-on, which causes problems in sub 10 ns charged-device model (CDM) protection, especially in deeply scaled technologies. In this paper, a double-well field-effect diode (DWFED) and an improved field-effect diode (FED) are designed to address this challenge. They are fabricated and characterized in 45 nm silicon-on-insulator (SOI) technology and experimentally demonstrated to be suitable for pad-based local clamping under a normal supply voltage (V_dd) range (at or below 1 V) in high-speed applications. ESD protection capabilities are investigated using very fast transmission line pulse (VF-TLP) tests to predict the device performance in CDM events. FED’s advantages in improving transient turn-on behavior and reducing DC leakage current are analyzed and compared with the regular SCR and the DWFED. Technology CAD (TCAD) simulations are used to interpret turn-on behavior and guide design. The improved devices may be implemented in a local clamping scheme that expands the ESD design window for advanced technology nodes.     

Turn-off operation of a MOS-gate 2.6 kV 4H–SiC gate turn-off thyristor

The turn-off operation of a 4H–SiC gate turn-off thyristor (GTO) with 2.6 kV breakover voltage has been investigated using an external Si-MOSFET as a gate-to-emitter shunt (MOS-gate mode), in the temperature interval 293–496 K. The maximum cathode current density j_cmax that can be turned off in such a mode decreases from 1850 A/cm² at 400 K to 700 A/cm² at 496 K. The room temperature j_cmax value is estimated to be about 3700 A/cm². The above j_cmax values are essentially higher than those observed when turning this thyristor off in the conventional GTO mode. Turn-off transients in the MOS-gate mode have been studied in both quasi-static and pulse regimes. Temperature dependencies of the turn-on and turn-off times, as well as those of the turn-on and turn-off energy losses have been measured. The upper switching frequency of the GTO is estimated to be about 700 kHz.     

An all-implanted, self-aligned, GaAs JFET with a nonalloyedW/p+-GaAs ohmic gate contact

We describe a self-aligned, refractory metal gate contact, enhancement mode, GaAs junction field effect transistor (JFET) where all impurity doping was done by ion implantation. Processing conditions are presented for realizing a high gate turn-on voltage (~1.0 V at 1 mA/mm of gate current) relative to GaAs MESFET's. The high gate turn-on voltage is the result of optimizing the p⁺-gate implant and anneal to achieve a nonalloyed ohmic contact between the implanted p⁺-GaAs and the sputter deposited tungsten gate contact. Initial nominally 1.0 μm×50 μm n-JFET's have a transconductance of 85 mS/mm and f_t of 11.4 GHz